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57 lines
1.7 KiB
Plaintext
57 lines
1.7 KiB
Plaintext
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* Ingenic JZ4780 DMA Controller
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Required properties:
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- compatible: Should be "ingenic,jz4780-dma"
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- reg: Should contain the DMA controller registers location and length.
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- interrupts: Should contain the interrupt specifier of the DMA controller.
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- interrupt-parent: Should be the phandle of the interrupt controller that
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- clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
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- #dma-cells: Must be <2>. Number of integer cells in the dmas property of
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DMA clients (see below).
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Optional properties:
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- ingenic,reserved-channels: Bitmask of channels to reserve for devices that
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need a specific channel. These channels will only be assigned when explicitly
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requested by a client. The primary use for this is channels 0 and 1, which
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can be configured to have special behaviour for NAND/BCH when using
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programmable firmware.
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Example:
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dma: dma@13420000 {
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compatible = "ingenic,jz4780-dma";
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reg = <0x13420000 0x10000>;
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interrupt-parent = <&intc>;
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interrupts = <10>;
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clocks = <&cgu JZ4780_CLK_PDMA>;
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#dma-cells = <2>;
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ingenic,reserved-channels = <0x3>;
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};
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DMA clients must use the format described in dma.txt, giving a phandle to the
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DMA controller plus the following 2 integer cells:
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1. Request type: The DMA request type for transfers to/from the device on
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the allocated channel, as defined in the SoC documentation.
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2. Channel: If set to 0xffffffff, any available channel will be allocated for
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the client. Otherwise, the exact channel specified will be used. The channel
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should be reserved on the DMA controller using the ingenic,reserved-channels
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property.
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Example:
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uart0: serial@10030000 {
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...
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dmas = <&dma 0x14 0xffffffff
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&dma 0x15 0xffffffff>;
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dma-names = "tx", "rx";
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...
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};
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