2018-05-10 02:06:04 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2016-02-18 08:52:01 +08:00
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/*
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* Copyright(C) 2015 Linaro Limited. All rights reserved.
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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*/
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#include <linux/coresight.h>
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#include <linux/coresight-pmu.h>
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#include <linux/cpumask.h>
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#include <linux/device.h>
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#include <linux/list.h>
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#include <linux/mm.h>
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2016-02-28 04:21:47 +08:00
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#include <linux/init.h>
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2016-02-18 08:52:01 +08:00
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#include <linux/perf_event.h>
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2018-09-21 03:17:47 +08:00
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#include <linux/percpu-defs.h>
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2016-02-18 08:52:01 +08:00
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#include <linux/slab.h>
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coresight: perf: Add "sinks" group to PMU directory
Add a "sinks" directory entry so that users can see all the sinks
available in the system in a single place. Individual sink are added
as they are registered with the coresight bus.
Committer tests:
Test built on a ubuntu 18.04 container with a cross build environment to
arm64, the new field is there, need to find a machine with this feature
to do further testing in the future.
root@d15263e5734a:/git/perf# grep CORESIGHT /tmp/build/v5.0-rc2+/.config
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINKS_AND_SINKS=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_CATU=y
CONFIG_CORESIGHT_SINK_TPIU=y
CONFIG_CORESIGHT_SINK_ETBV10=y
CONFIG_CORESIGHT_SOURCE_ETM4X=y
CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
CONFIG_CORESIGHT_CPU_DEBUG=m
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# file /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/*.o
.../coresight/coresight-catu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.mod.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-dynamic-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etb10.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm-perf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x-sysfs.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-funnel.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-stm.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etr.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tpiu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/of_coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# pahole -C coresight_device /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/coresight.o
struct coresight_device {
struct coresight_connection * conns; /* 0 8 */
int nr_inport; /* 8 4 */
int nr_outport; /* 12 4 */
enum coresight_dev_type type; /* 16 4 */
union coresight_dev_subtype subtype; /* 20 8 */
/* XXX 4 bytes hole, try to pack */
const struct coresight_ops * ops; /* 32 8 */
struct device dev; /* 40 1408 */
/* XXX last struct has 7 bytes of padding */
/* --- cacheline 22 boundary (1408 bytes) was 40 bytes ago --- */
atomic_t * refcnt; /* 1448 8 */
bool orphan; /* 1456 1 */
bool enable; /* 1457 1 */
bool activated; /* 1458 1 */
/* XXX 5 bytes hole, try to pack */
struct dev_ext_attribute * ea; /* 1464 8 */
/* size: 1472, cachelines: 23, members: 12 */
/* sum members: 1463, holes: 2, sum holes: 9 */
/* paddings: 1, sum paddings: 7 */
};
root@d15263e5734a:/git/perf#
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-s390@vger.kernel.org
Link: http://lkml.kernel.org/r/20190131184714.20388-3-mathieu.poirier@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-02-01 02:47:09 +08:00
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#include <linux/stringhash.h>
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2016-02-18 08:52:01 +08:00
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#include <linux/types.h>
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#include <linux/workqueue.h>
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2016-08-26 05:19:12 +08:00
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#include "coresight-etm-perf.h"
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2016-02-18 08:52:01 +08:00
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#include "coresight-priv.h"
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static struct pmu etm_pmu;
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static bool etm_perf_up;
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static DEFINE_PER_CPU(struct perf_output_handle, ctx_handle);
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static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
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/* ETMv3.5/PTM's ETMCR is 'config' */
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PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
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PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
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2017-08-03 00:22:01 +08:00
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PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
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2019-02-01 02:47:10 +08:00
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/* Sink ID - same for all ETMs */
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PMU_FORMAT_ATTR(sinkid, "config2:0-31");
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2016-02-18 08:52:01 +08:00
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static struct attribute *etm_config_formats_attr[] = {
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&format_attr_cycacc.attr,
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&format_attr_timestamp.attr,
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2017-08-03 00:22:01 +08:00
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&format_attr_retstack.attr,
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2019-02-01 02:47:10 +08:00
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&format_attr_sinkid.attr,
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2016-02-18 08:52:01 +08:00
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NULL,
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};
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2017-08-03 00:22:00 +08:00
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static const struct attribute_group etm_pmu_format_group = {
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2016-02-18 08:52:01 +08:00
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.name = "format",
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.attrs = etm_config_formats_attr,
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};
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coresight: perf: Add "sinks" group to PMU directory
Add a "sinks" directory entry so that users can see all the sinks
available in the system in a single place. Individual sink are added
as they are registered with the coresight bus.
Committer tests:
Test built on a ubuntu 18.04 container with a cross build environment to
arm64, the new field is there, need to find a machine with this feature
to do further testing in the future.
root@d15263e5734a:/git/perf# grep CORESIGHT /tmp/build/v5.0-rc2+/.config
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINKS_AND_SINKS=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_CATU=y
CONFIG_CORESIGHT_SINK_TPIU=y
CONFIG_CORESIGHT_SINK_ETBV10=y
CONFIG_CORESIGHT_SOURCE_ETM4X=y
CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
CONFIG_CORESIGHT_CPU_DEBUG=m
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# file /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/*.o
.../coresight/coresight-catu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.mod.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-dynamic-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etb10.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm-perf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x-sysfs.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-funnel.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-stm.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etr.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tpiu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/of_coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# pahole -C coresight_device /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/coresight.o
struct coresight_device {
struct coresight_connection * conns; /* 0 8 */
int nr_inport; /* 8 4 */
int nr_outport; /* 12 4 */
enum coresight_dev_type type; /* 16 4 */
union coresight_dev_subtype subtype; /* 20 8 */
/* XXX 4 bytes hole, try to pack */
const struct coresight_ops * ops; /* 32 8 */
struct device dev; /* 40 1408 */
/* XXX last struct has 7 bytes of padding */
/* --- cacheline 22 boundary (1408 bytes) was 40 bytes ago --- */
atomic_t * refcnt; /* 1448 8 */
bool orphan; /* 1456 1 */
bool enable; /* 1457 1 */
bool activated; /* 1458 1 */
/* XXX 5 bytes hole, try to pack */
struct dev_ext_attribute * ea; /* 1464 8 */
/* size: 1472, cachelines: 23, members: 12 */
/* sum members: 1463, holes: 2, sum holes: 9 */
/* paddings: 1, sum paddings: 7 */
};
root@d15263e5734a:/git/perf#
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-s390@vger.kernel.org
Link: http://lkml.kernel.org/r/20190131184714.20388-3-mathieu.poirier@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-02-01 02:47:09 +08:00
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static struct attribute *etm_config_sinks_attr[] = {
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NULL,
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};
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static const struct attribute_group etm_pmu_sinks_group = {
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.name = "sinks",
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.attrs = etm_config_sinks_attr,
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};
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2016-02-18 08:52:01 +08:00
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static const struct attribute_group *etm_pmu_attr_groups[] = {
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&etm_pmu_format_group,
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coresight: perf: Add "sinks" group to PMU directory
Add a "sinks" directory entry so that users can see all the sinks
available in the system in a single place. Individual sink are added
as they are registered with the coresight bus.
Committer tests:
Test built on a ubuntu 18.04 container with a cross build environment to
arm64, the new field is there, need to find a machine with this feature
to do further testing in the future.
root@d15263e5734a:/git/perf# grep CORESIGHT /tmp/build/v5.0-rc2+/.config
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINKS_AND_SINKS=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_CATU=y
CONFIG_CORESIGHT_SINK_TPIU=y
CONFIG_CORESIGHT_SINK_ETBV10=y
CONFIG_CORESIGHT_SOURCE_ETM4X=y
CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
CONFIG_CORESIGHT_CPU_DEBUG=m
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# file /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/*.o
.../coresight/coresight-catu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.mod.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-dynamic-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etb10.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm-perf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x-sysfs.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-funnel.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-stm.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etr.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tpiu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/of_coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# pahole -C coresight_device /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/coresight.o
struct coresight_device {
struct coresight_connection * conns; /* 0 8 */
int nr_inport; /* 8 4 */
int nr_outport; /* 12 4 */
enum coresight_dev_type type; /* 16 4 */
union coresight_dev_subtype subtype; /* 20 8 */
/* XXX 4 bytes hole, try to pack */
const struct coresight_ops * ops; /* 32 8 */
struct device dev; /* 40 1408 */
/* XXX last struct has 7 bytes of padding */
/* --- cacheline 22 boundary (1408 bytes) was 40 bytes ago --- */
atomic_t * refcnt; /* 1448 8 */
bool orphan; /* 1456 1 */
bool enable; /* 1457 1 */
bool activated; /* 1458 1 */
/* XXX 5 bytes hole, try to pack */
struct dev_ext_attribute * ea; /* 1464 8 */
/* size: 1472, cachelines: 23, members: 12 */
/* sum members: 1463, holes: 2, sum holes: 9 */
/* paddings: 1, sum paddings: 7 */
};
root@d15263e5734a:/git/perf#
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-s390@vger.kernel.org
Link: http://lkml.kernel.org/r/20190131184714.20388-3-mathieu.poirier@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-02-01 02:47:09 +08:00
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&etm_pmu_sinks_group,
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2016-02-18 08:52:01 +08:00
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NULL,
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};
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2018-09-21 03:17:47 +08:00
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static inline struct list_head **
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etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
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{
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return per_cpu_ptr(data->path, cpu);
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}
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static inline struct list_head *
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etm_event_cpu_path(struct etm_event_data *data, int cpu)
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{
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return *etm_event_cpu_path_ptr(data, cpu);
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}
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2016-02-18 08:52:01 +08:00
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static void etm_event_read(struct perf_event *event) {}
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2016-08-26 05:19:12 +08:00
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static int etm_addr_filters_alloc(struct perf_event *event)
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2016-02-18 08:52:01 +08:00
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{
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2016-08-26 05:19:12 +08:00
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struct etm_filters *filters;
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int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
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filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
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if (!filters)
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return -ENOMEM;
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if (event->parent)
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memcpy(filters, event->parent->hw.addr_filters,
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sizeof(*filters));
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event->hw.addr_filters = filters;
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2016-02-18 08:52:01 +08:00
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return 0;
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}
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2016-08-26 05:19:12 +08:00
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static void etm_event_destroy(struct perf_event *event)
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{
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kfree(event->hw.addr_filters);
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event->hw.addr_filters = NULL;
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}
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|
|
|
|
|
|
static int etm_event_init(struct perf_event *event)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (event->attr.type != etm_pmu.type) {
|
|
|
|
ret = -ENOENT;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = etm_addr_filters_alloc(event);
|
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
event->destroy = etm_event_destroy;
|
|
|
|
out:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2016-02-18 08:52:01 +08:00
|
|
|
static void free_event_data(struct work_struct *work)
|
|
|
|
{
|
|
|
|
int cpu;
|
|
|
|
cpumask_t *mask;
|
|
|
|
struct etm_event_data *event_data;
|
|
|
|
struct coresight_device *sink;
|
|
|
|
|
|
|
|
event_data = container_of(work, struct etm_event_data, work);
|
|
|
|
mask = &event_data->mask;
|
2018-09-21 03:17:49 +08:00
|
|
|
|
|
|
|
/* Free the sink buffers, if there are any */
|
|
|
|
if (event_data->snk_config && !WARN_ON(cpumask_empty(mask))) {
|
2016-02-18 08:52:01 +08:00
|
|
|
cpu = cpumask_first(mask);
|
2018-09-21 03:17:47 +08:00
|
|
|
sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
|
2016-02-18 08:52:01 +08:00
|
|
|
if (sink_ops(sink)->free_buffer)
|
|
|
|
sink_ops(sink)->free_buffer(event_data->snk_config);
|
|
|
|
}
|
|
|
|
|
|
|
|
for_each_cpu(cpu, mask) {
|
2018-09-21 03:17:47 +08:00
|
|
|
struct list_head **ppath;
|
|
|
|
|
|
|
|
ppath = etm_event_cpu_path_ptr(event_data, cpu);
|
|
|
|
if (!(IS_ERR_OR_NULL(*ppath)))
|
|
|
|
coresight_release_path(*ppath);
|
|
|
|
*ppath = NULL;
|
2016-02-18 08:52:01 +08:00
|
|
|
}
|
|
|
|
|
2018-09-21 03:17:47 +08:00
|
|
|
free_percpu(event_data->path);
|
2016-02-18 08:52:01 +08:00
|
|
|
kfree(event_data);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *alloc_event_data(int cpu)
|
|
|
|
{
|
|
|
|
cpumask_t *mask;
|
|
|
|
struct etm_event_data *event_data;
|
|
|
|
|
|
|
|
/* First get memory for the session's data */
|
|
|
|
event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
|
|
|
|
if (!event_data)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
|
|
mask = &event_data->mask;
|
|
|
|
if (cpu != -1)
|
|
|
|
cpumask_set_cpu(cpu, mask);
|
|
|
|
else
|
2018-09-21 03:17:49 +08:00
|
|
|
cpumask_copy(mask, cpu_present_mask);
|
2016-02-18 08:52:01 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Each CPU has a single path between source and destination. As such
|
|
|
|
* allocate an array using CPU numbers as indexes. That way a path
|
|
|
|
* for any CPU can easily be accessed at any given time. We proceed
|
|
|
|
* the same way for sessions involving a single CPU. The cost of
|
|
|
|
* unused memory when dealing with single CPU trace scenarios is small
|
|
|
|
* compared to the cost of searching through an optimized array.
|
|
|
|
*/
|
2018-09-21 03:17:47 +08:00
|
|
|
event_data->path = alloc_percpu(struct list_head *);
|
|
|
|
|
2016-02-18 08:52:01 +08:00
|
|
|
if (!event_data->path) {
|
|
|
|
kfree(event_data);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return event_data;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void etm_free_aux(void *data)
|
|
|
|
{
|
|
|
|
struct etm_event_data *event_data = data;
|
|
|
|
|
|
|
|
schedule_work(&event_data->work);
|
|
|
|
}
|
|
|
|
|
2019-02-01 02:47:08 +08:00
|
|
|
static void *etm_setup_aux(struct perf_event *event, void **pages,
|
2016-02-18 08:52:01 +08:00
|
|
|
int nr_pages, bool overwrite)
|
|
|
|
{
|
2019-02-01 02:47:10 +08:00
|
|
|
u32 id;
|
2019-02-01 02:47:08 +08:00
|
|
|
int cpu = event->cpu;
|
2016-02-18 08:52:01 +08:00
|
|
|
cpumask_t *mask;
|
|
|
|
struct coresight_device *sink;
|
|
|
|
struct etm_event_data *event_data = NULL;
|
|
|
|
|
2019-02-01 02:47:08 +08:00
|
|
|
event_data = alloc_event_data(cpu);
|
2016-02-18 08:52:01 +08:00
|
|
|
if (!event_data)
|
|
|
|
return NULL;
|
2017-06-06 04:15:04 +08:00
|
|
|
INIT_WORK(&event_data->work, free_event_data);
|
2016-02-18 08:52:01 +08:00
|
|
|
|
2019-02-01 02:47:10 +08:00
|
|
|
/* First get the selected sink from user space. */
|
|
|
|
if (event->attr.config2) {
|
|
|
|
id = (u32)event->attr.config2;
|
|
|
|
sink = coresight_get_sink_by_id(id);
|
|
|
|
} else {
|
|
|
|
sink = coresight_get_enabled_sink(true);
|
|
|
|
}
|
|
|
|
|
2018-09-21 03:17:49 +08:00
|
|
|
if (!sink || !sink_ops(sink)->alloc_buffer)
|
2016-11-30 00:47:19 +08:00
|
|
|
goto err;
|
2016-11-30 00:47:14 +08:00
|
|
|
|
2016-02-18 08:52:01 +08:00
|
|
|
mask = &event_data->mask;
|
|
|
|
|
2018-09-21 03:17:49 +08:00
|
|
|
/*
|
|
|
|
* Setup the path for each CPU in a trace session. We try to build
|
|
|
|
* trace path for each CPU in the mask. If we don't find an ETM
|
|
|
|
* for the CPU or fail to build a path, we clear the CPU from the
|
|
|
|
* mask and continue with the rest. If ever we try to trace on those
|
|
|
|
* CPUs, we can handle it and fail the session.
|
|
|
|
*/
|
2016-02-18 08:52:01 +08:00
|
|
|
for_each_cpu(cpu, mask) {
|
2018-09-21 03:17:47 +08:00
|
|
|
struct list_head *path;
|
2016-02-18 08:52:01 +08:00
|
|
|
struct coresight_device *csdev;
|
|
|
|
|
|
|
|
csdev = per_cpu(csdev_src, cpu);
|
2018-09-21 03:17:49 +08:00
|
|
|
/*
|
|
|
|
* If there is no ETM associated with this CPU clear it from
|
|
|
|
* the mask and continue with the rest. If ever we try to trace
|
|
|
|
* on this CPU, we handle it accordingly.
|
|
|
|
*/
|
|
|
|
if (!csdev) {
|
|
|
|
cpumask_clear_cpu(cpu, mask);
|
|
|
|
continue;
|
|
|
|
}
|
2016-02-18 08:52:01 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Building a path doesn't enable it, it simply builds a
|
|
|
|
* list of devices from source to sink that can be
|
|
|
|
* referenced later when the path is actually needed.
|
|
|
|
*/
|
2018-09-21 03:17:47 +08:00
|
|
|
path = coresight_build_path(csdev, sink);
|
2018-09-21 03:17:49 +08:00
|
|
|
if (IS_ERR(path)) {
|
|
|
|
cpumask_clear_cpu(cpu, mask);
|
|
|
|
continue;
|
|
|
|
}
|
2018-09-21 03:17:47 +08:00
|
|
|
|
|
|
|
*etm_event_cpu_path_ptr(event_data, cpu) = path;
|
2016-02-18 08:52:01 +08:00
|
|
|
}
|
|
|
|
|
2018-09-21 03:17:49 +08:00
|
|
|
/* If we don't have any CPUs ready for tracing, abort */
|
|
|
|
cpu = cpumask_first(mask);
|
|
|
|
if (cpu >= nr_cpu_ids)
|
2016-02-18 08:52:01 +08:00
|
|
|
goto err;
|
|
|
|
|
2018-09-21 03:17:49 +08:00
|
|
|
/* Allocate the sink buffer for this session */
|
2016-02-18 08:52:01 +08:00
|
|
|
event_data->snk_config =
|
|
|
|
sink_ops(sink)->alloc_buffer(sink, cpu, pages,
|
|
|
|
nr_pages, overwrite);
|
|
|
|
if (!event_data->snk_config)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
out:
|
|
|
|
return event_data;
|
|
|
|
|
|
|
|
err:
|
|
|
|
etm_free_aux(event_data);
|
|
|
|
event_data = NULL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void etm_event_start(struct perf_event *event, int flags)
|
|
|
|
{
|
|
|
|
int cpu = smp_processor_id();
|
|
|
|
struct etm_event_data *event_data;
|
|
|
|
struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
|
|
|
|
struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
|
2018-09-21 03:17:47 +08:00
|
|
|
struct list_head *path;
|
2016-02-18 08:52:01 +08:00
|
|
|
|
|
|
|
if (!csdev)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Deal with the ring buffer API and get a handle on the
|
|
|
|
* session's information.
|
|
|
|
*/
|
|
|
|
event_data = perf_aux_output_begin(handle, event);
|
|
|
|
if (!event_data)
|
|
|
|
goto fail;
|
|
|
|
|
2018-09-21 03:17:47 +08:00
|
|
|
path = etm_event_cpu_path(event_data, cpu);
|
2016-02-18 08:52:01 +08:00
|
|
|
/* We need a sink, no need to continue without one */
|
2018-09-21 03:17:47 +08:00
|
|
|
sink = coresight_get_sink(path);
|
2018-09-21 03:17:56 +08:00
|
|
|
if (WARN_ON_ONCE(!sink))
|
2016-02-18 08:52:01 +08:00
|
|
|
goto fail_end_stop;
|
|
|
|
|
|
|
|
/* Nothing will happen without a path */
|
2018-09-21 03:17:56 +08:00
|
|
|
if (coresight_enable_path(path, CS_MODE_PERF, handle))
|
2016-02-18 08:52:01 +08:00
|
|
|
goto fail_end_stop;
|
|
|
|
|
|
|
|
/* Tell the perf core the event is alive */
|
|
|
|
event->hw.state = 0;
|
|
|
|
|
|
|
|
/* Finally enable the tracer */
|
2016-08-26 05:19:10 +08:00
|
|
|
if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
|
2018-09-21 03:17:50 +08:00
|
|
|
goto fail_disable_path;
|
2016-02-18 08:52:01 +08:00
|
|
|
|
|
|
|
out:
|
|
|
|
return;
|
|
|
|
|
2018-09-21 03:17:50 +08:00
|
|
|
fail_disable_path:
|
|
|
|
coresight_disable_path(path);
|
2016-02-18 08:52:01 +08:00
|
|
|
fail_end_stop:
|
2017-02-20 21:33:50 +08:00
|
|
|
perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
|
|
|
|
perf_aux_output_end(handle, 0);
|
2016-02-18 08:52:01 +08:00
|
|
|
fail:
|
|
|
|
event->hw.state = PERF_HES_STOPPED;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void etm_event_stop(struct perf_event *event, int mode)
|
|
|
|
{
|
|
|
|
int cpu = smp_processor_id();
|
|
|
|
unsigned long size;
|
|
|
|
struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
|
|
|
|
struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
|
|
|
|
struct etm_event_data *event_data = perf_get_aux(handle);
|
2018-09-21 03:17:47 +08:00
|
|
|
struct list_head *path;
|
2016-02-18 08:52:01 +08:00
|
|
|
|
|
|
|
if (event->hw.state == PERF_HES_STOPPED)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (!csdev)
|
|
|
|
return;
|
|
|
|
|
2018-09-21 03:17:47 +08:00
|
|
|
path = etm_event_cpu_path(event_data, cpu);
|
|
|
|
if (!path)
|
|
|
|
return;
|
|
|
|
|
|
|
|
sink = coresight_get_sink(path);
|
2016-02-18 08:52:01 +08:00
|
|
|
if (!sink)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* stop tracer */
|
2016-08-26 05:19:10 +08:00
|
|
|
source_ops(csdev)->disable(csdev, event);
|
2016-02-18 08:52:01 +08:00
|
|
|
|
|
|
|
/* tell the core */
|
|
|
|
event->hw.state = PERF_HES_STOPPED;
|
|
|
|
|
|
|
|
if (mode & PERF_EF_UPDATE) {
|
|
|
|
if (WARN_ON_ONCE(handle->event != event))
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* update trace information */
|
|
|
|
if (!sink_ops(sink)->update_buffer)
|
|
|
|
return;
|
|
|
|
|
2018-09-21 03:17:54 +08:00
|
|
|
size = sink_ops(sink)->update_buffer(sink, handle,
|
2016-02-18 08:52:01 +08:00
|
|
|
event_data->snk_config);
|
2017-02-20 21:33:50 +08:00
|
|
|
perf_aux_output_end(handle, size);
|
2016-02-18 08:52:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Disabling the path make its elements available to other sessions */
|
2018-09-21 03:17:47 +08:00
|
|
|
coresight_disable_path(path);
|
2016-02-18 08:52:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int etm_event_add(struct perf_event *event, int mode)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
struct hw_perf_event *hwc = &event->hw;
|
|
|
|
|
|
|
|
if (mode & PERF_EF_START) {
|
|
|
|
etm_event_start(event, 0);
|
|
|
|
if (hwc->state & PERF_HES_STOPPED)
|
|
|
|
ret = -EINVAL;
|
|
|
|
} else {
|
|
|
|
hwc->state = PERF_HES_STOPPED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void etm_event_del(struct perf_event *event, int mode)
|
|
|
|
{
|
|
|
|
etm_event_stop(event, PERF_EF_UPDATE);
|
|
|
|
}
|
|
|
|
|
2016-08-26 05:19:12 +08:00
|
|
|
static int etm_addr_filters_validate(struct list_head *filters)
|
|
|
|
{
|
|
|
|
bool range = false, address = false;
|
|
|
|
int index = 0;
|
|
|
|
struct perf_addr_filter *filter;
|
|
|
|
|
|
|
|
list_for_each_entry(filter, filters, entry) {
|
|
|
|
/*
|
|
|
|
* No need to go further if there's no more
|
|
|
|
* room for filters.
|
|
|
|
*/
|
|
|
|
if (++index > ETM_ADDR_CMP_MAX)
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
|
2018-03-29 20:06:48 +08:00
|
|
|
/* filter::size==0 means single address trigger */
|
|
|
|
if (filter->size) {
|
|
|
|
/*
|
|
|
|
* The existing code relies on START/STOP filters
|
|
|
|
* being address filters.
|
|
|
|
*/
|
|
|
|
if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
|
|
|
|
filter->action == PERF_ADDR_FILTER_ACTION_STOP)
|
|
|
|
return -EOPNOTSUPP;
|
|
|
|
|
|
|
|
range = true;
|
|
|
|
} else
|
|
|
|
address = true;
|
|
|
|
|
2016-08-26 05:19:12 +08:00
|
|
|
/*
|
|
|
|
* At this time we don't allow range and start/stop filtering
|
|
|
|
* to cohabitate, they have to be mutually exclusive.
|
|
|
|
*/
|
2018-03-29 20:06:48 +08:00
|
|
|
if (range && address)
|
2016-08-26 05:19:12 +08:00
|
|
|
return -EOPNOTSUPP;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void etm_addr_filters_sync(struct perf_event *event)
|
|
|
|
{
|
|
|
|
struct perf_addr_filters_head *head = perf_event_addr_filters(event);
|
2019-02-15 19:56:55 +08:00
|
|
|
unsigned long start, stop;
|
|
|
|
struct perf_addr_filter_range *fr = event->addr_filter_ranges;
|
2016-08-26 05:19:12 +08:00
|
|
|
struct etm_filters *filters = event->hw.addr_filters;
|
|
|
|
struct etm_filter *etm_filter;
|
|
|
|
struct perf_addr_filter *filter;
|
|
|
|
int i = 0;
|
|
|
|
|
|
|
|
list_for_each_entry(filter, &head->list, entry) {
|
2019-02-15 19:56:55 +08:00
|
|
|
start = fr[i].start;
|
|
|
|
stop = start + fr[i].size;
|
2016-08-26 05:19:12 +08:00
|
|
|
etm_filter = &filters->etm_filter[i];
|
|
|
|
|
2018-03-29 20:06:48 +08:00
|
|
|
switch (filter->action) {
|
|
|
|
case PERF_ADDR_FILTER_ACTION_FILTER:
|
2016-08-26 05:19:12 +08:00
|
|
|
etm_filter->start_addr = start;
|
|
|
|
etm_filter->stop_addr = stop;
|
|
|
|
etm_filter->type = ETM_ADDR_TYPE_RANGE;
|
2018-03-29 20:06:48 +08:00
|
|
|
break;
|
|
|
|
case PERF_ADDR_FILTER_ACTION_START:
|
|
|
|
etm_filter->start_addr = start;
|
|
|
|
etm_filter->type = ETM_ADDR_TYPE_START;
|
|
|
|
break;
|
|
|
|
case PERF_ADDR_FILTER_ACTION_STOP:
|
|
|
|
etm_filter->stop_addr = stop;
|
|
|
|
etm_filter->type = ETM_ADDR_TYPE_STOP;
|
|
|
|
break;
|
2016-08-26 05:19:12 +08:00
|
|
|
}
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
|
|
|
|
filters->nr_filters = i;
|
|
|
|
}
|
|
|
|
|
2016-02-18 08:52:01 +08:00
|
|
|
int etm_perf_symlink(struct coresight_device *csdev, bool link)
|
|
|
|
{
|
|
|
|
char entry[sizeof("cpu9999999")];
|
|
|
|
int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
|
|
|
|
struct device *pmu_dev = etm_pmu.dev;
|
|
|
|
struct device *cs_dev = &csdev->dev;
|
|
|
|
|
|
|
|
sprintf(entry, "cpu%d", cpu);
|
|
|
|
|
|
|
|
if (!etm_perf_up)
|
|
|
|
return -EPROBE_DEFER;
|
|
|
|
|
|
|
|
if (link) {
|
|
|
|
ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
per_cpu(csdev_src, cpu) = csdev;
|
|
|
|
} else {
|
|
|
|
sysfs_remove_link(&pmu_dev->kobj, entry);
|
|
|
|
per_cpu(csdev_src, cpu) = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
coresight: perf: Add "sinks" group to PMU directory
Add a "sinks" directory entry so that users can see all the sinks
available in the system in a single place. Individual sink are added
as they are registered with the coresight bus.
Committer tests:
Test built on a ubuntu 18.04 container with a cross build environment to
arm64, the new field is there, need to find a machine with this feature
to do further testing in the future.
root@d15263e5734a:/git/perf# grep CORESIGHT /tmp/build/v5.0-rc2+/.config
CONFIG_CORESIGHT=y
CONFIG_CORESIGHT_LINKS_AND_SINKS=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
CONFIG_CORESIGHT_CATU=y
CONFIG_CORESIGHT_SINK_TPIU=y
CONFIG_CORESIGHT_SINK_ETBV10=y
CONFIG_CORESIGHT_SOURCE_ETM4X=y
CONFIG_CORESIGHT_DYNAMIC_REPLICATOR=y
CONFIG_CORESIGHT_STM=y
CONFIG_CORESIGHT_CPU_DEBUG=m
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# file /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/*.o
.../coresight/coresight-catu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.mod.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-cpu-debug.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-dynamic-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etb10.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm-perf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x-sysfs.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-etm4x.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-funnel.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-replicator.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-stm.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etf.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc-etr.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tmc.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight-tpiu.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
.../coresight/of_coresight.o: ELF 64-bit MSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
root@d15263e5734a:/git/perf#
root@d15263e5734a:/git/perf# pahole -C coresight_device /tmp/build/v5.0-rc2+/drivers/hwtracing/coresight/coresight.o
struct coresight_device {
struct coresight_connection * conns; /* 0 8 */
int nr_inport; /* 8 4 */
int nr_outport; /* 12 4 */
enum coresight_dev_type type; /* 16 4 */
union coresight_dev_subtype subtype; /* 20 8 */
/* XXX 4 bytes hole, try to pack */
const struct coresight_ops * ops; /* 32 8 */
struct device dev; /* 40 1408 */
/* XXX last struct has 7 bytes of padding */
/* --- cacheline 22 boundary (1408 bytes) was 40 bytes ago --- */
atomic_t * refcnt; /* 1448 8 */
bool orphan; /* 1456 1 */
bool enable; /* 1457 1 */
bool activated; /* 1458 1 */
/* XXX 5 bytes hole, try to pack */
struct dev_ext_attribute * ea; /* 1464 8 */
/* size: 1472, cachelines: 23, members: 12 */
/* sum members: 1463, holes: 2, sum holes: 9 */
/* paddings: 1, sum paddings: 7 */
};
root@d15263e5734a:/git/perf#
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-s390@vger.kernel.org
Link: http://lkml.kernel.org/r/20190131184714.20388-3-mathieu.poirier@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-02-01 02:47:09 +08:00
|
|
|
static ssize_t etm_perf_sink_name_show(struct device *dev,
|
|
|
|
struct device_attribute *dattr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct dev_ext_attribute *ea;
|
|
|
|
|
|
|
|
ea = container_of(dattr, struct dev_ext_attribute, attr);
|
|
|
|
return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
|
|
|
|
}
|
|
|
|
|
|
|
|
int etm_perf_add_symlink_sink(struct coresight_device *csdev)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
unsigned long hash;
|
|
|
|
const char *name;
|
|
|
|
struct device *pmu_dev = etm_pmu.dev;
|
|
|
|
struct device *pdev = csdev->dev.parent;
|
|
|
|
struct dev_ext_attribute *ea;
|
|
|
|
|
|
|
|
if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
|
|
|
|
csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (csdev->ea != NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!etm_perf_up)
|
|
|
|
return -EPROBE_DEFER;
|
|
|
|
|
|
|
|
ea = devm_kzalloc(pdev, sizeof(*ea), GFP_KERNEL);
|
|
|
|
if (!ea)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
name = dev_name(pdev);
|
|
|
|
/* See function coresight_get_sink_by_id() to know where this is used */
|
|
|
|
hash = hashlen_hash(hashlen_string(NULL, name));
|
|
|
|
|
|
|
|
ea->attr.attr.name = devm_kstrdup(pdev, name, GFP_KERNEL);
|
|
|
|
if (!ea->attr.attr.name)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ea->attr.attr.mode = 0444;
|
|
|
|
ea->attr.show = etm_perf_sink_name_show;
|
|
|
|
ea->var = (unsigned long *)hash;
|
|
|
|
|
|
|
|
ret = sysfs_add_file_to_group(&pmu_dev->kobj,
|
|
|
|
&ea->attr.attr, "sinks");
|
|
|
|
|
|
|
|
if (!ret)
|
|
|
|
csdev->ea = ea;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void etm_perf_del_symlink_sink(struct coresight_device *csdev)
|
|
|
|
{
|
|
|
|
struct device *pmu_dev = etm_pmu.dev;
|
|
|
|
struct dev_ext_attribute *ea = csdev->ea;
|
|
|
|
|
|
|
|
if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
|
|
|
|
csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (!ea)
|
|
|
|
return;
|
|
|
|
|
|
|
|
sysfs_remove_file_from_group(&pmu_dev->kobj,
|
|
|
|
&ea->attr.attr, "sinks");
|
|
|
|
csdev->ea = NULL;
|
|
|
|
}
|
|
|
|
|
2016-02-18 08:52:01 +08:00
|
|
|
static int __init etm_perf_init(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2019-04-26 03:52:51 +08:00
|
|
|
etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
|
|
|
|
PERF_PMU_CAP_ITRACE);
|
2016-08-26 05:19:12 +08:00
|
|
|
|
|
|
|
etm_pmu.attr_groups = etm_pmu_attr_groups;
|
|
|
|
etm_pmu.task_ctx_nr = perf_sw_context;
|
|
|
|
etm_pmu.read = etm_event_read;
|
|
|
|
etm_pmu.event_init = etm_event_init;
|
|
|
|
etm_pmu.setup_aux = etm_setup_aux;
|
|
|
|
etm_pmu.free_aux = etm_free_aux;
|
|
|
|
etm_pmu.start = etm_event_start;
|
|
|
|
etm_pmu.stop = etm_event_stop;
|
|
|
|
etm_pmu.add = etm_event_add;
|
|
|
|
etm_pmu.del = etm_event_del;
|
|
|
|
etm_pmu.addr_filters_sync = etm_addr_filters_sync;
|
|
|
|
etm_pmu.addr_filters_validate = etm_addr_filters_validate;
|
|
|
|
etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
|
2016-02-18 08:52:01 +08:00
|
|
|
|
|
|
|
ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
|
|
|
|
if (ret == 0)
|
|
|
|
etm_perf_up = true;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2016-02-28 04:21:47 +08:00
|
|
|
device_initcall(etm_perf_init);
|