2019-05-29 22:18:01 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2010-05-11 22:05:49 +08:00
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/*
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* Copyright 2010
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* by Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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*
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* This code provides a IOMMU for Xen PV guests with PCI passthrough.
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*
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* PV guests under Xen are running in an non-contiguous memory architecture.
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*
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* When PCI pass-through is utilized, this necessitates an IOMMU for
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* translating bus (DMA) to virtual and vice-versa and also providing a
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* mechanism to have contiguous pages for device drivers operations (say DMA
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* operations).
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*
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* Specifically, under Xen the Linux idea of pages is an illusion. It
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* assumes that pages start at zero and go up to the available memory. To
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* help with that, the Linux Xen MMU provides a lookup mechanism to
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* translate the page frame numbers (PFN) to machine frame numbers (MFN)
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* and vice-versa. The MFN are the "real" frame numbers. Furthermore
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* memory is not contiguous. Xen hypervisor stitches memory for guests
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* from different pools, which means there is no guarantee that PFN==MFN
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* and PFN+1==MFN+1. Lastly with Xen 4.0, pages (in debug mode) are
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* allocated in descending order (high to low), meaning the guest might
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* never get any MFN's under the 4GB mark.
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*/
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2013-06-28 18:21:41 +08:00
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#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
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2018-10-31 06:09:21 +08:00
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#include <linux/memblock.h>
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2018-01-10 23:21:13 +08:00
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#include <linux/dma-direct.h>
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2020-09-22 21:36:11 +08:00
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#include <linux/dma-map-ops.h>
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2011-07-11 01:22:07 +08:00
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#include <linux/export.h>
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2010-05-11 22:05:49 +08:00
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#include <xen/swiotlb-xen.h>
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#include <xen/page.h>
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#include <xen/xen-ops.h>
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2011-07-23 00:46:43 +08:00
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#include <xen/hvc-console.h>
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2013-09-05 04:11:05 +08:00
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2013-10-10 21:40:44 +08:00
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#include <asm/dma-mapping.h>
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2013-10-10 21:41:10 +08:00
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#include <asm/xen/page-coherent.h>
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2013-11-09 04:36:09 +08:00
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2013-09-05 04:11:05 +08:00
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#include <trace/events/swiotlb.h>
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2019-09-02 16:39:58 +08:00
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#define MAX_DMA_BITS 32
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2010-05-11 22:05:49 +08:00
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/*
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* Quick lookup value of the bus address of the IOTLB.
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*/
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2020-07-11 06:34:25 +08:00
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static inline phys_addr_t xen_phys_to_bus(struct device *dev, phys_addr_t paddr)
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2010-05-11 22:05:49 +08:00
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{
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2015-09-09 22:18:45 +08:00
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unsigned long bfn = pfn_to_bfn(XEN_PFN_DOWN(paddr));
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2020-07-11 06:34:25 +08:00
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phys_addr_t baddr = (phys_addr_t)bfn << XEN_PAGE_SHIFT;
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2014-01-20 19:30:41 +08:00
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2020-07-11 06:34:25 +08:00
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baddr |= paddr & ~XEN_PAGE_MASK;
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return baddr;
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}
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2014-01-20 19:30:41 +08:00
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2020-07-11 06:34:25 +08:00
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static inline dma_addr_t xen_phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return phys_to_dma(dev, xen_phys_to_bus(dev, paddr));
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2010-05-11 22:05:49 +08:00
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}
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2020-07-11 06:34:25 +08:00
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static inline phys_addr_t xen_bus_to_phys(struct device *dev,
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phys_addr_t baddr)
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2010-05-11 22:05:49 +08:00
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{
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2015-09-09 22:18:45 +08:00
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unsigned long xen_pfn = bfn_to_pfn(XEN_PFN_DOWN(baddr));
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2020-07-11 06:34:25 +08:00
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phys_addr_t paddr = (xen_pfn << XEN_PAGE_SHIFT) |
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(baddr & ~XEN_PAGE_MASK);
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2014-01-20 19:30:41 +08:00
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return paddr;
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2010-05-11 22:05:49 +08:00
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}
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2020-07-11 06:34:25 +08:00
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static inline phys_addr_t xen_dma_to_phys(struct device *dev,
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dma_addr_t dma_addr)
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{
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return xen_bus_to_phys(dev, dma_to_phys(dev, dma_addr));
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}
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2019-06-14 13:46:03 +08:00
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static inline int range_straddles_page_boundary(phys_addr_t p, size_t size)
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2010-05-11 22:05:49 +08:00
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{
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2019-06-14 13:46:03 +08:00
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unsigned long next_bfn, xen_pfn = XEN_PFN_DOWN(p);
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unsigned int i, nr_pages = XEN_PFN_UP(xen_offset_in_page(p) + size);
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2010-05-11 22:05:49 +08:00
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2015-09-09 22:18:45 +08:00
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next_bfn = pfn_to_bfn(xen_pfn);
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2010-05-11 22:05:49 +08:00
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2019-06-14 13:46:03 +08:00
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for (i = 1; i < nr_pages; i++)
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2015-09-09 22:18:45 +08:00
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if (pfn_to_bfn(++xen_pfn) != ++next_bfn)
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2019-06-14 13:46:03 +08:00
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return 1;
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2010-05-11 22:05:49 +08:00
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2019-06-14 13:46:03 +08:00
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return 0;
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2010-05-11 22:05:49 +08:00
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}
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2020-07-11 06:34:23 +08:00
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static int is_xen_swiotlb_buffer(struct device *dev, dma_addr_t dma_addr)
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2010-05-11 22:05:49 +08:00
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{
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2020-07-11 06:34:25 +08:00
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unsigned long bfn = XEN_PFN_DOWN(dma_to_phys(dev, dma_addr));
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2015-09-09 22:18:45 +08:00
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unsigned long xen_pfn = bfn_to_local_pfn(bfn);
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2020-07-11 06:34:24 +08:00
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phys_addr_t paddr = (phys_addr_t)xen_pfn << XEN_PAGE_SHIFT;
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2010-05-11 22:05:49 +08:00
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/* If the address is outside our domain, it CAN
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* have the same virtual address as another address
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* in our domain. Therefore _only_ check address within our domain.
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*/
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2021-03-01 15:44:27 +08:00
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if (pfn_valid(PFN_DOWN(paddr)))
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return is_swiotlb_buffer(paddr);
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2010-05-11 22:05:49 +08:00
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return 0;
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}
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2021-03-01 15:44:33 +08:00
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static int xen_swiotlb_fixup(void *buf, unsigned long nslabs)
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2010-05-11 22:05:49 +08:00
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{
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int i, rc;
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int dma_bits;
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2013-10-10 00:56:32 +08:00
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dma_addr_t dma_handle;
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2013-10-10 21:41:10 +08:00
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phys_addr_t p = virt_to_phys(buf);
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2010-05-11 22:05:49 +08:00
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dma_bits = get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT) + PAGE_SHIFT;
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i = 0;
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do {
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int slabs = min(nslabs - i, (unsigned long)IO_TLB_SEGSIZE);
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do {
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rc = xen_create_contiguous_region(
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2013-10-10 21:41:10 +08:00
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p + (i << IO_TLB_SHIFT),
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2010-05-11 22:05:49 +08:00
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get_order(slabs << IO_TLB_SHIFT),
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2013-10-10 00:56:32 +08:00
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dma_bits, &dma_handle);
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2019-09-02 16:39:58 +08:00
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} while (rc && dma_bits++ < MAX_DMA_BITS);
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2010-05-11 22:05:49 +08:00
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if (rc)
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return rc;
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i += slabs;
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} while (i < nslabs);
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return 0;
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}
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2012-08-24 02:03:55 +08:00
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enum xen_swiotlb_err {
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XEN_SWIOTLB_UNKNOWN = 0,
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XEN_SWIOTLB_ENOMEM,
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XEN_SWIOTLB_EFIXUP
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};
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static const char *xen_swiotlb_error(enum xen_swiotlb_err err)
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{
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switch (err) {
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case XEN_SWIOTLB_ENOMEM:
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return "Cannot allocate Xen-SWIOTLB buffer\n";
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case XEN_SWIOTLB_EFIXUP:
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return "Failed to get contiguous memory for DMA from Xen!\n"\
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"You either: don't have the permissions, do not have"\
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" enough free memory under 4GB, or the hypervisor memory"\
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" is too fragmented!";
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default:
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break;
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}
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return "";
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}
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2021-03-01 15:44:29 +08:00
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#define DEFAULT_NSLABS ALIGN(SZ_64M >> IO_TLB_SHIFT, IO_TLB_SEGSIZE)
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2021-03-01 15:44:32 +08:00
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int __ref xen_swiotlb_init(void)
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2010-05-11 22:05:49 +08:00
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{
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2012-08-24 02:03:55 +08:00
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enum xen_swiotlb_err m_ret = XEN_SWIOTLB_UNKNOWN;
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2021-03-19 00:14:23 +08:00
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unsigned long bytes = swiotlb_size_or_default();
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unsigned long nslabs = bytes >> IO_TLB_SHIFT;
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unsigned int order, repeat = 3;
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2021-03-01 15:44:32 +08:00
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int rc = -ENOMEM;
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2021-03-01 15:44:30 +08:00
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char *start;
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2011-06-05 10:47:29 +08:00
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2021-05-13 04:18:23 +08:00
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if (io_tlb_default_mem != NULL) {
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pr_warn("swiotlb buffer already initialized\n");
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return -EEXIST;
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}
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2021-03-01 15:44:32 +08:00
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retry:
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m_ret = XEN_SWIOTLB_ENOMEM;
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2021-03-01 15:44:29 +08:00
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order = get_order(bytes);
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2019-05-29 06:48:22 +08:00
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2010-05-11 22:05:49 +08:00
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/*
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* Get IO TLB memory from any location.
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*/
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2012-08-24 02:36:15 +08:00
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#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
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#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
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2021-03-01 15:44:32 +08:00
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while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
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start = (void *)xen_get_swiotlb_free_pages(order);
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if (start)
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break;
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order--;
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2012-08-24 02:36:15 +08:00
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}
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2021-03-01 15:44:32 +08:00
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if (!start)
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2011-07-23 00:46:43 +08:00
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goto error;
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2021-03-01 15:44:32 +08:00
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if (order != get_order(bytes)) {
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pr_warn("Warning: only able to allocate %ld MB for software IO TLB\n",
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(PAGE_SIZE << order) >> 20);
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nslabs = SLABS_PER_PAGE << order;
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bytes = nslabs << IO_TLB_SHIFT;
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2011-07-23 00:46:43 +08:00
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}
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2021-03-01 15:44:32 +08:00
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2010-05-11 22:05:49 +08:00
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/*
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* And replace that memory with pages under 4GB.
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*/
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2021-03-01 15:44:33 +08:00
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rc = xen_swiotlb_fixup(start, nslabs);
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2011-07-23 00:46:43 +08:00
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if (rc) {
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2021-03-01 15:44:32 +08:00
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free_pages((unsigned long)start, order);
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2012-08-24 02:03:55 +08:00
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m_ret = XEN_SWIOTLB_EFIXUP;
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2010-05-11 22:05:49 +08:00
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goto error;
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2011-07-23 00:46:43 +08:00
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}
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2021-03-01 15:44:32 +08:00
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rc = swiotlb_late_init_with_tbl(start, nslabs);
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if (rc)
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return rc;
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swiotlb_set_max_segment(PAGE_SIZE);
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return 0;
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2010-05-11 22:05:49 +08:00
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error:
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2011-07-23 00:46:43 +08:00
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if (repeat--) {
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2021-03-01 15:44:32 +08:00
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/* Min is 2MB */
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nslabs = max(1024UL, (nslabs >> 1));
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2013-06-28 18:21:41 +08:00
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pr_info("Lowering to %luMB\n",
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2021-03-01 15:44:30 +08:00
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(nslabs << IO_TLB_SHIFT) >> 20);
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2011-07-23 00:46:43 +08:00
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goto retry;
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}
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2013-06-28 18:21:41 +08:00
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pr_err("%s (rc:%d)\n", xen_swiotlb_error(m_ret), rc);
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2021-03-01 15:44:32 +08:00
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free_pages((unsigned long)start, order);
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2012-08-24 02:36:15 +08:00
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return rc;
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2010-05-11 22:05:49 +08:00
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}
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2017-05-21 19:15:13 +08:00
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2021-03-01 15:44:32 +08:00
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#ifdef CONFIG_X86
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void __init xen_swiotlb_init_early(void)
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{
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2021-03-19 00:14:23 +08:00
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unsigned long bytes = swiotlb_size_or_default();
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unsigned long nslabs = bytes >> IO_TLB_SHIFT;
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2021-03-01 15:44:32 +08:00
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unsigned int repeat = 3;
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char *start;
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int rc;
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retry:
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/*
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* Get IO TLB memory from any location.
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*/
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start = memblock_alloc(PAGE_ALIGN(bytes), PAGE_SIZE);
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if (!start)
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panic("%s: Failed to allocate %lu bytes align=0x%lx\n",
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__func__, PAGE_ALIGN(bytes), PAGE_SIZE);
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/*
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* And replace that memory with pages under 4GB.
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*/
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2021-03-01 15:44:33 +08:00
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rc = xen_swiotlb_fixup(start, nslabs);
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2021-03-01 15:44:32 +08:00
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if (rc) {
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memblock_free(__pa(start), PAGE_ALIGN(bytes));
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if (repeat--) {
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/* Min is 2MB */
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nslabs = max(1024UL, (nslabs >> 1));
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2021-03-19 00:14:23 +08:00
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bytes = nslabs << IO_TLB_SHIFT;
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pr_info("Lowering to %luMB\n", bytes >> 20);
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2021-03-01 15:44:32 +08:00
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goto retry;
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}
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panic("%s (rc:%d)", xen_swiotlb_error(XEN_SWIOTLB_EFIXUP), rc);
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}
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if (swiotlb_init_with_tbl(start, nslabs, false))
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panic("Cannot allocate SWIOTLB buffer");
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swiotlb_set_max_segment(PAGE_SIZE);
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}
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#endif /* CONFIG_X86 */
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2017-05-21 19:15:13 +08:00
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static void *
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2010-05-11 22:05:49 +08:00
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xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
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2012-03-27 20:28:18 +08:00
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dma_addr_t *dma_handle, gfp_t flags,
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2016-08-04 04:46:00 +08:00
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unsigned long attrs)
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2010-05-11 22:05:49 +08:00
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{
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void *ret;
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int order = get_order(size);
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u64 dma_mask = DMA_BIT_MASK(32);
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2011-08-26 04:13:54 +08:00
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phys_addr_t phys;
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dma_addr_t dev_addr;
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2010-05-11 22:05:49 +08:00
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/*
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* Ignore region specifiers - the kernel's ideas of
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* pseudo-phys memory layout has nothing to do with the
|
|
|
|
* machine physical layout. We can't allocate highmem
|
|
|
|
* because we can't return a pointer to it.
|
|
|
|
*/
|
|
|
|
flags &= ~(__GFP_DMA | __GFP_HIGHMEM);
|
|
|
|
|
2018-10-17 06:21:16 +08:00
|
|
|
/* Convert the size to actually allocated. */
|
|
|
|
size = 1UL << (order + XEN_PAGE_SHIFT);
|
|
|
|
|
2013-10-10 21:41:10 +08:00
|
|
|
/* On ARM this function returns an ioremap'ped virtual address for
|
|
|
|
* which virt_to_phys doesn't return the corresponding physical
|
|
|
|
* address. In fact on ARM virt_to_phys only works for kernel direct
|
|
|
|
* mapped RAM memory. Also see comment below.
|
|
|
|
*/
|
|
|
|
ret = xen_alloc_coherent_pages(hwdev, size, dma_handle, flags, attrs);
|
2010-05-11 22:05:49 +08:00
|
|
|
|
2011-08-26 04:13:54 +08:00
|
|
|
if (!ret)
|
|
|
|
return ret;
|
|
|
|
|
2010-05-11 22:05:49 +08:00
|
|
|
if (hwdev && hwdev->coherent_dma_mask)
|
2018-03-19 18:38:14 +08:00
|
|
|
dma_mask = hwdev->coherent_dma_mask;
|
2010-05-11 22:05:49 +08:00
|
|
|
|
2020-07-11 06:34:25 +08:00
|
|
|
/* At this point dma_handle is the dma address, next we are
|
2013-10-10 21:41:10 +08:00
|
|
|
* going to set it to the machine address.
|
|
|
|
* Do not use virt_to_phys(ret) because on ARM it doesn't correspond
|
|
|
|
* to *dma_handle. */
|
2020-07-11 06:34:25 +08:00
|
|
|
phys = dma_to_phys(hwdev, *dma_handle);
|
|
|
|
dev_addr = xen_phys_to_dma(hwdev, phys);
|
2011-08-26 04:13:54 +08:00
|
|
|
if (((dev_addr + size - 1 <= dma_mask)) &&
|
|
|
|
!range_straddles_page_boundary(phys, size))
|
|
|
|
*dma_handle = dev_addr;
|
|
|
|
else {
|
2013-10-10 21:41:10 +08:00
|
|
|
if (xen_create_contiguous_region(phys, order,
|
2013-10-10 00:56:32 +08:00
|
|
|
fls64(dma_mask), dma_handle) != 0) {
|
2013-10-10 21:41:10 +08:00
|
|
|
xen_free_coherent_pages(hwdev, size, ret, (dma_addr_t)phys, attrs);
|
2010-05-11 22:05:49 +08:00
|
|
|
return NULL;
|
|
|
|
}
|
2020-07-11 06:34:25 +08:00
|
|
|
*dma_handle = phys_to_dma(hwdev, *dma_handle);
|
2019-06-14 13:46:04 +08:00
|
|
|
SetPageXenRemapped(virt_to_page(ret));
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
2011-08-26 04:13:54 +08:00
|
|
|
memset(ret, 0, size);
|
2010-05-11 22:05:49 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2017-05-21 19:15:13 +08:00
|
|
|
static void
|
2010-05-11 22:05:49 +08:00
|
|
|
xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
|
2016-08-04 04:46:00 +08:00
|
|
|
dma_addr_t dev_addr, unsigned long attrs)
|
2010-05-11 22:05:49 +08:00
|
|
|
{
|
|
|
|
int order = get_order(size);
|
2011-08-26 04:13:54 +08:00
|
|
|
phys_addr_t phys;
|
|
|
|
u64 dma_mask = DMA_BIT_MASK(32);
|
2020-07-11 06:34:17 +08:00
|
|
|
struct page *page;
|
2010-05-11 22:05:49 +08:00
|
|
|
|
2011-08-26 04:13:54 +08:00
|
|
|
if (hwdev && hwdev->coherent_dma_mask)
|
|
|
|
dma_mask = hwdev->coherent_dma_mask;
|
|
|
|
|
2013-10-10 21:41:10 +08:00
|
|
|
/* do not use virt_to_phys because on ARM it doesn't return you the
|
|
|
|
* physical address */
|
2020-07-11 06:34:25 +08:00
|
|
|
phys = xen_dma_to_phys(hwdev, dev_addr);
|
2011-08-26 04:13:54 +08:00
|
|
|
|
2018-10-17 06:21:16 +08:00
|
|
|
/* Convert the size to actually allocated. */
|
|
|
|
size = 1UL << (order + XEN_PAGE_SHIFT);
|
|
|
|
|
2020-07-11 06:34:17 +08:00
|
|
|
if (is_vmalloc_addr(vaddr))
|
|
|
|
page = vmalloc_to_page(vaddr);
|
|
|
|
else
|
|
|
|
page = virt_to_page(vaddr);
|
|
|
|
|
2019-06-14 13:46:02 +08:00
|
|
|
if (!WARN_ON((dev_addr + size - 1 > dma_mask) ||
|
2019-06-14 13:46:04 +08:00
|
|
|
range_straddles_page_boundary(phys, size)) &&
|
2020-07-11 06:34:17 +08:00
|
|
|
TestClearPageXenRemapped(page))
|
2013-10-10 21:41:10 +08:00
|
|
|
xen_destroy_contiguous_region(phys, order);
|
2011-08-26 04:13:54 +08:00
|
|
|
|
2020-07-11 06:34:25 +08:00
|
|
|
xen_free_coherent_pages(hwdev, size, vaddr, phys_to_dma(hwdev, phys),
|
|
|
|
attrs);
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Map a single buffer of the indicated size for DMA in streaming mode. The
|
|
|
|
* physical address to use is returned.
|
|
|
|
*
|
|
|
|
* Once the device is given the dma address, the device owns this memory until
|
|
|
|
* either xen_swiotlb_unmap_page or xen_swiotlb_dma_sync_single is performed.
|
|
|
|
*/
|
2017-05-21 19:15:13 +08:00
|
|
|
static dma_addr_t xen_swiotlb_map_page(struct device *dev, struct page *page,
|
2010-05-11 22:05:49 +08:00
|
|
|
unsigned long offset, size_t size,
|
|
|
|
enum dma_data_direction dir,
|
2016-08-04 04:46:00 +08:00
|
|
|
unsigned long attrs)
|
2010-05-11 22:05:49 +08:00
|
|
|
{
|
2012-10-16 01:19:39 +08:00
|
|
|
phys_addr_t map, phys = page_to_phys(page) + offset;
|
2020-07-11 06:34:25 +08:00
|
|
|
dma_addr_t dev_addr = xen_phys_to_dma(dev, phys);
|
2010-05-11 22:05:49 +08:00
|
|
|
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
/*
|
|
|
|
* If the address happens to be in the device's DMA window,
|
|
|
|
* we can safely return the device addr and not worry about bounce
|
|
|
|
* buffering it.
|
|
|
|
*/
|
2019-11-20 00:38:58 +08:00
|
|
|
if (dma_capable(dev, dev_addr, size, true) &&
|
2014-11-21 19:07:39 +08:00
|
|
|
!range_straddles_page_boundary(phys, size) &&
|
2015-09-09 22:17:33 +08:00
|
|
|
!xen_arch_need_swiotlb(dev, phys, dev_addr) &&
|
2019-04-11 15:20:00 +08:00
|
|
|
swiotlb_force != SWIOTLB_FORCE)
|
|
|
|
goto done;
|
2010-05-11 22:05:49 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Oh well, have to allocate and map a bounce buffer.
|
|
|
|
*/
|
2013-09-05 04:11:05 +08:00
|
|
|
trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
|
|
|
|
|
2020-10-23 14:33:09 +08:00
|
|
|
map = swiotlb_tbl_map_single(dev, phys, size, size, dir, attrs);
|
2019-06-17 21:28:43 +08:00
|
|
|
if (map == (phys_addr_t)DMA_MAPPING_ERROR)
|
2018-11-22 02:38:19 +08:00
|
|
|
return DMA_MAPPING_ERROR;
|
2010-05-11 22:05:49 +08:00
|
|
|
|
2019-09-05 16:04:30 +08:00
|
|
|
phys = map;
|
2020-07-11 06:34:25 +08:00
|
|
|
dev_addr = xen_phys_to_dma(dev, map);
|
2010-05-11 22:05:49 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Ensure that the address returned is DMA'ble
|
|
|
|
*/
|
2019-11-20 00:38:58 +08:00
|
|
|
if (unlikely(!dma_capable(dev, dev_addr, size, true))) {
|
2021-03-01 15:44:24 +08:00
|
|
|
swiotlb_tbl_unmap_single(dev, map, size, dir,
|
2019-04-11 15:20:00 +08:00
|
|
|
attrs | DMA_ATTR_SKIP_CPU_SYNC);
|
|
|
|
return DMA_MAPPING_ERROR;
|
|
|
|
}
|
2016-11-02 19:12:47 +08:00
|
|
|
|
2019-04-11 15:20:00 +08:00
|
|
|
done:
|
2020-07-11 06:34:26 +08:00
|
|
|
if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) {
|
|
|
|
if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dev_addr))))
|
|
|
|
arch_sync_dma_for_device(phys, size, dir);
|
|
|
|
else
|
|
|
|
xen_dma_sync_for_device(dev, dev_addr, size, dir);
|
|
|
|
}
|
2019-04-11 15:20:00 +08:00
|
|
|
return dev_addr;
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Unmap a single streaming mode DMA translation. The dma_addr and size must
|
|
|
|
* match what was provided for in a previous xen_swiotlb_map_page call. All
|
|
|
|
* other usages are undefined.
|
|
|
|
*
|
|
|
|
* After this call, reads by the cpu to the buffer are guaranteed to see
|
|
|
|
* whatever the device wrote there.
|
|
|
|
*/
|
2019-07-24 22:18:41 +08:00
|
|
|
static void xen_swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
|
|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
2010-05-11 22:05:49 +08:00
|
|
|
{
|
2020-07-11 06:34:25 +08:00
|
|
|
phys_addr_t paddr = xen_dma_to_phys(hwdev, dev_addr);
|
2010-05-11 22:05:49 +08:00
|
|
|
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
|
2020-07-11 06:34:26 +08:00
|
|
|
if (!dev_is_dma_coherent(hwdev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) {
|
|
|
|
if (pfn_valid(PFN_DOWN(dma_to_phys(hwdev, dev_addr))))
|
|
|
|
arch_sync_dma_for_cpu(paddr, size, dir);
|
|
|
|
else
|
|
|
|
xen_dma_sync_for_cpu(hwdev, dev_addr, size, dir);
|
|
|
|
}
|
2013-10-25 18:33:25 +08:00
|
|
|
|
2010-05-11 22:05:49 +08:00
|
|
|
/* NOTE: We use dev_addr here, not paddr! */
|
2020-07-11 06:34:23 +08:00
|
|
|
if (is_xen_swiotlb_buffer(hwdev, dev_addr))
|
2021-03-01 15:44:24 +08:00
|
|
|
swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs);
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2019-04-11 15:19:59 +08:00
|
|
|
xen_swiotlb_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr,
|
|
|
|
size_t size, enum dma_data_direction dir)
|
2010-05-11 22:05:49 +08:00
|
|
|
{
|
2020-07-11 06:34:25 +08:00
|
|
|
phys_addr_t paddr = xen_dma_to_phys(dev, dma_addr);
|
2013-10-25 18:33:25 +08:00
|
|
|
|
2020-07-11 06:34:26 +08:00
|
|
|
if (!dev_is_dma_coherent(dev)) {
|
|
|
|
if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dma_addr))))
|
|
|
|
arch_sync_dma_for_cpu(paddr, size, dir);
|
|
|
|
else
|
|
|
|
xen_dma_sync_for_cpu(dev, dma_addr, size, dir);
|
|
|
|
}
|
2013-10-25 18:33:25 +08:00
|
|
|
|
2020-07-11 06:34:23 +08:00
|
|
|
if (is_xen_swiotlb_buffer(dev, dma_addr))
|
2021-03-01 15:44:26 +08:00
|
|
|
swiotlb_sync_single_for_cpu(dev, paddr, size, dir);
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
|
|
|
|
2019-04-11 15:19:59 +08:00
|
|
|
static void
|
|
|
|
xen_swiotlb_sync_single_for_device(struct device *dev, dma_addr_t dma_addr,
|
|
|
|
size_t size, enum dma_data_direction dir)
|
2010-05-11 22:05:49 +08:00
|
|
|
{
|
2020-07-11 06:34:25 +08:00
|
|
|
phys_addr_t paddr = xen_dma_to_phys(dev, dma_addr);
|
2010-05-11 22:05:49 +08:00
|
|
|
|
2020-07-11 06:34:23 +08:00
|
|
|
if (is_xen_swiotlb_buffer(dev, dma_addr))
|
2021-03-01 15:44:26 +08:00
|
|
|
swiotlb_sync_single_for_device(dev, paddr, size, dir);
|
2019-04-11 15:19:59 +08:00
|
|
|
|
2020-07-11 06:34:26 +08:00
|
|
|
if (!dev_is_dma_coherent(dev)) {
|
|
|
|
if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dma_addr))))
|
|
|
|
arch_sync_dma_for_device(paddr, size, dir);
|
|
|
|
else
|
|
|
|
xen_dma_sync_for_device(dev, dma_addr, size, dir);
|
|
|
|
}
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
2017-05-21 19:15:13 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Unmap a set of streaming mode DMA translations. Again, cpu read rules
|
|
|
|
* concerning calls here are the same as for swiotlb_unmap_page() above.
|
|
|
|
*/
|
|
|
|
static void
|
2019-04-11 15:19:57 +08:00
|
|
|
xen_swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
|
|
|
|
enum dma_data_direction dir, unsigned long attrs)
|
2017-05-21 19:15:13 +08:00
|
|
|
{
|
|
|
|
struct scatterlist *sg;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
|
|
|
|
for_each_sg(sgl, sg, nelems, i)
|
2019-07-24 22:18:41 +08:00
|
|
|
xen_swiotlb_unmap_page(hwdev, sg->dma_address, sg_dma_len(sg),
|
|
|
|
dir, attrs);
|
2017-05-21 19:15:13 +08:00
|
|
|
|
|
|
|
}
|
2010-05-11 22:05:49 +08:00
|
|
|
|
2017-05-21 19:15:13 +08:00
|
|
|
static int
|
2019-04-11 15:19:58 +08:00
|
|
|
xen_swiotlb_map_sg(struct device *dev, struct scatterlist *sgl, int nelems,
|
2019-04-11 15:19:57 +08:00
|
|
|
enum dma_data_direction dir, unsigned long attrs)
|
2010-05-11 22:05:49 +08:00
|
|
|
{
|
|
|
|
struct scatterlist *sg;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
BUG_ON(dir == DMA_NONE);
|
|
|
|
|
|
|
|
for_each_sg(sgl, sg, nelems, i) {
|
2019-04-11 15:19:58 +08:00
|
|
|
sg->dma_address = xen_swiotlb_map_page(dev, sg_page(sg),
|
|
|
|
sg->offset, sg->length, dir, attrs);
|
|
|
|
if (sg->dma_address == DMA_MAPPING_ERROR)
|
|
|
|
goto out_unmap;
|
2013-08-06 00:30:48 +08:00
|
|
|
sg_dma_len(sg) = sg->length;
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
2019-04-11 15:19:58 +08:00
|
|
|
|
2010-05-11 22:05:49 +08:00
|
|
|
return nelems;
|
2019-04-11 15:19:58 +08:00
|
|
|
out_unmap:
|
|
|
|
xen_swiotlb_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
|
|
|
|
sg_dma_len(sgl) = 0;
|
|
|
|
return 0;
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2019-04-11 15:19:59 +08:00
|
|
|
xen_swiotlb_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
|
|
|
|
int nelems, enum dma_data_direction dir)
|
2010-05-11 22:05:49 +08:00
|
|
|
{
|
|
|
|
struct scatterlist *sg;
|
|
|
|
int i;
|
|
|
|
|
2019-04-11 15:19:59 +08:00
|
|
|
for_each_sg(sgl, sg, nelems, i) {
|
|
|
|
xen_swiotlb_sync_single_for_cpu(dev, sg->dma_address,
|
|
|
|
sg->length, dir);
|
|
|
|
}
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
|
|
|
|
2017-05-21 19:15:13 +08:00
|
|
|
static void
|
2019-04-11 15:19:59 +08:00
|
|
|
xen_swiotlb_sync_sg_for_device(struct device *dev, struct scatterlist *sgl,
|
2010-05-11 22:05:49 +08:00
|
|
|
int nelems, enum dma_data_direction dir)
|
|
|
|
{
|
2019-04-11 15:19:59 +08:00
|
|
|
struct scatterlist *sg;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for_each_sg(sgl, sg, nelems, i) {
|
|
|
|
xen_swiotlb_sync_single_for_device(dev, sg->dma_address,
|
|
|
|
sg->length, dir);
|
|
|
|
}
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Return whether the given device DMA address mask can be supported
|
|
|
|
* properly. For example, if your device can only drive the low 24-bits
|
|
|
|
* during bus mastering, then you would pass 0x00ffffff as the mask to
|
|
|
|
* this function.
|
|
|
|
*/
|
2017-05-21 19:15:13 +08:00
|
|
|
static int
|
2010-05-11 22:05:49 +08:00
|
|
|
xen_swiotlb_dma_supported(struct device *hwdev, u64 mask)
|
|
|
|
{
|
2021-03-19 00:14:23 +08:00
|
|
|
return xen_phys_to_dma(hwdev, io_tlb_default_mem->end - 1) <= mask;
|
2010-05-11 22:05:49 +08:00
|
|
|
}
|
2013-10-10 00:56:33 +08:00
|
|
|
|
2017-05-21 19:15:13 +08:00
|
|
|
const struct dma_map_ops xen_swiotlb_dma_ops = {
|
|
|
|
.alloc = xen_swiotlb_alloc_coherent,
|
|
|
|
.free = xen_swiotlb_free_coherent,
|
|
|
|
.sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu,
|
|
|
|
.sync_single_for_device = xen_swiotlb_sync_single_for_device,
|
|
|
|
.sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu,
|
|
|
|
.sync_sg_for_device = xen_swiotlb_sync_sg_for_device,
|
2019-04-11 15:19:57 +08:00
|
|
|
.map_sg = xen_swiotlb_map_sg,
|
|
|
|
.unmap_sg = xen_swiotlb_unmap_sg,
|
2017-05-21 19:15:13 +08:00
|
|
|
.map_page = xen_swiotlb_map_page,
|
|
|
|
.unmap_page = xen_swiotlb_unmap_page,
|
|
|
|
.dma_supported = xen_swiotlb_dma_supported,
|
2019-09-02 16:45:39 +08:00
|
|
|
.mmap = dma_common_mmap,
|
|
|
|
.get_sgtable = dma_common_get_sgtable,
|
2020-09-01 19:34:33 +08:00
|
|
|
.alloc_pages = dma_common_alloc_pages,
|
|
|
|
.free_pages = dma_common_free_pages,
|
2017-05-21 19:15:13 +08:00
|
|
|
};
|