2012-11-20 01:46:10 +08:00
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/*
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2013-08-03 04:12:21 +08:00
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* Copyright (C) 2012-2013 Broadcom Corporation
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2012-11-20 01:46:10 +08:00
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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2013-06-06 13:41:35 +08:00
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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2013-06-06 13:41:34 +08:00
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#include "skeleton.dtsi"
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2012-11-20 01:46:10 +08:00
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/ {
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model = "BCM11351 SoC";
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,bcm11351";
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2012-11-20 01:46:10 +08:00
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interrupt-parent = <&gic>;
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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gic: interrupt-controller@3ff00100 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x3ff01000 0x1000>,
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<0x3ff00100 0x100>;
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};
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2013-03-14 06:05:37 +08:00
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smc@0x3404c000 {
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
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2013-06-12 02:45:58 +08:00
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reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
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2013-03-14 06:05:37 +08:00
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};
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2012-11-20 01:46:10 +08:00
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uart@3e000000 {
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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2012-11-20 01:46:10 +08:00
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status = "disabled";
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reg = <0x3e000000 0x1000>;
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2013-12-06 03:20:38 +08:00
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clocks = <&uartb_clk>;
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2013-06-06 13:41:35 +08:00
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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2012-11-20 01:46:10 +08:00
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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2013-09-24 01:49:57 +08:00
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uart@3e001000 {
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e001000 0x1000>;
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2013-12-06 03:20:38 +08:00
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clocks = <&uartb2_clk>;
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2013-09-24 01:49:57 +08:00
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uart@3e002000 {
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e002000 0x1000>;
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2013-12-06 03:20:38 +08:00
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clocks = <&uartb3_clk>;
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2013-09-24 01:49:57 +08:00
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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uart@3e003000 {
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e003000 0x1000>;
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2013-12-06 03:20:38 +08:00
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clocks = <&uartb4_clk>;
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2013-09-24 01:49:57 +08:00
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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2012-11-20 01:46:10 +08:00
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L2: l2-cache {
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,bcm11351-a2-pl310-cache";
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2013-05-10 05:21:01 +08:00
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reg = <0x3ff20000 0x1000>;
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cache-unified;
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cache-level = <2>;
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2012-11-20 01:46:10 +08:00
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};
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2013-03-14 05:27:28 +08:00
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2013-08-03 04:12:21 +08:00
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watchdog@35002f40 {
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compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
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reg = <0x35002f40 0x6c>;
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};
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2013-03-14 05:27:28 +08:00
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timer@35006000 {
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,kona-timer";
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2013-03-14 05:27:28 +08:00
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reg = <0x35006000 0x1000>;
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2013-06-06 13:41:35 +08:00
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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2013-12-06 03:20:44 +08:00
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clocks = <&hub_timer_clk>;
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2013-03-14 05:27:28 +08:00
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};
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2013-09-11 02:07:03 +08:00
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gpio: gpio@35003000 {
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compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
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reg = <0x35003000 0x800>;
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interrupts =
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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2013-08-08 13:37:47 +08:00
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sdio1: sdio@3f180000 {
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,kona-sdhci";
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2013-05-10 15:10:07 +08:00
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reg = <0x3f180000 0x10000>;
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2013-09-20 01:18:26 +08:00
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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2013-12-06 03:20:40 +08:00
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clocks = <&sdio1_clk>;
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2013-05-10 15:10:07 +08:00
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status = "disabled";
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};
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2013-08-08 13:37:47 +08:00
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sdio2: sdio@3f190000 {
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,kona-sdhci";
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2013-05-10 15:10:07 +08:00
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reg = <0x3f190000 0x10000>;
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2013-09-20 01:18:26 +08:00
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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2013-12-06 03:20:40 +08:00
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clocks = <&sdio2_clk>;
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2013-05-10 15:10:07 +08:00
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status = "disabled";
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};
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2013-08-08 13:37:47 +08:00
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sdio3: sdio@3f1a0000 {
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,kona-sdhci";
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2013-05-10 15:10:07 +08:00
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reg = <0x3f1a0000 0x10000>;
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2013-09-20 01:18:26 +08:00
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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2013-12-06 03:20:40 +08:00
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clocks = <&sdio3_clk>;
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2013-05-10 15:10:07 +08:00
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status = "disabled";
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};
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2013-08-08 13:37:47 +08:00
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sdio4: sdio@3f1b0000 {
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2013-07-31 07:27:10 +08:00
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compatible = "brcm,kona-sdhci";
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2013-05-10 15:10:07 +08:00
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reg = <0x3f1b0000 0x10000>;
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2013-09-20 01:18:26 +08:00
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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2013-12-06 03:20:40 +08:00
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clocks = <&sdio4_clk>;
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2013-05-10 15:10:07 +08:00
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status = "disabled";
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};
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2013-12-07 07:45:27 +08:00
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i2c@3e016000 {
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compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
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reg = <0x3e016000 0x80>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc1_clk>;
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status = "disabled";
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};
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i2c@3e017000 {
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compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
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reg = <0x3e017000 0x80>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc2_clk>;
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status = "disabled";
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};
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i2c@3e018000 {
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compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
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reg = <0x3e018000 0x80>;
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interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc3_clk>;
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status = "disabled";
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};
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i2c@3500d000 {
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compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
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reg = <0x3500d000 0x80>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&pmu_bsc_clk>;
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status = "disabled";
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};
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2013-12-06 03:20:37 +08:00
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clocks {
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bsc1_clk: bsc1 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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bsc2_clk: bsc2 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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bsc3_clk: bsc3 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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pmu_bsc_clk: pmu_bsc {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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hub_timer_clk: hub_timer {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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#clock-cells = <0>;
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};
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pwm_clk: pwm {
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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#clock-cells = <0>;
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};
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sdio1_clk: sdio1 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio2_clk: sdio2 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio3_clk: sdio3 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio4_clk: sdio4 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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tmon_1m_clk: tmon_1m {
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compatible = "fixed-clock";
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clock-frequency = <1000000>;
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#clock-cells = <0>;
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};
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uartb_clk: uartb {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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uartb2_clk: uartb2 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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uartb3_clk: uartb3 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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uartb4_clk: uartb4 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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usb_otg_ahb_clk: usb_otg_ahb {
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
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#clock-cells = <0>;
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};
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};
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2012-11-20 01:46:10 +08:00
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};
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