2013-07-24 14:15:29 +08:00
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/*
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2013-10-15 10:44:54 +08:00
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* copyright (c) 2013 Freescale Semiconductor, Inc.
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2013-07-24 14:15:29 +08:00
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* Freescale IMX AHCI SATA platform driver
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*
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* based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/ahci_platform.h>
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#include <linux/of_device.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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2013-10-15 10:44:54 +08:00
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#include <linux/libata.h>
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2013-07-24 14:15:29 +08:00
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#include "ahci.h"
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enum {
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2013-10-15 10:44:54 +08:00
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PORT_PHY_CTL = 0x178, /* Port0 PHY Control */
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PORT_PHY_CTL_PDDQ_LOC = 0x100000, /* PORT_PHY_CTL bits */
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HOST_TIMER1MS = 0xe0, /* Timer 1-ms */
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2013-07-24 14:15:29 +08:00
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};
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2013-11-25 16:47:02 +08:00
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enum ahci_imx_type {
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AHCI_IMX53,
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AHCI_IMX6Q,
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};
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2013-07-24 14:15:29 +08:00
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struct imx_ahci_priv {
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struct platform_device *ahci_pdev;
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2013-11-25 16:47:02 +08:00
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enum ahci_imx_type type;
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2013-07-24 14:15:29 +08:00
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struct clk *ahb_clk;
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struct regmap *gpr;
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2013-10-15 10:44:54 +08:00
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bool no_device;
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bool first_time;
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};
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static int ahci_imx_hotplug;
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module_param_named(hotplug, ahci_imx_hotplug, int, 0644);
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MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
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2014-02-22 23:53:37 +08:00
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static void ahci_imx_host_stop(struct ata_host *host);
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static int imx_sata_enable(struct ahci_host_priv *hpriv)
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2013-11-25 16:47:01 +08:00
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{
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2014-02-22 23:53:37 +08:00
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struct imx_ahci_priv *imxpriv = hpriv->plat_data;
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2013-11-25 16:47:01 +08:00
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int ret;
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2014-02-22 23:53:37 +08:00
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if (imxpriv->no_device)
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return 0;
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if (hpriv->target_pwr) {
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ret = regulator_enable(hpriv->target_pwr);
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if (ret)
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2013-11-25 16:47:02 +08:00
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return ret;
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}
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2014-02-22 23:53:37 +08:00
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ret = ahci_platform_enable_clks(hpriv);
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if (ret < 0)
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goto disable_regulator;
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2013-11-25 16:47:01 +08:00
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2013-11-25 16:47:02 +08:00
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if (imxpriv->type == AHCI_IMX6Q) {
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2014-02-22 23:53:37 +08:00
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/*
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* set PHY Paremeters, two steps to configure the GPR13,
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* one write for rest of parameters, mask of first write
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* is 0x07ffffff, and the other one write for setting
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* the mpll_clk_en.
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*/
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK |
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IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK |
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IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK |
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IMX6Q_GPR13_SATA_SPD_MODE_MASK |
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IMX6Q_GPR13_SATA_MPLL_SS_EN |
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IMX6Q_GPR13_SATA_TX_ATTEN_MASK |
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IMX6Q_GPR13_SATA_TX_BOOST_MASK |
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IMX6Q_GPR13_SATA_TX_LVL_MASK |
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IMX6Q_GPR13_SATA_MPLL_CLK_EN |
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IMX6Q_GPR13_SATA_TX_EDGE_RATE,
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IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB |
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IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M |
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IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F |
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IMX6Q_GPR13_SATA_SPD_MODE_3P0G |
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IMX6Q_GPR13_SATA_MPLL_SS_EN |
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IMX6Q_GPR13_SATA_TX_ATTEN_9_16 |
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IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB |
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IMX6Q_GPR13_SATA_TX_LVL_1_025_V);
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2013-11-25 16:47:02 +08:00
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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}
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2013-11-25 16:47:01 +08:00
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usleep_range(1000, 2000);
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return 0;
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2013-11-25 16:47:02 +08:00
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2014-02-22 23:53:37 +08:00
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disable_regulator:
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if (hpriv->target_pwr)
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regulator_disable(hpriv->target_pwr);
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2013-11-25 16:47:02 +08:00
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return ret;
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2013-11-25 16:47:01 +08:00
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}
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2014-02-22 23:53:37 +08:00
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static void imx_sata_disable(struct ahci_host_priv *hpriv)
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2013-11-25 16:47:01 +08:00
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{
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2014-02-22 23:53:37 +08:00
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struct imx_ahci_priv *imxpriv = hpriv->plat_data;
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if (imxpriv->no_device)
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return;
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2013-11-25 16:47:01 +08:00
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2013-11-25 16:47:02 +08:00
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if (imxpriv->type == AHCI_IMX6Q) {
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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}
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2014-02-22 23:53:37 +08:00
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ahci_platform_disable_clks(hpriv);
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2013-11-25 16:47:02 +08:00
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2014-02-22 23:53:37 +08:00
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if (hpriv->target_pwr)
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regulator_disable(hpriv->target_pwr);
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2013-11-25 16:47:01 +08:00
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}
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2013-10-15 10:44:54 +08:00
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static void ahci_imx_error_handler(struct ata_port *ap)
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{
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u32 reg_val;
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struct ata_device *dev;
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struct ata_host *host = dev_get_drvdata(ap->dev);
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struct ahci_host_priv *hpriv = host->private_data;
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void __iomem *mmio = hpriv->mmio;
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2014-02-22 23:53:37 +08:00
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struct imx_ahci_priv *imxpriv = hpriv->plat_data;
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2013-10-15 10:44:54 +08:00
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ahci_error_handler(ap);
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if (!(imxpriv->first_time) || ahci_imx_hotplug)
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return;
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imxpriv->first_time = false;
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ata_for_each_dev(dev, &ap->link, ENABLED)
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return;
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/*
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* Disable link to save power. An imx ahci port can't be recovered
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* without full reset once the pddq mode is enabled making it
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* impossible to use as part of libata LPM.
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*/
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reg_val = readl(mmio + PORT_PHY_CTL);
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writel(reg_val | PORT_PHY_CTL_PDDQ_LOC, mmio + PORT_PHY_CTL);
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2014-02-22 23:53:37 +08:00
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imx_sata_disable(hpriv);
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2013-10-15 10:44:54 +08:00
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imxpriv->no_device = true;
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}
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2013-12-03 23:25:37 +08:00
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static int ahci_imx_softreset(struct ata_link *link, unsigned int *class,
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2013-11-25 16:47:02 +08:00
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unsigned long deadline)
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{
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struct ata_port *ap = link->ap;
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2014-02-22 23:53:37 +08:00
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struct ata_host *host = dev_get_drvdata(ap->dev);
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struct ahci_host_priv *hpriv = host->private_data;
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struct imx_ahci_priv *imxpriv = hpriv->plat_data;
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2013-11-25 16:47:02 +08:00
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int ret = -EIO;
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if (imxpriv->type == AHCI_IMX53)
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ret = ahci_pmp_retry_srst_ops.softreset(link, class, deadline);
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else if (imxpriv->type == AHCI_IMX6Q)
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ret = ahci_ops.softreset(link, class, deadline);
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return ret;
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}
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2013-10-15 10:44:54 +08:00
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static struct ata_port_operations ahci_imx_ops = {
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2014-02-22 23:53:37 +08:00
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.inherits = &ahci_ops,
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.host_stop = ahci_imx_host_stop,
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2013-10-15 10:44:54 +08:00
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.error_handler = ahci_imx_error_handler,
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2013-11-25 16:47:02 +08:00
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.softreset = ahci_imx_softreset,
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2013-10-15 10:44:54 +08:00
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};
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static const struct ata_port_info ahci_imx_port_info = {
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.flags = AHCI_FLAG_COMMON,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_imx_ops,
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2013-07-24 14:15:29 +08:00
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};
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static const struct of_device_id imx_ahci_of_match[] = {
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2013-11-25 16:47:02 +08:00
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{ .compatible = "fsl,imx53-ahci", .data = (void *)AHCI_IMX53 },
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{ .compatible = "fsl,imx6q-ahci", .data = (void *)AHCI_IMX6Q },
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2013-07-24 14:15:29 +08:00
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{},
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};
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MODULE_DEVICE_TABLE(of, imx_ahci_of_match);
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static int imx_ahci_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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const struct of_device_id *of_id;
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2014-02-22 23:53:37 +08:00
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struct ahci_host_priv *hpriv;
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2013-07-24 14:15:29 +08:00
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struct imx_ahci_priv *imxpriv;
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2014-02-22 23:53:37 +08:00
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unsigned int reg_val;
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2013-07-24 14:15:29 +08:00
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int ret;
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2013-11-25 16:47:02 +08:00
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of_id = of_match_device(imx_ahci_of_match, dev);
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if (!of_id)
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return -EINVAL;
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2013-07-24 14:15:29 +08:00
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imxpriv = devm_kzalloc(dev, sizeof(*imxpriv), GFP_KERNEL);
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2014-02-22 23:53:37 +08:00
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if (!imxpriv)
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2013-07-24 14:15:29 +08:00
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return -ENOMEM;
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2013-10-15 10:44:54 +08:00
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imxpriv->no_device = false;
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imxpriv->first_time = true;
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2014-02-22 23:53:37 +08:00
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imxpriv->type = (enum ahci_imx_type)of_id->data;
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2013-07-24 14:15:29 +08:00
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imxpriv->ahb_clk = devm_clk_get(dev, "ahb");
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if (IS_ERR(imxpriv->ahb_clk)) {
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dev_err(dev, "can't get ahb clock.\n");
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2014-02-22 23:53:37 +08:00
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return PTR_ERR(imxpriv->ahb_clk);
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2013-07-24 14:15:29 +08:00
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}
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2014-02-22 23:53:37 +08:00
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if (imxpriv->type == AHCI_IMX6Q) {
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imxpriv->gpr = syscon_regmap_lookup_by_compatible(
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"fsl,imx6q-iomuxc-gpr");
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if (IS_ERR(imxpriv->gpr)) {
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dev_err(dev,
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"failed to find fsl,imx6q-iomux-gpr regmap\n");
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return PTR_ERR(imxpriv->gpr);
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2013-11-25 16:47:02 +08:00
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}
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}
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2014-02-22 23:53:37 +08:00
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hpriv = ahci_platform_get_resources(pdev);
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if (IS_ERR(hpriv))
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return PTR_ERR(hpriv);
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hpriv->plat_data = imxpriv;
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2013-07-24 14:15:29 +08:00
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2014-02-22 23:53:37 +08:00
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ret = imx_sata_enable(hpriv);
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if (ret)
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return ret;
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2013-07-24 14:15:29 +08:00
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2014-02-22 23:53:37 +08:00
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/*
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* Configure the HWINIT bits of the HOST_CAP and HOST_PORTS_IMPL,
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* and IP vendor specific register HOST_TIMER1MS.
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* Configure CAP_SSS (support stagered spin up).
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* Implement the port0.
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* Get the ahb clock rate, and configure the TIMER1MS register.
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*/
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reg_val = readl(hpriv->mmio + HOST_CAP);
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if (!(reg_val & HOST_CAP_SSS)) {
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reg_val |= HOST_CAP_SSS;
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writel(reg_val, hpriv->mmio + HOST_CAP);
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}
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reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);
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if (!(reg_val & 0x1)) {
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reg_val |= 0x1;
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writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);
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2013-07-24 14:15:29 +08:00
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}
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2014-02-22 23:53:37 +08:00
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reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000;
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writel(reg_val, hpriv->mmio + HOST_TIMER1MS);
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2013-07-24 14:15:29 +08:00
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2014-02-22 23:53:37 +08:00
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ret = ahci_platform_init_host(pdev, hpriv, &ahci_imx_port_info, 0, 0);
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if (ret)
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imx_sata_disable(hpriv);
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2013-07-24 14:15:29 +08:00
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2014-02-22 23:53:37 +08:00
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return ret;
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}
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2013-11-25 16:47:02 +08:00
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2014-02-22 23:53:37 +08:00
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static void ahci_imx_host_stop(struct ata_host *host)
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{
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struct ahci_host_priv *hpriv = host->private_data;
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2013-11-25 16:47:01 +08:00
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2014-02-22 23:53:37 +08:00
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imx_sata_disable(hpriv);
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}
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2013-07-24 14:15:29 +08:00
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2014-03-06 03:17:49 +08:00
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#ifdef CONFIG_PM_SLEEP
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2014-02-22 23:53:37 +08:00
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static int imx_ahci_suspend(struct device *dev)
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{
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|
|
|
struct ata_host *host = dev_get_drvdata(dev);
|
|
|
|
struct ahci_host_priv *hpriv = host->private_data;
|
|
|
|
int ret;
|
2013-07-24 14:15:29 +08:00
|
|
|
|
2014-02-22 23:53:37 +08:00
|
|
|
ret = ahci_platform_suspend_host(dev);
|
|
|
|
if (ret)
|
2013-07-24 14:15:29 +08:00
|
|
|
return ret;
|
2014-02-22 23:53:37 +08:00
|
|
|
|
|
|
|
imx_sata_disable(hpriv);
|
2013-07-24 14:15:29 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-02-22 23:53:37 +08:00
|
|
|
static int imx_ahci_resume(struct device *dev)
|
2013-07-24 14:15:29 +08:00
|
|
|
{
|
2014-02-22 23:53:37 +08:00
|
|
|
struct ata_host *host = dev_get_drvdata(dev);
|
|
|
|
struct ahci_host_priv *hpriv = host->private_data;
|
|
|
|
int ret;
|
2013-07-24 14:15:29 +08:00
|
|
|
|
2014-02-22 23:53:37 +08:00
|
|
|
ret = imx_sata_enable(hpriv);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
return ahci_platform_resume_host(dev);
|
2013-07-24 14:15:29 +08:00
|
|
|
}
|
2014-03-06 03:17:49 +08:00
|
|
|
#endif
|
2013-07-24 14:15:29 +08:00
|
|
|
|
2014-02-22 23:53:37 +08:00
|
|
|
static SIMPLE_DEV_PM_OPS(ahci_imx_pm_ops, imx_ahci_suspend, imx_ahci_resume);
|
|
|
|
|
2013-07-24 14:15:29 +08:00
|
|
|
static struct platform_driver imx_ahci_driver = {
|
|
|
|
.probe = imx_ahci_probe,
|
2014-02-22 23:53:37 +08:00
|
|
|
.remove = ata_platform_remove_one,
|
2013-07-24 14:15:29 +08:00
|
|
|
.driver = {
|
|
|
|
.name = "ahci-imx",
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.of_match_table = imx_ahci_of_match,
|
2014-02-22 23:53:37 +08:00
|
|
|
.pm = &ahci_imx_pm_ops,
|
2013-07-24 14:15:29 +08:00
|
|
|
},
|
|
|
|
};
|
|
|
|
module_platform_driver(imx_ahci_driver);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Freescale i.MX AHCI SATA platform driver");
|
|
|
|
MODULE_AUTHOR("Richard Zhu <Hong-Xing.Zhu@freescale.com>");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_ALIAS("ahci:imx");
|