2015-05-22 18:55:07 +08:00
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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2017-12-07 00:49:39 +08:00
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2018-05-29 13:53:07 +08:00
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/**
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* DOC: Overview
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*
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* The GPU scheduler provides entities which allow userspace to push jobs
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* into software queues which are then scheduled on a hardware run queue.
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* The software queues have a priority among them. The scheduler selects the entities
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* from the run queue using a FIFO. The scheduler provides dependency handling
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* features among jobs. The driver is supposed to provide callback functions for
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* backend operations to the scheduler like submitting a job to hardware run queue,
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* returning the dependencies of a job etc.
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*
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* The organisation of the scheduler is the following:
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*
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* 1. Each hw run queue has one scheduler
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* 2. Each scheduler has multiple run queues with different priorities
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* (e.g., HIGH_HW,HIGH_SW, KERNEL, NORMAL)
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* 3. Each scheduler run queue has a queue of entities to schedule
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* 4. Entities themselves maintain a queue of jobs that will be scheduled on
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* the hardware.
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*
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* The jobs in a entity are always scheduled in the order that they were pushed.
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*/
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2015-05-22 18:55:07 +08:00
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#include <linux/kthread.h>
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#include <linux/wait.h>
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#include <linux/sched.h>
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2017-02-02 01:07:51 +08:00
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#include <uapi/linux/sched/types.h>
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2015-05-22 18:55:07 +08:00
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#include <drm/drmP.h>
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2017-12-07 00:49:39 +08:00
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#include <drm/gpu_scheduler.h>
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#include <drm/spsc_queue.h>
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2017-10-13 04:46:26 +08:00
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2015-09-07 16:06:53 +08:00
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#define CREATE_TRACE_POINTS
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2018-03-30 01:06:33 +08:00
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#include "gpu_scheduler_trace.h"
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2015-09-07 16:06:53 +08:00
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2017-12-07 00:49:39 +08:00
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#define to_drm_sched_job(sched_job) \
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container_of((sched_job), struct drm_sched_job, queue_node)
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2017-10-13 04:46:26 +08:00
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2017-12-07 00:49:39 +08:00
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static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
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2015-08-24 20:29:40 +08:00
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2018-05-29 13:53:07 +08:00
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/**
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* drm_sched_rq_init - initialize a given run queue struct
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*
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* @rq: scheduler run queue
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*
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* Initializes a scheduler runqueue.
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*/
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2018-07-13 17:51:13 +08:00
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static void drm_sched_rq_init(struct drm_gpu_scheduler *sched,
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struct drm_sched_rq *rq)
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2015-05-22 18:55:07 +08:00
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{
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2015-08-18 20:41:25 +08:00
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spin_lock_init(&rq->lock);
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2015-08-12 17:46:04 +08:00
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INIT_LIST_HEAD(&rq->entities);
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rq->current_entity = NULL;
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2018-07-13 17:51:13 +08:00
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rq->sched = sched;
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2015-05-22 18:55:07 +08:00
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}
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2018-05-29 13:53:07 +08:00
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/**
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* drm_sched_rq_add_entity - add an entity
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*
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* @rq: scheduler run queue
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* @entity: scheduler entity
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*
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* Adds a scheduler entity to the run queue.
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*/
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2018-08-06 20:25:32 +08:00
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void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
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struct drm_sched_entity *entity)
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2015-05-22 18:55:07 +08:00
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{
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2015-12-11 18:22:52 +08:00
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if (!list_empty(&entity->list))
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return;
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2015-08-18 20:41:25 +08:00
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spin_lock(&rq->lock);
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2015-08-12 17:46:04 +08:00
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list_add_tail(&entity->list, &rq->entities);
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2015-08-18 20:41:25 +08:00
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spin_unlock(&rq->lock);
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2015-05-22 18:55:07 +08:00
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}
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2018-05-29 13:53:07 +08:00
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/**
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* drm_sched_rq_remove_entity - remove an entity
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*
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* @rq: scheduler run queue
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* @entity: scheduler entity
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*
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* Removes a scheduler entity from the run queue.
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*/
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2018-08-06 20:25:32 +08:00
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void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
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struct drm_sched_entity *entity)
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2015-05-22 18:55:07 +08:00
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{
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2015-12-11 18:22:52 +08:00
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if (list_empty(&entity->list))
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return;
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2015-08-18 20:41:25 +08:00
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spin_lock(&rq->lock);
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2015-08-12 17:46:04 +08:00
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list_del_init(&entity->list);
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if (rq->current_entity == entity)
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rq->current_entity = NULL;
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2015-08-18 20:41:25 +08:00
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spin_unlock(&rq->lock);
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2015-05-22 18:55:07 +08:00
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}
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/**
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2018-05-29 13:53:07 +08:00
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* drm_sched_rq_select_entity - Select an entity which could provide a job to run
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2015-11-13 04:10:35 +08:00
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*
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2018-05-29 13:53:07 +08:00
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* @rq: scheduler run queue to check.
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2015-11-13 04:10:35 +08:00
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*
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* Try to find a ready entity, returns NULL if none found.
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2015-05-22 18:55:07 +08:00
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*/
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2017-12-07 00:49:39 +08:00
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static struct drm_sched_entity *
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drm_sched_rq_select_entity(struct drm_sched_rq *rq)
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2015-05-22 18:55:07 +08:00
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{
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2017-12-07 00:49:39 +08:00
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struct drm_sched_entity *entity;
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2015-08-12 17:46:04 +08:00
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2015-08-18 20:41:25 +08:00
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spin_lock(&rq->lock);
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entity = rq->current_entity;
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2015-08-12 17:46:04 +08:00
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if (entity) {
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list_for_each_entry_continue(entity, &rq->entities, list) {
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2017-12-07 00:49:39 +08:00
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if (drm_sched_entity_is_ready(entity)) {
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2015-08-12 17:46:04 +08:00
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rq->current_entity = entity;
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2015-08-18 20:41:25 +08:00
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spin_unlock(&rq->lock);
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2015-11-13 04:10:35 +08:00
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return entity;
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2015-08-12 17:46:04 +08:00
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}
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2015-05-22 18:55:07 +08:00
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}
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}
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2015-08-12 17:46:04 +08:00
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list_for_each_entry(entity, &rq->entities, list) {
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2015-05-22 18:55:07 +08:00
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2017-12-07 00:49:39 +08:00
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if (drm_sched_entity_is_ready(entity)) {
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2015-08-12 17:46:04 +08:00
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rq->current_entity = entity;
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2015-08-18 20:41:25 +08:00
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spin_unlock(&rq->lock);
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2015-11-13 04:10:35 +08:00
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return entity;
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2015-08-12 17:46:04 +08:00
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}
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2015-05-22 18:55:07 +08:00
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2015-08-12 17:46:04 +08:00
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if (entity == rq->current_entity)
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break;
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}
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2015-05-22 18:55:07 +08:00
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2015-08-18 20:41:25 +08:00
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spin_unlock(&rq->lock);
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2015-08-12 17:46:04 +08:00
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return NULL;
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2015-05-22 18:55:07 +08:00
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}
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2018-05-29 13:53:07 +08:00
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/**
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* drm_sched_dependency_optimized
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*
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* @fence: the dependency fence
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* @entity: the entity which depends on the above fence
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*
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* Returns true if the dependency can be optimized and false otherwise
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*/
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2017-12-07 00:49:39 +08:00
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bool drm_sched_dependency_optimized(struct dma_fence* fence,
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struct drm_sched_entity *entity)
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2017-05-09 13:39:40 +08:00
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{
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2018-07-20 20:21:06 +08:00
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struct drm_gpu_scheduler *sched = entity->rq->sched;
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2017-12-07 00:49:39 +08:00
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struct drm_sched_fence *s_fence;
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2017-05-09 13:39:40 +08:00
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if (!fence || dma_fence_is_signaled(fence))
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return false;
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if (fence->context == entity->fence_context)
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return true;
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2017-12-07 00:49:39 +08:00
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s_fence = to_drm_sched_fence(fence);
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2017-05-09 13:39:40 +08:00
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if (s_fence && s_fence->sched == sched)
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return true;
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return false;
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}
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2017-12-07 00:49:39 +08:00
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EXPORT_SYMBOL(drm_sched_dependency_optimized);
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2017-05-09 13:39:40 +08:00
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2017-09-28 17:35:05 +08:00
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/* job_finish is called after hw fence signaled
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2016-03-04 18:51:02 +08:00
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*/
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2017-12-07 00:49:39 +08:00
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static void drm_sched_job_finish(struct work_struct *work)
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2016-03-04 18:51:02 +08:00
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{
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2017-12-07 00:49:39 +08:00
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struct drm_sched_job *s_job = container_of(work, struct drm_sched_job,
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2016-05-19 15:54:15 +08:00
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finish_work);
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2017-12-07 00:49:39 +08:00
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struct drm_gpu_scheduler *sched = s_job->sched;
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2016-03-04 18:51:02 +08:00
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2018-08-06 21:12:48 +08:00
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/*
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* Canceling the timeout without removing our job from the ring mirror
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* list is safe, as we will only end up in this worker if our jobs
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* finished fence has been signaled. So even if some another worker
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* manages to find this job as the next job in the list, the fence
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* signaled check below will prevent the timeout to be restarted.
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*/
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2018-09-26 01:09:02 +08:00
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cancel_delayed_work_sync(&sched->work_tdr);
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2016-03-04 18:51:02 +08:00
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2018-08-06 21:12:48 +08:00
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spin_lock(&sched->job_list_lock);
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/* remove job from ring_mirror_list */
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list_del(&s_job->node);
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2018-09-26 01:09:02 +08:00
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/* queue TDR for next job */
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if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
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!list_empty(&sched->ring_mirror_list))
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schedule_delayed_work(&sched->work_tdr, sched->timeout);
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2016-06-13 22:12:43 +08:00
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spin_unlock(&sched->job_list_lock);
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2018-08-06 21:12:48 +08:00
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2017-10-13 16:58:15 +08:00
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dma_fence_put(&s_job->s_fence->finished);
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2016-05-19 15:54:15 +08:00
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sched->ops->free_job(s_job);
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}
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2017-12-07 00:49:39 +08:00
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static void drm_sched_job_finish_cb(struct dma_fence *f,
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2016-10-25 20:00:45 +08:00
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struct dma_fence_cb *cb)
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2016-05-19 15:54:15 +08:00
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{
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2017-12-07 00:49:39 +08:00
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struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
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2016-05-19 15:54:15 +08:00
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finish_cb);
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schedule_work(&job->finish_work);
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2016-03-04 18:51:02 +08:00
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}
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2017-12-07 00:49:39 +08:00
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static void drm_sched_job_begin(struct drm_sched_job *s_job)
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2016-03-04 18:51:02 +08:00
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{
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2017-12-07 00:49:39 +08:00
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struct drm_gpu_scheduler *sched = s_job->sched;
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2016-03-04 18:51:02 +08:00
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2017-09-28 17:37:02 +08:00
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dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
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2017-12-07 00:49:39 +08:00
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drm_sched_job_finish_cb);
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2017-09-28 17:37:02 +08:00
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2016-06-13 22:12:43 +08:00
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spin_lock(&sched->job_list_lock);
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2016-05-18 21:40:58 +08:00
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list_add_tail(&s_job->node, &sched->ring_mirror_list);
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2016-03-04 18:51:02 +08:00
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if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
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2016-05-18 15:43:07 +08:00
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list_first_entry_or_null(&sched->ring_mirror_list,
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2017-12-07 00:49:39 +08:00
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struct drm_sched_job, node) == s_job)
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2018-09-26 01:09:02 +08:00
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schedule_delayed_work(&sched->work_tdr, sched->timeout);
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2016-06-13 22:12:43 +08:00
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spin_unlock(&sched->job_list_lock);
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2016-03-04 18:51:02 +08:00
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}
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2017-12-07 00:49:39 +08:00
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static void drm_sched_job_timedout(struct work_struct *work)
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2016-05-18 20:19:32 +08:00
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{
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2018-09-26 01:09:02 +08:00
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struct drm_gpu_scheduler *sched;
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struct drm_sched_job *job;
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sched = container_of(work, struct drm_gpu_scheduler, work_tdr.work);
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job = list_first_entry_or_null(&sched->ring_mirror_list,
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struct drm_sched_job, node);
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2016-05-18 20:19:32 +08:00
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2018-09-26 01:09:02 +08:00
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if (job)
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job->sched->ops->timedout_job(job);
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2016-05-18 20:19:32 +08:00
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}
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2018-05-29 13:53:07 +08:00
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/**
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* drm_sched_hw_job_reset - stop the scheduler if it contains the bad job
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*
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* @sched: scheduler instance
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* @bad: bad scheduler job
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*
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*/
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2017-12-07 00:49:39 +08:00
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void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
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2016-06-30 11:30:37 +08:00
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{
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2017-12-07 00:49:39 +08:00
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struct drm_sched_job *s_job;
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struct drm_sched_entity *entity, *tmp;
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2018-01-18 02:22:41 +08:00
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int i;
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2016-06-30 11:30:37 +08:00
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spin_lock(&sched->job_list_lock);
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list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
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2017-04-24 17:39:00 +08:00
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if (s_job->s_fence->parent &&
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dma_fence_remove_callback(s_job->s_fence->parent,
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&s_job->s_fence->cb)) {
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2016-10-25 20:00:45 +08:00
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dma_fence_put(s_job->s_fence->parent);
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2016-06-30 11:30:37 +08:00
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s_job->s_fence->parent = NULL;
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drm/amdgpu/SRIOV:implement guilty job TDR for(V2)
1,TDR will kickout guilty job if it hang exceed the threshold
of the given one from kernel paramter "job_hang_limit", that
way a bad command stream will not infinitly cause GPU hang.
by default this threshold is 1 so a job will be kicked out
after it hang.
2,if a job timeout TDR routine will not reset all sched/ring,
instead if will only reset on the givn one which is indicated
by @job of amdgpu_sriov_gpu_reset, that way we don't need to
reset and recover each sched/ring if we already know which job
cause GPU hang.
3,unblock sriov_gpu_reset for AI family.
V2:
1:put kickout guilty job after sched parked.
2:since parking scheduler prior to kickout already occupies a
while, we can do last check on the in question job before
doing hw_reset.
TODO:
1:when a job is considered as guilty, we should mark some flag
in its fence status flag, and let UMD side aware that this
fence signaling is not due to job complete but job hang.
2:if gpu reset cause all video memory lost, we need introduce
a new policy to implement TDR, like drop all jobs not yet
signaled, and all IOCTL on this device will return ERROR
DEVICE_LOST.
this will be implemented later.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-11 13:36:44 +08:00
|
|
|
atomic_dec(&sched->hw_rq_count);
|
2016-06-30 11:30:37 +08:00
|
|
|
}
|
|
|
|
}
|
drm/amdgpu/SRIOV:implement guilty job TDR for(V2)
1,TDR will kickout guilty job if it hang exceed the threshold
of the given one from kernel paramter "job_hang_limit", that
way a bad command stream will not infinitly cause GPU hang.
by default this threshold is 1 so a job will be kicked out
after it hang.
2,if a job timeout TDR routine will not reset all sched/ring,
instead if will only reset on the givn one which is indicated
by @job of amdgpu_sriov_gpu_reset, that way we don't need to
reset and recover each sched/ring if we already know which job
cause GPU hang.
3,unblock sriov_gpu_reset for AI family.
V2:
1:put kickout guilty job after sched parked.
2:since parking scheduler prior to kickout already occupies a
while, we can do last check on the in question job before
doing hw_reset.
TODO:
1:when a job is considered as guilty, we should mark some flag
in its fence status flag, and let UMD side aware that this
fence signaling is not due to job complete but job hang.
2:if gpu reset cause all video memory lost, we need introduce
a new policy to implement TDR, like drop all jobs not yet
signaled, and all IOCTL on this device will return ERROR
DEVICE_LOST.
this will be implemented later.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-11 13:36:44 +08:00
|
|
|
spin_unlock(&sched->job_list_lock);
|
2017-10-16 19:46:43 +08:00
|
|
|
|
2017-12-07 00:49:39 +08:00
|
|
|
if (bad && bad->s_priority != DRM_SCHED_PRIORITY_KERNEL) {
|
2017-11-08 14:35:04 +08:00
|
|
|
atomic_inc(&bad->karma);
|
2017-10-25 16:21:08 +08:00
|
|
|
/* don't increase @bad's karma if it's from KERNEL RQ,
|
|
|
|
* becuase sometimes GPU hang would cause kernel jobs (like VM updating jobs)
|
|
|
|
* corrupt but keep in mind that kernel jobs always considered good.
|
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_KERNEL; i++ ) {
|
|
|
|
struct drm_sched_rq *rq = &sched->sched_rq[i];
|
2017-10-16 19:46:43 +08:00
|
|
|
|
|
|
|
spin_lock(&rq->lock);
|
|
|
|
list_for_each_entry_safe(entity, tmp, &rq->entities, list) {
|
|
|
|
if (bad->s_fence->scheduled.context == entity->fence_context) {
|
2017-11-08 14:35:04 +08:00
|
|
|
if (atomic_read(&bad->karma) > bad->sched->hang_limit)
|
2017-10-25 16:21:08 +08:00
|
|
|
if (entity->guilty)
|
|
|
|
atomic_set(entity->guilty, 1);
|
2017-10-16 19:46:43 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
spin_unlock(&rq->lock);
|
2017-10-25 16:21:08 +08:00
|
|
|
if (&entity->list != &rq->entities)
|
2017-10-16 19:46:43 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
drm/amdgpu/SRIOV:implement guilty job TDR for(V2)
1,TDR will kickout guilty job if it hang exceed the threshold
of the given one from kernel paramter "job_hang_limit", that
way a bad command stream will not infinitly cause GPU hang.
by default this threshold is 1 so a job will be kicked out
after it hang.
2,if a job timeout TDR routine will not reset all sched/ring,
instead if will only reset on the givn one which is indicated
by @job of amdgpu_sriov_gpu_reset, that way we don't need to
reset and recover each sched/ring if we already know which job
cause GPU hang.
3,unblock sriov_gpu_reset for AI family.
V2:
1:put kickout guilty job after sched parked.
2:since parking scheduler prior to kickout already occupies a
while, we can do last check on the in question job before
doing hw_reset.
TODO:
1:when a job is considered as guilty, we should mark some flag
in its fence status flag, and let UMD side aware that this
fence signaling is not due to job complete but job hang.
2:if gpu reset cause all video memory lost, we need introduce
a new policy to implement TDR, like drop all jobs not yet
signaled, and all IOCTL on this device will return ERROR
DEVICE_LOST.
this will be implemented later.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-11 13:36:44 +08:00
|
|
|
}
|
2017-12-07 00:49:39 +08:00
|
|
|
EXPORT_SYMBOL(drm_sched_hw_job_reset);
|
drm/amdgpu/SRIOV:implement guilty job TDR for(V2)
1,TDR will kickout guilty job if it hang exceed the threshold
of the given one from kernel paramter "job_hang_limit", that
way a bad command stream will not infinitly cause GPU hang.
by default this threshold is 1 so a job will be kicked out
after it hang.
2,if a job timeout TDR routine will not reset all sched/ring,
instead if will only reset on the givn one which is indicated
by @job of amdgpu_sriov_gpu_reset, that way we don't need to
reset and recover each sched/ring if we already know which job
cause GPU hang.
3,unblock sriov_gpu_reset for AI family.
V2:
1:put kickout guilty job after sched parked.
2:since parking scheduler prior to kickout already occupies a
while, we can do last check on the in question job before
doing hw_reset.
TODO:
1:when a job is considered as guilty, we should mark some flag
in its fence status flag, and let UMD side aware that this
fence signaling is not due to job complete but job hang.
2:if gpu reset cause all video memory lost, we need introduce
a new policy to implement TDR, like drop all jobs not yet
signaled, and all IOCTL on this device will return ERROR
DEVICE_LOST.
this will be implemented later.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-05-11 13:36:44 +08:00
|
|
|
|
2018-05-29 13:53:07 +08:00
|
|
|
/**
|
|
|
|
* drm_sched_job_recovery - recover jobs after a reset
|
|
|
|
*
|
|
|
|
* @sched: scheduler instance
|
|
|
|
*
|
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
void drm_sched_job_recovery(struct drm_gpu_scheduler *sched)
|
2016-06-29 15:23:55 +08:00
|
|
|
{
|
2017-12-07 00:49:39 +08:00
|
|
|
struct drm_sched_job *s_job, *tmp;
|
2017-10-25 16:21:08 +08:00
|
|
|
bool found_guilty = false;
|
2016-06-29 15:23:55 +08:00
|
|
|
int r;
|
|
|
|
|
|
|
|
spin_lock(&sched->job_list_lock);
|
|
|
|
s_job = list_first_entry_or_null(&sched->ring_mirror_list,
|
2017-12-07 00:49:39 +08:00
|
|
|
struct drm_sched_job, node);
|
2016-08-17 01:52:35 +08:00
|
|
|
if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
|
2018-09-26 01:09:02 +08:00
|
|
|
schedule_delayed_work(&sched->work_tdr, sched->timeout);
|
2016-06-29 15:23:55 +08:00
|
|
|
|
2016-07-25 13:55:35 +08:00
|
|
|
list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
|
2017-12-07 00:49:39 +08:00
|
|
|
struct drm_sched_fence *s_fence = s_job->s_fence;
|
2016-10-25 20:00:45 +08:00
|
|
|
struct dma_fence *fence;
|
2017-10-25 16:21:08 +08:00
|
|
|
uint64_t guilty_context;
|
|
|
|
|
|
|
|
if (!found_guilty && atomic_read(&s_job->karma) > sched->hang_limit) {
|
|
|
|
found_guilty = true;
|
|
|
|
guilty_context = s_job->s_fence->scheduled.context;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (found_guilty && s_job->s_fence->scheduled.context == guilty_context)
|
|
|
|
dma_fence_set_error(&s_fence->finished, -ECANCELED);
|
2016-07-22 13:01:02 +08:00
|
|
|
|
2016-07-25 13:55:35 +08:00
|
|
|
spin_unlock(&sched->job_list_lock);
|
|
|
|
fence = sched->ops->run_job(s_job);
|
2016-07-22 13:01:02 +08:00
|
|
|
atomic_inc(&sched->hw_rq_count);
|
2018-04-16 10:07:02 +08:00
|
|
|
|
2016-06-29 15:23:55 +08:00
|
|
|
if (fence) {
|
2016-10-25 20:00:45 +08:00
|
|
|
s_fence->parent = dma_fence_get(fence);
|
|
|
|
r = dma_fence_add_callback(fence, &s_fence->cb,
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_process_job);
|
2016-06-29 15:23:55 +08:00
|
|
|
if (r == -ENOENT)
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_process_job(fence, &s_fence->cb);
|
2016-06-29 15:23:55 +08:00
|
|
|
else if (r)
|
|
|
|
DRM_ERROR("fence add callback failed (%d)\n",
|
|
|
|
r);
|
2016-10-25 20:00:45 +08:00
|
|
|
dma_fence_put(fence);
|
2016-06-29 15:23:55 +08:00
|
|
|
} else {
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_process_job(NULL, &s_fence->cb);
|
2016-06-29 15:23:55 +08:00
|
|
|
}
|
2016-07-25 13:55:35 +08:00
|
|
|
spin_lock(&sched->job_list_lock);
|
2016-06-29 15:23:55 +08:00
|
|
|
}
|
|
|
|
spin_unlock(&sched->job_list_lock);
|
|
|
|
}
|
2017-12-07 00:49:39 +08:00
|
|
|
EXPORT_SYMBOL(drm_sched_job_recovery);
|
2016-06-29 15:23:55 +08:00
|
|
|
|
2018-05-16 02:42:20 +08:00
|
|
|
/**
|
2018-05-29 13:53:07 +08:00
|
|
|
* drm_sched_job_init - init a scheduler job
|
2018-05-16 02:42:20 +08:00
|
|
|
*
|
2018-05-29 13:53:07 +08:00
|
|
|
* @job: scheduler job to init
|
|
|
|
* @entity: scheduler entity to use
|
|
|
|
* @owner: job owner for debugging
|
|
|
|
*
|
|
|
|
* Refer to drm_sched_entity_push_job() documentation
|
2018-05-16 02:42:20 +08:00
|
|
|
* for locking considerations.
|
2018-05-29 13:53:07 +08:00
|
|
|
*
|
|
|
|
* Returns 0 for success, negative error code otherwise.
|
2018-05-16 02:42:20 +08:00
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
int drm_sched_job_init(struct drm_sched_job *job,
|
|
|
|
struct drm_sched_entity *entity,
|
2016-06-30 16:52:03 +08:00
|
|
|
void *owner)
|
2016-03-07 12:49:55 +08:00
|
|
|
{
|
2018-08-08 19:07:11 +08:00
|
|
|
struct drm_gpu_scheduler *sched;
|
|
|
|
|
|
|
|
drm_sched_entity_select_rq(entity);
|
|
|
|
sched = entity->rq->sched;
|
2018-07-20 20:21:05 +08:00
|
|
|
|
2016-03-07 12:49:55 +08:00
|
|
|
job->sched = sched;
|
2018-04-16 10:07:02 +08:00
|
|
|
job->entity = entity;
|
2017-10-20 02:29:46 +08:00
|
|
|
job->s_priority = entity->rq - sched->sched_rq;
|
2017-12-07 00:49:39 +08:00
|
|
|
job->s_fence = drm_sched_fence_create(entity, owner);
|
2016-03-07 12:49:55 +08:00
|
|
|
if (!job->s_fence)
|
|
|
|
return -ENOMEM;
|
2017-05-09 15:34:07 +08:00
|
|
|
job->id = atomic64_inc_return(&sched->job_id_count);
|
2016-03-07 12:49:55 +08:00
|
|
|
|
2017-12-07 00:49:39 +08:00
|
|
|
INIT_WORK(&job->finish_work, drm_sched_job_finish);
|
2016-05-19 15:54:15 +08:00
|
|
|
INIT_LIST_HEAD(&job->node);
|
2016-03-04 14:33:44 +08:00
|
|
|
|
2016-03-07 12:49:55 +08:00
|
|
|
return 0;
|
|
|
|
}
|
2017-12-07 00:49:39 +08:00
|
|
|
EXPORT_SYMBOL(drm_sched_job_init);
|
2016-03-07 12:49:55 +08:00
|
|
|
|
2015-08-20 23:01:01 +08:00
|
|
|
/**
|
2018-05-29 13:53:07 +08:00
|
|
|
* drm_sched_ready - is the scheduler ready
|
|
|
|
*
|
|
|
|
* @sched: scheduler instance
|
|
|
|
*
|
|
|
|
* Return true if we can push more jobs to the hw, otherwise false.
|
2015-08-20 23:01:01 +08:00
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
static bool drm_sched_ready(struct drm_gpu_scheduler *sched)
|
2015-08-20 23:01:01 +08:00
|
|
|
{
|
|
|
|
return atomic_read(&sched->hw_rq_count) <
|
|
|
|
sched->hw_submission_limit;
|
|
|
|
}
|
|
|
|
|
2015-08-24 20:29:40 +08:00
|
|
|
/**
|
2018-05-29 13:53:07 +08:00
|
|
|
* drm_sched_wakeup - Wake up the scheduler when it is ready
|
|
|
|
*
|
|
|
|
* @sched: scheduler instance
|
|
|
|
*
|
2015-08-24 20:29:40 +08:00
|
|
|
*/
|
2018-08-06 20:25:32 +08:00
|
|
|
void drm_sched_wakeup(struct drm_gpu_scheduler *sched)
|
2015-08-24 20:29:40 +08:00
|
|
|
{
|
2017-12-07 00:49:39 +08:00
|
|
|
if (drm_sched_ready(sched))
|
2015-08-26 03:39:31 +08:00
|
|
|
wake_up_interruptible(&sched->wake_up_worker);
|
2015-08-24 20:29:40 +08:00
|
|
|
}
|
|
|
|
|
2015-08-20 23:01:01 +08:00
|
|
|
/**
|
2018-05-29 13:53:07 +08:00
|
|
|
* drm_sched_select_entity - Select next entity to process
|
|
|
|
*
|
|
|
|
* @sched: scheduler instance
|
|
|
|
*
|
|
|
|
* Returns the entity to process or NULL if none are found.
|
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
static struct drm_sched_entity *
|
|
|
|
drm_sched_select_entity(struct drm_gpu_scheduler *sched)
|
2015-08-20 23:01:01 +08:00
|
|
|
{
|
2017-12-07 00:49:39 +08:00
|
|
|
struct drm_sched_entity *entity;
|
2015-11-05 15:23:09 +08:00
|
|
|
int i;
|
2015-08-20 23:01:01 +08:00
|
|
|
|
2017-12-07 00:49:39 +08:00
|
|
|
if (!drm_sched_ready(sched))
|
2015-08-20 23:01:01 +08:00
|
|
|
return NULL;
|
|
|
|
|
|
|
|
/* Kernel run queue has higher priority than normal run queue*/
|
2017-12-07 00:49:39 +08:00
|
|
|
for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
|
|
|
|
entity = drm_sched_rq_select_entity(&sched->sched_rq[i]);
|
2015-11-05 15:23:09 +08:00
|
|
|
if (entity)
|
|
|
|
break;
|
|
|
|
}
|
2015-08-20 23:01:01 +08:00
|
|
|
|
2015-11-13 04:10:35 +08:00
|
|
|
return entity;
|
2015-08-20 23:01:01 +08:00
|
|
|
}
|
|
|
|
|
2018-05-29 13:53:07 +08:00
|
|
|
/**
|
|
|
|
* drm_sched_process_job - process a job
|
|
|
|
*
|
|
|
|
* @f: fence
|
|
|
|
* @cb: fence callbacks
|
|
|
|
*
|
|
|
|
* Called after job has finished execution.
|
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
|
2015-08-06 03:22:10 +08:00
|
|
|
{
|
2017-12-07 00:49:39 +08:00
|
|
|
struct drm_sched_fence *s_fence =
|
|
|
|
container_of(cb, struct drm_sched_fence, cb);
|
|
|
|
struct drm_gpu_scheduler *sched = s_fence->sched;
|
2015-08-06 03:22:10 +08:00
|
|
|
|
2017-10-13 16:58:15 +08:00
|
|
|
dma_fence_get(&s_fence->finished);
|
2015-08-19 22:12:15 +08:00
|
|
|
atomic_dec(&sched->hw_rq_count);
|
2018-08-01 16:20:00 +08:00
|
|
|
atomic_dec(&sched->num_jobs);
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_fence_finished(s_fence);
|
2016-03-04 14:42:26 +08:00
|
|
|
|
2017-12-07 00:49:39 +08:00
|
|
|
trace_drm_sched_process_job(s_fence);
|
2016-10-25 20:00:45 +08:00
|
|
|
dma_fence_put(&s_fence->finished);
|
2015-08-26 03:39:31 +08:00
|
|
|
wake_up_interruptible(&sched->wake_up_worker);
|
2015-08-06 03:22:10 +08:00
|
|
|
}
|
|
|
|
|
2018-05-29 13:53:07 +08:00
|
|
|
/**
|
|
|
|
* drm_sched_blocked - check if the scheduler is blocked
|
|
|
|
*
|
|
|
|
* @sched: scheduler instance
|
|
|
|
*
|
|
|
|
* Returns true if blocked, otherwise false.
|
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
static bool drm_sched_blocked(struct drm_gpu_scheduler *sched)
|
2016-06-12 15:41:58 +08:00
|
|
|
{
|
|
|
|
if (kthread_should_park()) {
|
|
|
|
kthread_parkme();
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-05-29 13:53:07 +08:00
|
|
|
/**
|
|
|
|
* drm_sched_main - main scheduler thread
|
|
|
|
*
|
|
|
|
* @param: scheduler instance
|
|
|
|
*
|
|
|
|
* Returns 0.
|
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
static int drm_sched_main(void *param)
|
2015-05-22 18:55:07 +08:00
|
|
|
{
|
|
|
|
struct sched_param sparam = {.sched_priority = 1};
|
2017-12-07 00:49:39 +08:00
|
|
|
struct drm_gpu_scheduler *sched = (struct drm_gpu_scheduler *)param;
|
2017-10-13 04:46:26 +08:00
|
|
|
int r;
|
2015-05-22 18:55:07 +08:00
|
|
|
|
|
|
|
sched_setscheduler(current, SCHED_FIFO, &sparam);
|
|
|
|
|
|
|
|
while (!kthread_should_stop()) {
|
2017-12-07 00:49:39 +08:00
|
|
|
struct drm_sched_entity *entity = NULL;
|
|
|
|
struct drm_sched_fence *s_fence;
|
|
|
|
struct drm_sched_job *sched_job;
|
2016-10-25 20:00:45 +08:00
|
|
|
struct dma_fence *fence;
|
2015-08-06 03:22:10 +08:00
|
|
|
|
2015-08-26 03:39:31 +08:00
|
|
|
wait_event_interruptible(sched->wake_up_worker,
|
2017-12-07 00:49:39 +08:00
|
|
|
(!drm_sched_blocked(sched) &&
|
|
|
|
(entity = drm_sched_select_entity(sched))) ||
|
2016-06-12 15:41:58 +08:00
|
|
|
kthread_should_stop());
|
2015-08-19 23:37:52 +08:00
|
|
|
|
2015-11-13 04:10:35 +08:00
|
|
|
if (!entity)
|
|
|
|
continue;
|
|
|
|
|
2017-12-07 00:49:39 +08:00
|
|
|
sched_job = drm_sched_entity_pop_job(entity);
|
2015-09-09 09:05:55 +08:00
|
|
|
if (!sched_job)
|
2015-08-19 23:37:52 +08:00
|
|
|
continue;
|
|
|
|
|
2015-09-09 09:05:55 +08:00
|
|
|
s_fence = sched_job->s_fence;
|
2015-10-10 08:48:42 +08:00
|
|
|
|
2015-08-20 23:08:25 +08:00
|
|
|
atomic_inc(&sched->hw_rq_count);
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_job_begin(sched_job);
|
2016-05-18 19:00:38 +08:00
|
|
|
|
2015-09-09 09:05:55 +08:00
|
|
|
fence = sched->ops->run_job(sched_job);
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_fence_scheduled(s_fence);
|
2017-09-28 17:51:32 +08:00
|
|
|
|
2015-08-06 03:22:10 +08:00
|
|
|
if (fence) {
|
2016-10-25 20:00:45 +08:00
|
|
|
s_fence->parent = dma_fence_get(fence);
|
|
|
|
r = dma_fence_add_callback(fence, &s_fence->cb,
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_process_job);
|
2015-08-06 03:22:10 +08:00
|
|
|
if (r == -ENOENT)
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_process_job(fence, &s_fence->cb);
|
2015-08-06 03:22:10 +08:00
|
|
|
else if (r)
|
2016-05-18 15:43:07 +08:00
|
|
|
DRM_ERROR("fence add callback failed (%d)\n",
|
|
|
|
r);
|
2016-10-25 20:00:45 +08:00
|
|
|
dma_fence_put(fence);
|
2015-09-02 18:03:06 +08:00
|
|
|
} else {
|
2017-12-07 00:49:39 +08:00
|
|
|
drm_sched_process_job(NULL, &s_fence->cb);
|
2015-08-06 03:22:10 +08:00
|
|
|
}
|
2015-08-20 20:47:46 +08:00
|
|
|
|
2015-08-26 03:39:31 +08:00
|
|
|
wake_up(&sched->job_scheduled);
|
2015-05-22 18:55:07 +08:00
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2018-05-29 13:53:07 +08:00
|
|
|
* drm_sched_init - Init a gpu scheduler instance
|
2015-05-22 18:55:07 +08:00
|
|
|
*
|
2018-05-29 13:53:07 +08:00
|
|
|
* @sched: scheduler instance
|
|
|
|
* @ops: backend operations for this scheduler
|
|
|
|
* @hw_submission: number of hw submissions that can be in flight
|
|
|
|
* @hang_limit: number of times to allow a job to hang before dropping it
|
|
|
|
* @timeout: timeout value in jiffies for the scheduler
|
|
|
|
* @name: name used for debugging
|
2015-05-22 18:55:07 +08:00
|
|
|
*
|
2015-09-09 02:22:31 +08:00
|
|
|
* Return 0 on success, otherwise error code.
|
2018-05-29 13:53:07 +08:00
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
int drm_sched_init(struct drm_gpu_scheduler *sched,
|
|
|
|
const struct drm_sched_backend_ops *ops,
|
2017-10-17 13:40:54 +08:00
|
|
|
unsigned hw_submission,
|
|
|
|
unsigned hang_limit,
|
|
|
|
long timeout,
|
|
|
|
const char *name)
|
2015-05-22 18:55:07 +08:00
|
|
|
{
|
2015-11-05 15:23:09 +08:00
|
|
|
int i;
|
2015-05-22 18:55:07 +08:00
|
|
|
sched->ops = ops;
|
2015-08-05 19:52:14 +08:00
|
|
|
sched->hw_submission_limit = hw_submission;
|
2015-09-09 02:22:31 +08:00
|
|
|
sched->name = name;
|
2015-10-10 08:48:42 +08:00
|
|
|
sched->timeout = timeout;
|
2017-10-17 13:40:54 +08:00
|
|
|
sched->hang_limit = hang_limit;
|
2017-12-07 00:49:39 +08:00
|
|
|
for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_MAX; i++)
|
2018-07-13 17:51:13 +08:00
|
|
|
drm_sched_rq_init(sched, &sched->sched_rq[i]);
|
2015-05-22 18:55:07 +08:00
|
|
|
|
2015-08-26 03:39:31 +08:00
|
|
|
init_waitqueue_head(&sched->wake_up_worker);
|
|
|
|
init_waitqueue_head(&sched->job_scheduled);
|
2016-03-04 14:33:44 +08:00
|
|
|
INIT_LIST_HEAD(&sched->ring_mirror_list);
|
|
|
|
spin_lock_init(&sched->job_list_lock);
|
2015-08-19 22:12:15 +08:00
|
|
|
atomic_set(&sched->hw_rq_count, 0);
|
2018-09-26 01:09:02 +08:00
|
|
|
INIT_DELAYED_WORK(&sched->work_tdr, drm_sched_job_timedout);
|
2018-08-01 16:20:00 +08:00
|
|
|
atomic_set(&sched->num_jobs, 0);
|
2017-03-10 10:25:50 +08:00
|
|
|
atomic64_set(&sched->job_id_count, 0);
|
2015-09-09 02:22:31 +08:00
|
|
|
|
2015-05-22 18:55:07 +08:00
|
|
|
/* Each scheduler will run on a seperate kernel thread */
|
2017-12-07 00:49:39 +08:00
|
|
|
sched->thread = kthread_run(drm_sched_main, sched, sched->name);
|
2015-08-20 22:59:38 +08:00
|
|
|
if (IS_ERR(sched->thread)) {
|
2015-09-09 02:22:31 +08:00
|
|
|
DRM_ERROR("Failed to create scheduler for %s.\n", name);
|
|
|
|
return PTR_ERR(sched->thread);
|
2015-05-22 18:55:07 +08:00
|
|
|
}
|
|
|
|
|
2015-09-09 02:22:31 +08:00
|
|
|
return 0;
|
2015-05-22 18:55:07 +08:00
|
|
|
}
|
2017-12-07 00:49:39 +08:00
|
|
|
EXPORT_SYMBOL(drm_sched_init);
|
2015-05-22 18:55:07 +08:00
|
|
|
|
|
|
|
/**
|
2018-05-29 13:53:07 +08:00
|
|
|
* drm_sched_fini - Destroy a gpu scheduler
|
|
|
|
*
|
|
|
|
* @sched: scheduler instance
|
2015-05-22 18:55:07 +08:00
|
|
|
*
|
2018-05-29 13:53:07 +08:00
|
|
|
* Tears down and cleans up the scheduler.
|
2015-05-22 18:55:07 +08:00
|
|
|
*/
|
2017-12-07 00:49:39 +08:00
|
|
|
void drm_sched_fini(struct drm_gpu_scheduler *sched)
|
2015-05-22 18:55:07 +08:00
|
|
|
{
|
2015-11-04 00:10:03 +08:00
|
|
|
if (sched->thread)
|
|
|
|
kthread_stop(sched->thread);
|
2015-05-22 18:55:07 +08:00
|
|
|
}
|
2017-12-07 00:49:39 +08:00
|
|
|
EXPORT_SYMBOL(drm_sched_fini);
|