2019-05-27 14:55:01 +08:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
2017-02-08 17:50:51 +08:00
|
|
|
/*
|
|
|
|
* Code for Kernel probes Jump optimization.
|
|
|
|
*
|
|
|
|
* Copyright 2017, Anju T, IBM Corp.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/kprobes.h>
|
|
|
|
#include <linux/jump_label.h>
|
|
|
|
#include <linux/types.h>
|
|
|
|
#include <linux/slab.h>
|
|
|
|
#include <linux/list.h>
|
|
|
|
#include <asm/kprobes.h>
|
|
|
|
#include <asm/ptrace.h>
|
|
|
|
#include <asm/cacheflush.h>
|
|
|
|
#include <asm/code-patching.h>
|
|
|
|
#include <asm/sstep.h>
|
|
|
|
#include <asm/ppc-opcode.h>
|
2020-05-06 11:40:26 +08:00
|
|
|
#include <asm/inst.h>
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
#define TMPL_CALL_HDLR_IDX \
|
|
|
|
(optprobe_template_call_handler - optprobe_template_entry)
|
|
|
|
#define TMPL_EMULATE_IDX \
|
|
|
|
(optprobe_template_call_emulate - optprobe_template_entry)
|
|
|
|
#define TMPL_RET_IDX \
|
|
|
|
(optprobe_template_ret - optprobe_template_entry)
|
|
|
|
#define TMPL_OP_IDX \
|
|
|
|
(optprobe_template_op_address - optprobe_template_entry)
|
|
|
|
#define TMPL_INSN_IDX \
|
|
|
|
(optprobe_template_insn - optprobe_template_entry)
|
|
|
|
#define TMPL_END_IDX \
|
|
|
|
(optprobe_template_end - optprobe_template_entry)
|
|
|
|
|
|
|
|
DEFINE_INSN_CACHE_OPS(ppc_optinsn);
|
|
|
|
|
|
|
|
static bool insn_page_in_use;
|
|
|
|
|
|
|
|
static void *__ppc_alloc_insn_page(void)
|
|
|
|
{
|
|
|
|
if (insn_page_in_use)
|
|
|
|
return NULL;
|
|
|
|
insn_page_in_use = true;
|
|
|
|
return &optinsn_slot;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __ppc_free_insn_page(void *page __maybe_unused)
|
|
|
|
{
|
|
|
|
insn_page_in_use = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct kprobe_insn_cache kprobe_ppc_optinsn_slots = {
|
|
|
|
.mutex = __MUTEX_INITIALIZER(kprobe_ppc_optinsn_slots.mutex),
|
|
|
|
.pages = LIST_HEAD_INIT(kprobe_ppc_optinsn_slots.pages),
|
|
|
|
/* insn_size initialized later */
|
|
|
|
.alloc = __ppc_alloc_insn_page,
|
|
|
|
.free = __ppc_free_insn_page,
|
|
|
|
.nr_garbage = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check if we can optimize this probe. Returns NIP post-emulation if this can
|
|
|
|
* be optimized and 0 otherwise.
|
|
|
|
*/
|
|
|
|
static unsigned long can_optimize(struct kprobe *p)
|
|
|
|
{
|
|
|
|
struct pt_regs regs;
|
|
|
|
struct instruction_op op;
|
|
|
|
unsigned long nip = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* kprobe placed for kretprobe during boot time
|
2017-02-08 17:50:52 +08:00
|
|
|
* has a 'nop' instruction, which can be emulated.
|
|
|
|
* So further checks can be skipped.
|
2017-02-08 17:50:51 +08:00
|
|
|
*/
|
|
|
|
if (p->addr == (kprobe_opcode_t *)&kretprobe_trampoline)
|
2017-02-08 17:50:52 +08:00
|
|
|
return (unsigned long)p->addr + sizeof(kprobe_opcode_t);
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We only support optimizing kernel addresses, but not
|
|
|
|
* module addresses.
|
|
|
|
*
|
|
|
|
* FIXME: Optimize kprobes placed in module addresses.
|
|
|
|
*/
|
|
|
|
if (!is_kernel_addr((unsigned long)p->addr))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
memset(®s, 0, sizeof(struct pt_regs));
|
|
|
|
regs.nip = (unsigned long)p->addr;
|
|
|
|
regs.trap = 0x0;
|
|
|
|
regs.msr = MSR_KERNEL;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Kprobe placed in conditional branch instructions are
|
|
|
|
* not optimized, as we can't predict the nip prior with
|
|
|
|
* dummy pt_regs and can not ensure that the return branch
|
|
|
|
* from detour buffer falls in the range of address (i.e 32MB).
|
|
|
|
* A branch back from trampoline is set up in the detour buffer
|
|
|
|
* to the nip returned by the analyse_instr() here.
|
|
|
|
*
|
|
|
|
* Ensure that the instruction is not a conditional branch,
|
|
|
|
* and that can be emulated.
|
|
|
|
*/
|
2020-05-06 11:40:32 +08:00
|
|
|
if (!is_conditional_branch(ppc_inst_read((struct ppc_inst *)p->ainsn.insn)) &&
|
2020-05-06 11:40:31 +08:00
|
|
|
analyse_instr(&op, ®s,
|
2020-05-06 11:40:32 +08:00
|
|
|
ppc_inst_read((struct ppc_inst *)p->ainsn.insn)) == 1) {
|
2017-09-15 18:08:21 +08:00
|
|
|
emulate_update_regs(®s, &op);
|
2017-02-08 17:50:51 +08:00
|
|
|
nip = regs.nip;
|
2017-09-15 18:08:21 +08:00
|
|
|
}
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
return nip;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void optimized_callback(struct optimized_kprobe *op,
|
|
|
|
struct pt_regs *regs)
|
|
|
|
{
|
|
|
|
/* This is possible if op is under delayed unoptimizing */
|
|
|
|
if (kprobe_disabled(&op->kp))
|
|
|
|
return;
|
|
|
|
|
2017-10-24 00:37:38 +08:00
|
|
|
preempt_disable();
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
if (kprobe_running()) {
|
|
|
|
kprobes_inc_nmissed_count(&op->kp);
|
|
|
|
} else {
|
|
|
|
__this_cpu_write(current_kprobe, &op->kp);
|
|
|
|
regs->nip = (unsigned long)op->kp.addr;
|
2017-10-24 00:37:38 +08:00
|
|
|
get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
|
2017-02-08 17:50:51 +08:00
|
|
|
opt_pre_handler(&op->kp, regs);
|
|
|
|
__this_cpu_write(current_kprobe, NULL);
|
|
|
|
}
|
|
|
|
|
2017-10-24 00:37:38 +08:00
|
|
|
preempt_enable_no_resched();
|
2017-02-08 17:50:51 +08:00
|
|
|
}
|
|
|
|
NOKPROBE_SYMBOL(optimized_callback);
|
|
|
|
|
|
|
|
void arch_remove_optimized_kprobe(struct optimized_kprobe *op)
|
|
|
|
{
|
|
|
|
if (op->optinsn.insn) {
|
|
|
|
free_ppc_optinsn_slot(op->optinsn.insn, 1);
|
|
|
|
op->optinsn.insn = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* emulate_step() requires insn to be emulated as
|
|
|
|
* second parameter. Load register 'r4' with the
|
|
|
|
* instruction.
|
|
|
|
*/
|
|
|
|
void patch_imm32_load_insns(unsigned int val, kprobe_opcode_t *addr)
|
|
|
|
{
|
|
|
|
/* addis r4,0,(insn)@h */
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)addr,
|
|
|
|
ppc_inst(PPC_INST_ADDIS | ___PPC_RT(4) |
|
|
|
|
((val >> 16) & 0xffff)));
|
2017-06-06 12:29:39 +08:00
|
|
|
addr++;
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
/* ori r4,r4,(insn)@l */
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)addr,
|
|
|
|
ppc_inst(PPC_INST_ORI | ___PPC_RA(4) |
|
|
|
|
___PPC_RS(4) | (val & 0xffff)));
|
2017-02-08 17:50:51 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Generate instructions to load provided immediate 64-bit value
|
2020-05-15 09:15:28 +08:00
|
|
|
* to register 'reg' and patch these instructions at 'addr'.
|
2017-02-08 17:50:51 +08:00
|
|
|
*/
|
2020-05-15 09:15:28 +08:00
|
|
|
void patch_imm64_load_insns(unsigned long val, int reg, kprobe_opcode_t *addr)
|
2017-02-08 17:50:51 +08:00
|
|
|
{
|
2020-05-15 09:15:28 +08:00
|
|
|
/* lis reg,(op)@highest */
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)addr,
|
2020-05-15 09:15:28 +08:00
|
|
|
ppc_inst(PPC_INST_ADDIS | ___PPC_RT(reg) |
|
2020-05-06 11:40:31 +08:00
|
|
|
((val >> 48) & 0xffff)));
|
2017-06-06 12:29:39 +08:00
|
|
|
addr++;
|
2017-02-08 17:50:51 +08:00
|
|
|
|
2020-05-15 09:15:28 +08:00
|
|
|
/* ori reg,reg,(op)@higher */
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)addr,
|
2020-05-15 09:15:28 +08:00
|
|
|
ppc_inst(PPC_INST_ORI | ___PPC_RA(reg) |
|
|
|
|
___PPC_RS(reg) | ((val >> 32) & 0xffff)));
|
2017-06-06 12:29:39 +08:00
|
|
|
addr++;
|
2017-02-08 17:50:51 +08:00
|
|
|
|
2020-05-15 09:15:28 +08:00
|
|
|
/* rldicr reg,reg,32,31 */
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)addr,
|
2020-05-15 09:15:28 +08:00
|
|
|
ppc_inst(PPC_INST_RLDICR | ___PPC_RA(reg) |
|
|
|
|
___PPC_RS(reg) | __PPC_SH64(32) | __PPC_ME64(31)));
|
2017-06-06 12:29:39 +08:00
|
|
|
addr++;
|
2017-02-08 17:50:51 +08:00
|
|
|
|
2020-05-15 09:15:28 +08:00
|
|
|
/* oris reg,reg,(op)@h */
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)addr,
|
2020-05-15 09:15:28 +08:00
|
|
|
ppc_inst(PPC_INST_ORIS | ___PPC_RA(reg) |
|
|
|
|
___PPC_RS(reg) | ((val >> 16) & 0xffff)));
|
2017-06-06 12:29:39 +08:00
|
|
|
addr++;
|
2017-02-08 17:50:51 +08:00
|
|
|
|
2020-05-15 09:15:28 +08:00
|
|
|
/* ori reg,reg,(op)@l */
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)addr,
|
2020-05-15 09:15:28 +08:00
|
|
|
ppc_inst(PPC_INST_ORI | ___PPC_RA(reg) |
|
|
|
|
___PPC_RS(reg) | (val & 0xffff)));
|
2017-02-08 17:50:51 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *p)
|
|
|
|
{
|
2020-05-06 11:40:31 +08:00
|
|
|
struct ppc_inst branch_op_callback, branch_emulate_step;
|
|
|
|
kprobe_opcode_t *op_callback_addr, *emulate_step_addr, *buff;
|
2017-02-08 17:50:51 +08:00
|
|
|
long b_offset;
|
2017-06-06 12:29:39 +08:00
|
|
|
unsigned long nip, size;
|
|
|
|
int rc, i;
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
kprobe_ppc_optinsn_slots.insn_size = MAX_OPTINSN_SIZE;
|
|
|
|
|
|
|
|
nip = can_optimize(p);
|
|
|
|
if (!nip)
|
|
|
|
return -EILSEQ;
|
|
|
|
|
|
|
|
/* Allocate instruction slot for detour buffer */
|
|
|
|
buff = get_ppc_optinsn_slot();
|
|
|
|
if (!buff)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* OPTPROBE uses 'b' instruction to branch to optinsn.insn.
|
|
|
|
*
|
|
|
|
* The target address has to be relatively nearby, to permit use
|
|
|
|
* of branch instruction in powerpc, because the address is specified
|
|
|
|
* in an immediate field in the instruction opcode itself, ie 24 bits
|
|
|
|
* in the opcode specify the address. Therefore the address should
|
|
|
|
* be within 32MB on either side of the current instruction.
|
|
|
|
*/
|
|
|
|
b_offset = (unsigned long)buff - (unsigned long)p->addr;
|
|
|
|
if (!is_offset_in_branch_range(b_offset))
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/* Check if the return address is also within 32MB range */
|
|
|
|
b_offset = (unsigned long)(buff + TMPL_RET_IDX) -
|
|
|
|
(unsigned long)nip;
|
|
|
|
if (!is_offset_in_branch_range(b_offset))
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/* Setup template */
|
2017-06-06 12:29:39 +08:00
|
|
|
/* We can optimize this via patch_instruction_window later */
|
|
|
|
size = (TMPL_END_IDX * sizeof(kprobe_opcode_t)) / sizeof(int);
|
|
|
|
pr_devel("Copying template to %p, size %lu\n", buff, size);
|
|
|
|
for (i = 0; i < size; i++) {
|
2020-05-06 11:40:31 +08:00
|
|
|
rc = patch_instruction((struct ppc_inst *)(buff + i),
|
2020-05-06 11:40:26 +08:00
|
|
|
ppc_inst(*(optprobe_template_entry + i)));
|
2017-06-06 12:29:39 +08:00
|
|
|
if (rc < 0)
|
|
|
|
goto error;
|
|
|
|
}
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Fixup the template with instructions to:
|
|
|
|
* 1. load the address of the actual probepoint
|
|
|
|
*/
|
2020-05-15 09:15:28 +08:00
|
|
|
patch_imm64_load_insns((unsigned long)op, 3, buff + TMPL_OP_IDX);
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* 2. branch to optimized_callback() and emulate_step()
|
|
|
|
*/
|
2017-04-19 20:52:27 +08:00
|
|
|
op_callback_addr = (kprobe_opcode_t *)ppc_kallsyms_lookup_name("optimized_callback");
|
|
|
|
emulate_step_addr = (kprobe_opcode_t *)ppc_kallsyms_lookup_name("emulate_step");
|
2017-02-08 17:50:51 +08:00
|
|
|
if (!op_callback_addr || !emulate_step_addr) {
|
2017-04-19 20:52:27 +08:00
|
|
|
WARN(1, "Unable to lookup optimized_callback()/emulate_step()\n");
|
2017-02-08 17:50:51 +08:00
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2020-05-06 11:40:25 +08:00
|
|
|
rc = create_branch(&branch_op_callback,
|
2020-05-06 11:40:31 +08:00
|
|
|
(struct ppc_inst *)(buff + TMPL_CALL_HDLR_IDX),
|
2020-05-06 11:40:25 +08:00
|
|
|
(unsigned long)op_callback_addr,
|
|
|
|
BRANCH_SET_LINK);
|
2017-02-08 17:50:51 +08:00
|
|
|
|
2020-05-06 11:40:25 +08:00
|
|
|
rc |= create_branch(&branch_emulate_step,
|
2020-05-06 11:40:31 +08:00
|
|
|
(struct ppc_inst *)(buff + TMPL_EMULATE_IDX),
|
2020-05-06 11:40:25 +08:00
|
|
|
(unsigned long)emulate_step_addr,
|
|
|
|
BRANCH_SET_LINK);
|
2017-02-08 17:50:51 +08:00
|
|
|
|
2020-05-06 11:40:25 +08:00
|
|
|
if (rc)
|
2017-02-08 17:50:51 +08:00
|
|
|
goto error;
|
|
|
|
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)(buff + TMPL_CALL_HDLR_IDX),
|
|
|
|
branch_op_callback);
|
|
|
|
patch_instruction((struct ppc_inst *)(buff + TMPL_EMULATE_IDX),
|
|
|
|
branch_emulate_step);
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* 3. load instruction to be emulated into relevant register, and
|
|
|
|
*/
|
|
|
|
patch_imm32_load_insns(*p->ainsn.insn, buff + TMPL_INSN_IDX);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* 4. branch back from trampoline
|
|
|
|
*/
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_branch((struct ppc_inst *)(buff + TMPL_RET_IDX), (unsigned long)nip, 0);
|
2017-02-08 17:50:51 +08:00
|
|
|
|
|
|
|
flush_icache_range((unsigned long)buff,
|
|
|
|
(unsigned long)(&buff[TMPL_END_IDX]));
|
|
|
|
|
|
|
|
op->optinsn.insn = buff;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
error:
|
|
|
|
free_ppc_optinsn_slot(buff, 0);
|
|
|
|
return -ERANGE;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
int arch_prepared_optinsn(struct arch_optimized_insn *optinsn)
|
|
|
|
{
|
|
|
|
return optinsn->insn != NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* On powerpc, Optprobes always replaces one instruction (4 bytes
|
|
|
|
* aligned and 4 bytes long). It is impossible to encounter another
|
|
|
|
* kprobe in this address range. So always return 0.
|
|
|
|
*/
|
|
|
|
int arch_check_optimized_kprobe(struct optimized_kprobe *op)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void arch_optimize_kprobes(struct list_head *oplist)
|
|
|
|
{
|
2020-05-06 11:40:31 +08:00
|
|
|
struct ppc_inst instr;
|
2017-02-08 17:50:51 +08:00
|
|
|
struct optimized_kprobe *op;
|
|
|
|
struct optimized_kprobe *tmp;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(op, tmp, oplist, list) {
|
|
|
|
/*
|
|
|
|
* Backup instructions which will be replaced
|
|
|
|
* by jump address
|
|
|
|
*/
|
|
|
|
memcpy(op->optinsn.copied_insn, op->kp.addr,
|
|
|
|
RELATIVEJUMP_SIZE);
|
2020-05-06 11:40:25 +08:00
|
|
|
create_branch(&instr,
|
2020-05-06 11:40:31 +08:00
|
|
|
(struct ppc_inst *)op->kp.addr,
|
2020-05-06 11:40:25 +08:00
|
|
|
(unsigned long)op->optinsn.insn, 0);
|
2020-05-06 11:40:31 +08:00
|
|
|
patch_instruction((struct ppc_inst *)op->kp.addr, instr);
|
2017-02-08 17:50:51 +08:00
|
|
|
list_del_init(&op->list);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void arch_unoptimize_kprobe(struct optimized_kprobe *op)
|
|
|
|
{
|
|
|
|
arch_arm_kprobe(&op->kp);
|
|
|
|
}
|
|
|
|
|
|
|
|
void arch_unoptimize_kprobes(struct list_head *oplist,
|
|
|
|
struct list_head *done_list)
|
|
|
|
{
|
|
|
|
struct optimized_kprobe *op;
|
|
|
|
struct optimized_kprobe *tmp;
|
|
|
|
|
|
|
|
list_for_each_entry_safe(op, tmp, oplist, list) {
|
|
|
|
arch_unoptimize_kprobe(op);
|
|
|
|
list_move(&op->list, done_list);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
int arch_within_optimized_kprobe(struct optimized_kprobe *op,
|
|
|
|
unsigned long addr)
|
|
|
|
{
|
|
|
|
return ((unsigned long)op->kp.addr <= addr &&
|
|
|
|
(unsigned long)op->kp.addr + RELATIVEJUMP_SIZE > addr);
|
|
|
|
}
|