2006-03-30 07:23:29 +08:00
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/*
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2008-04-17 12:09:32 +08:00
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* Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
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2006-03-30 07:23:29 +08:00
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* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "ipath_kernel.h"
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struct infinipath_stats ipath_stats;
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/**
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* ipath_snap_cntr - snapshot a chip counter
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* @dd: the infinipath device
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* @creg: the counter to snapshot
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*
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* called from add_timer and user counter read calls, to deal with
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* counters that wrap in "human time". The words sent and received, and
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* the packets sent and received are all that we worry about. For now,
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* at least, we don't worry about error counters, because if they wrap
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* that quickly, we probably don't care. We may eventually just make this
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* handle all the counters. word counters can wrap in about 20 seconds
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* of full bandwidth traffic, packet counters in a few hours.
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*/
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u64 ipath_snap_cntr(struct ipath_devdata *dd, ipath_creg creg)
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{
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u32 val, reg64 = 0;
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u64 val64;
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unsigned long t0, t1;
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u64 ret;
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t0 = jiffies;
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/* If fast increment counters are only 32 bits, snapshot them,
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* and maintain them as 64bit values in the driver */
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if (!(dd->ipath_flags & IPATH_32BITCOUNTERS) &&
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(creg == dd->ipath_cregs->cr_wordsendcnt ||
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creg == dd->ipath_cregs->cr_wordrcvcnt ||
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creg == dd->ipath_cregs->cr_pktsendcnt ||
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creg == dd->ipath_cregs->cr_pktrcvcnt)) {
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val64 = ipath_read_creg(dd, creg);
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val = val64 == ~0ULL ? ~0U : 0;
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reg64 = 1;
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} else /* val64 just to keep gcc quiet... */
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val64 = val = ipath_read_creg32(dd, creg);
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/*
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* See if a second has passed. This is just a way to detect things
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* that are quite broken. Normally this should take just a few
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* cycles (the check is for long enough that we don't care if we get
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* pre-empted.) An Opteron HT O read timeout is 4 seconds with
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* normal NB values
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*/
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t1 = jiffies;
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if (time_before(t0 + HZ, t1) && val == -1) {
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ipath_dev_err(dd, "Error! Read counter 0x%x timed out\n",
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creg);
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ret = 0ULL;
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goto bail;
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}
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if (reg64) {
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ret = val64;
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goto bail;
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}
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if (creg == dd->ipath_cregs->cr_wordsendcnt) {
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if (val != dd->ipath_lastsword) {
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dd->ipath_sword += val - dd->ipath_lastsword;
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dd->ipath_lastsword = val;
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}
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val64 = dd->ipath_sword;
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} else if (creg == dd->ipath_cregs->cr_wordrcvcnt) {
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if (val != dd->ipath_lastrword) {
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dd->ipath_rword += val - dd->ipath_lastrword;
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dd->ipath_lastrword = val;
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}
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val64 = dd->ipath_rword;
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} else if (creg == dd->ipath_cregs->cr_pktsendcnt) {
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if (val != dd->ipath_lastspkts) {
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dd->ipath_spkts += val - dd->ipath_lastspkts;
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dd->ipath_lastspkts = val;
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}
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val64 = dd->ipath_spkts;
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} else if (creg == dd->ipath_cregs->cr_pktrcvcnt) {
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if (val != dd->ipath_lastrpkts) {
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dd->ipath_rpkts += val - dd->ipath_lastrpkts;
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dd->ipath_lastrpkts = val;
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}
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val64 = dd->ipath_rpkts;
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} else
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val64 = (u64) val;
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ret = val64;
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bail:
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return ret;
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}
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/**
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* ipath_qcheck - print delta of egrfull/hdrqfull errors for kernel ports
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* @dd: the infinipath device
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*
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* print the delta of egrfull/hdrqfull errors for kernel ports no more than
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* every 5 seconds. User processes are printed at close, but kernel doesn't
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* close, so... Separate routine so may call from other places someday, and
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* so function name when printed by _IPATH_INFO is meaningfull
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*/
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static void ipath_qcheck(struct ipath_devdata *dd)
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{
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static u64 last_tot_hdrqfull;
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2007-12-20 18:43:23 +08:00
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struct ipath_portdata *pd = dd->ipath_pd[0];
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2006-03-30 07:23:29 +08:00
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size_t blen = 0;
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char buf[128];
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2008-04-17 12:09:29 +08:00
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u32 hdrqtail;
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2006-03-30 07:23:29 +08:00
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*buf = 0;
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2007-12-20 18:43:23 +08:00
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if (pd->port_hdrqfull != dd->ipath_p0_hdrqfull) {
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2006-03-30 07:23:29 +08:00
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blen = snprintf(buf, sizeof buf, "port 0 hdrqfull %u",
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2007-12-20 18:43:23 +08:00
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pd->port_hdrqfull -
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2006-03-30 07:23:29 +08:00
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dd->ipath_p0_hdrqfull);
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2007-12-20 18:43:23 +08:00
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dd->ipath_p0_hdrqfull = pd->port_hdrqfull;
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2006-03-30 07:23:29 +08:00
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}
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if (ipath_stats.sps_etidfull != dd->ipath_last_tidfull) {
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blen += snprintf(buf + blen, sizeof buf - blen,
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"%srcvegrfull %llu",
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blen ? ", " : "",
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(unsigned long long)
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(ipath_stats.sps_etidfull -
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dd->ipath_last_tidfull));
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dd->ipath_last_tidfull = ipath_stats.sps_etidfull;
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}
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/*
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* this is actually the number of hdrq full interrupts, not actual
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* events, but at the moment that's mostly what I'm interested in.
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* Actual count, etc. is in the counters, if needed. For production
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* users this won't ordinarily be printed.
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*/
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if ((ipath_debug & (__IPATH_PKTDBG | __IPATH_DBG)) &&
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ipath_stats.sps_hdrqfull != last_tot_hdrqfull) {
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blen += snprintf(buf + blen, sizeof buf - blen,
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"%shdrqfull %llu (all ports)",
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blen ? ", " : "",
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(unsigned long long)
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(ipath_stats.sps_hdrqfull -
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last_tot_hdrqfull));
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last_tot_hdrqfull = ipath_stats.sps_hdrqfull;
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}
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if (blen)
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ipath_dbg("%s\n", buf);
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2008-04-17 12:09:29 +08:00
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hdrqtail = ipath_get_hdrqtail(pd);
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if (pd->port_head != hdrqtail) {
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2006-03-30 07:23:29 +08:00
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if (dd->ipath_lastport0rcv_cnt ==
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ipath_stats.sps_port0pkts) {
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ipath_cdbg(PKT, "missing rcv interrupts? "
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2008-04-17 12:09:29 +08:00
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"port0 hd=%x tl=%x; port0pkts %llx; write"
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" hd (w/intr)\n",
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pd->port_head, hdrqtail,
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2006-03-30 07:23:29 +08:00
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(unsigned long long)
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ipath_stats.sps_port0pkts);
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2008-04-17 12:09:29 +08:00
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ipath_write_ureg(dd, ur_rcvhdrhead, hdrqtail |
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dd->ipath_rhdrhead_intr_off, pd->port_port);
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2006-03-30 07:23:29 +08:00
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}
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dd->ipath_lastport0rcv_cnt = ipath_stats.sps_port0pkts;
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}
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}
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2007-07-21 05:41:26 +08:00
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static void ipath_chk_errormask(struct ipath_devdata *dd)
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{
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static u32 fixed;
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u32 ctrl;
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unsigned long errormask;
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unsigned long hwerrs;
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if (!dd->ipath_errormask || !(dd->ipath_flags & IPATH_INITTED))
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return;
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errormask = ipath_read_kreg64(dd, dd->ipath_kregs->kr_errormask);
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if (errormask == dd->ipath_errormask)
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return;
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fixed++;
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hwerrs = ipath_read_kreg64(dd, dd->ipath_kregs->kr_hwerrstatus);
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ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);
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ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
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dd->ipath_errormask);
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if ((hwerrs & dd->ipath_hwerrmask) ||
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(ctrl & INFINIPATH_C_FREEZEMODE)) {
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/* force re-interrupt of pending events, just in case */
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ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, 0ULL);
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ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, 0ULL);
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ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
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dev_info(&dd->pcidev->dev,
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"errormask fixed(%u) %lx -> %lx, ctrl %x hwerr %lx\n",
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fixed, errormask, (unsigned long)dd->ipath_errormask,
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ctrl, hwerrs);
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} else
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ipath_dbg("errormask fixed(%u) %lx -> %lx, no freeze\n",
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fixed, errormask,
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(unsigned long)dd->ipath_errormask);
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}
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2006-03-30 07:23:29 +08:00
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/**
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* ipath_get_faststats - get word counters from chip before they overflow
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* @opaque - contains a pointer to the infinipath device ipath_devdata
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*
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* called from add_timer
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*/
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void ipath_get_faststats(unsigned long opaque)
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{
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struct ipath_devdata *dd = (struct ipath_devdata *) opaque;
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2007-12-06 16:28:02 +08:00
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int i;
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2006-03-30 07:23:29 +08:00
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static unsigned cnt;
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2007-05-17 22:26:28 +08:00
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unsigned long flags;
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2007-10-03 04:26:45 +08:00
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u64 traffic_wds;
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2006-03-30 07:23:29 +08:00
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/*
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* don't access the chip while running diags, or memory diags can
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* fail
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*/
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2007-03-16 05:45:08 +08:00
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if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_INITTED) ||
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2006-03-30 07:23:29 +08:00
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ipath_diag_inuse)
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/* but re-arm the timer, for diags case; won't hurt other */
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goto done;
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2007-05-17 22:26:28 +08:00
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/*
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* We now try to maintain a "active timer", based on traffic
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* exceeding a threshold, so we need to check the word-counts
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* even if they are 64-bit.
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*/
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2007-10-03 04:26:45 +08:00
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traffic_wds = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt) +
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ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
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2007-05-17 22:26:28 +08:00
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spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
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2007-10-03 04:26:45 +08:00
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traffic_wds -= dd->ipath_traffic_wds;
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dd->ipath_traffic_wds += traffic_wds;
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if (traffic_wds >= IPATH_TRAFFIC_ACTIVE_THRESHOLD)
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2007-05-17 22:26:28 +08:00
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atomic_add(5, &dd->ipath_active_time); /* S/B #define */
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spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);
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2006-03-30 07:23:29 +08:00
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if (dd->ipath_flags & IPATH_32BITCOUNTERS) {
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ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
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ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
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}
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ipath_qcheck(dd);
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/*
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* deal with repeat error suppression. Doesn't really matter if
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* last error was almost a full interval ago, or just a few usecs
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* ago; still won't get more than 2 per interval. We may want
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* longer intervals for this eventually, could do with mod, counter
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* or separate timer. Also see code in ipath_handle_errors() and
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* ipath_handle_hwerrors().
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*/
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if (dd->ipath_lasterror)
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dd->ipath_lasterror = 0;
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if (dd->ipath_lasthwerror)
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dd->ipath_lasthwerror = 0;
|
2007-07-21 05:41:26 +08:00
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if (dd->ipath_maskederrs
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2006-03-30 07:23:29 +08:00
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&& time_after(jiffies, dd->ipath_unmasktime)) {
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char ebuf[256];
|
2007-03-16 05:44:55 +08:00
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int iserr;
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2008-04-17 12:09:32 +08:00
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iserr = ipath_decode_err(dd, ebuf, sizeof ebuf,
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dd->ipath_maskederrs);
|
2007-07-21 05:41:26 +08:00
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if (dd->ipath_maskederrs &
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2008-04-17 12:09:29 +08:00
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~(INFINIPATH_E_RRCVEGRFULL | INFINIPATH_E_RRCVHDRFULL |
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INFINIPATH_E_PKTERRS))
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2006-03-30 07:23:29 +08:00
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ipath_dev_err(dd, "Re-enabling masked errors "
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"(%s)\n", ebuf);
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else {
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/*
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* rcvegrfull and rcvhdrqfull are "normal", for some
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* types of processes (mostly benchmarks) that send
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* huge numbers of messages, while not processing
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* them. So only complain about these at debug
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* level.
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*/
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2007-03-16 05:44:55 +08:00
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if (iserr)
|
2008-04-17 12:09:29 +08:00
|
|
|
ipath_dbg(
|
|
|
|
"Re-enabling queue full errors (%s)\n",
|
|
|
|
ebuf);
|
2007-03-16 05:44:55 +08:00
|
|
|
else
|
|
|
|
ipath_cdbg(ERRPKT, "Re-enabling packet"
|
2008-04-17 12:09:29 +08:00
|
|
|
" problem interrupt (%s)\n", ebuf);
|
2006-03-30 07:23:29 +08:00
|
|
|
}
|
2007-07-21 05:41:26 +08:00
|
|
|
|
|
|
|
/* re-enable masked errors */
|
|
|
|
dd->ipath_errormask |= dd->ipath_maskederrs;
|
2006-03-30 07:23:29 +08:00
|
|
|
ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
|
2008-04-17 12:09:29 +08:00
|
|
|
dd->ipath_errormask);
|
2007-07-21 05:41:26 +08:00
|
|
|
dd->ipath_maskederrs = 0;
|
2006-03-30 07:23:29 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* limit qfull messages to ~one per minute per port */
|
|
|
|
if ((++cnt & 0x10)) {
|
2007-12-06 16:28:02 +08:00
|
|
|
for (i = (int) dd->ipath_cfgports; --i >= 0; ) {
|
|
|
|
struct ipath_portdata *pd = dd->ipath_pd[i];
|
|
|
|
|
|
|
|
if (pd && pd->port_lastrcvhdrqtail != -1)
|
|
|
|
pd->port_lastrcvhdrqtail = -1;
|
2006-03-30 07:23:29 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-07-21 05:41:26 +08:00
|
|
|
ipath_chk_errormask(dd);
|
2006-03-30 07:23:29 +08:00
|
|
|
done:
|
|
|
|
mod_timer(&dd->ipath_stats_timer, jiffies + HZ * 5);
|
|
|
|
}
|