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linux/drivers/clk/imx/clk-imx25.c

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ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
/*
* Copyright (C) 2009 by Sascha Hauer, Pengutronix
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/err.h>
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
#include "clk.h"
#define CCM_MPCTL 0x00
#define CCM_UPCTL 0x04
#define CCM_CCTL 0x08
#define CCM_CGCR0 0x0C
#define CCM_CGCR1 0x10
#define CCM_CGCR2 0x14
#define CCM_PCDR0 0x18
#define CCM_PCDR1 0x1C
#define CCM_PCDR2 0x20
#define CCM_PCDR3 0x24
#define CCM_RCSR 0x28
#define CCM_CRDR 0x2C
#define CCM_DCVR0 0x30
#define CCM_DCVR1 0x34
#define CCM_DCVR2 0x38
#define CCM_DCVR3 0x3c
#define CCM_LTR0 0x40
#define CCM_LTR1 0x44
#define CCM_LTR2 0x48
#define CCM_LTR3 0x4c
#define CCM_MCR 0x64
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
#define ccm(x) (ccm_base + (x))
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
static struct clk_onecell_data clk_data;
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", };
static const char *per_sel_clks[] = { "ahb", "upll", };
ARM: mx25: Add CLKO support CLKO support is a clock output on mx25 which can output many of the internal clock sources. It is useful for debugging purpose or also for driving the audio codec for example. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-03-12 02:55:46 +08:00
static const char *cko_sel_clks[] = { "dummy", "osc", "cpu", "ahb",
"ipg", "dummy", "dummy", "dummy",
"dummy", "dummy", "per0", "per2",
"per13", "per14", "usbotg_ahb", "dummy",};
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
enum mx25_clks {
dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg,
per0_sel, per1_sel, per2_sel, per3_sel, per4_sel, per5_sel, per6_sel,
per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel,
per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5,
per6, per7, per8, per9, per10, per11, per12, per13, per14, per15,
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
csi_ipg_per, epit_ipg_per, esai_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per,
gpt_ipg_per, i2c_ipg_per, lcdc_ipg_per, nfc_ipg_per, owire_ipg_per,
pwm_ipg_per, sim1_ipg_per, sim2_ipg_per, ssi1_ipg_per, ssi2_ipg_per,
uart_ipg_per, ata_ahb, reserved1, csi_ahb, emi_ahb, esai_ahb, esdhc1_ahb,
esdhc2_ahb, fec_ahb, lcdc_ahb, rtic_ahb, sdma_ahb, slcdc_ahb, usbotg_ahb,
reserved2, reserved3, reserved4, reserved5, can1_ipg, can2_ipg, csi_ipg,
cspi1_ipg, cspi2_ipg, cspi3_ipg, dryice_ipg, ect_ipg, epit1_ipg, epit2_ipg,
reserved6, esdhc1_ipg, esdhc2_ipg, fec_ipg, reserved7, reserved8, reserved9,
gpt1_ipg, gpt2_ipg, gpt3_ipg, gpt4_ipg, reserved10, reserved11, reserved12,
iim_ipg, reserved13, reserved14, kpp_ipg, lcdc_ipg, reserved15, pwm1_ipg,
pwm2_ipg, pwm3_ipg, pwm4_ipg, rngb_ipg, reserved16, scc_ipg, sdma_ipg,
sim1_ipg, sim2_ipg, slcdc_ipg, spba_ipg, ssi1_ipg, ssi2_ipg, tsc_ipg,
uart1_ipg, uart2_ipg, uart3_ipg, uart4_ipg, uart5_ipg, reserved17,
ARM: mx25: Add CLKO support CLKO support is a clock output on mx25 which can output many of the internal clock sources. It is useful for debugging purpose or also for driving the audio codec for example. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-03-12 02:55:46 +08:00
wdt_ipg, cko_div, cko_sel, cko, clk_max
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
};
static struct clk *clk[clk_max];
clk: imx25: retain early UART clocks during kernel init Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-09-22 00:53:58 +08:00
static struct clk ** const uart_clks[] __initconst = {
&clk[uart_ipg_per],
&clk[uart1_ipg],
&clk[uart2_ipg],
&clk[uart3_ipg],
&clk[uart4_ipg],
&clk[uart5_ipg],
NULL
};
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
static int __init __mx25_clocks_init(unsigned long osc_rate,
void __iomem *ccm_base)
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
{
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
BUG_ON(!ccm_base);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[dummy] = imx_clk_fixed("dummy", 0);
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
clk[osc] = imx_clk_fixed("osc", osc_rate);
ARM: imx: add clk-pllv1 type support Instead of calling cpu_is_xxx() in clk-pllv1 driver, let's add clk-pllv1 type support to handle the difference/quirk in particular SoC designs. Doing so will help get clk-pllv1 driver ready for being moved out of arch/arm/mach-imx folder. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-04-26 13:33:39 +08:00
clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "mpll", "osc", ccm(CCM_MPCTL));
clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "upll", "osc", ccm(CCM_UPCTL));
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4);
clk[cpu_sel] = imx_clk_mux("cpu_sel", ccm(CCM_CCTL), 14, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));
clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2);
clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2);
clk[usb_div] = imx_clk_divider("usb_div", "upll", ccm(CCM_CCTL), 16, 6);
clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);
clk[per0_sel] = imx_clk_mux("per0_sel", ccm(CCM_MCR), 0, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per1_sel] = imx_clk_mux("per1_sel", ccm(CCM_MCR), 1, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per2_sel] = imx_clk_mux("per2_sel", ccm(CCM_MCR), 2, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per3_sel] = imx_clk_mux("per3_sel", ccm(CCM_MCR), 3, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per4_sel] = imx_clk_mux("per4_sel", ccm(CCM_MCR), 4, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per5_sel] = imx_clk_mux("per5_sel", ccm(CCM_MCR), 5, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per6_sel] = imx_clk_mux("per6_sel", ccm(CCM_MCR), 6, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per7_sel] = imx_clk_mux("per7_sel", ccm(CCM_MCR), 7, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per8_sel] = imx_clk_mux("per8_sel", ccm(CCM_MCR), 8, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per9_sel] = imx_clk_mux("per9_sel", ccm(CCM_MCR), 9, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per10_sel] = imx_clk_mux("per10_sel", ccm(CCM_MCR), 10, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per11_sel] = imx_clk_mux("per11_sel", ccm(CCM_MCR), 11, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per12_sel] = imx_clk_mux("per12_sel", ccm(CCM_MCR), 12, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per13_sel] = imx_clk_mux("per13_sel", ccm(CCM_MCR), 13, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per14_sel] = imx_clk_mux("per14_sel", ccm(CCM_MCR), 14, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
clk[per15_sel] = imx_clk_mux("per15_sel", ccm(CCM_MCR), 15, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks));
ARM: mx25: Add CLKO support CLKO support is a clock output on mx25 which can output many of the internal clock sources. It is useful for debugging purpose or also for driving the audio codec for example. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-03-12 02:55:46 +08:00
clk[cko_div] = imx_clk_divider("cko_div", "cko_sel", ccm(CCM_MCR), 24, 6);
clk[cko_sel] = imx_clk_mux("cko_sel", ccm(CCM_MCR), 20, 4, cko_sel_clks, ARRAY_SIZE(cko_sel_clks));
clk[cko] = imx_clk_gate("cko", "cko_div", ccm(CCM_MCR), 30);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[per0] = imx_clk_divider("per0", "per0_sel", ccm(CCM_PCDR0), 0, 6);
clk[per1] = imx_clk_divider("per1", "per1_sel", ccm(CCM_PCDR0), 8, 6);
clk[per2] = imx_clk_divider("per2", "per2_sel", ccm(CCM_PCDR0), 16, 6);
clk[per3] = imx_clk_divider("per3", "per3_sel", ccm(CCM_PCDR0), 24, 6);
clk[per4] = imx_clk_divider("per4", "per4_sel", ccm(CCM_PCDR1), 0, 6);
clk[per5] = imx_clk_divider("per5", "per5_sel", ccm(CCM_PCDR1), 8, 6);
clk[per6] = imx_clk_divider("per6", "per6_sel", ccm(CCM_PCDR1), 16, 6);
clk[per7] = imx_clk_divider("per7", "per7_sel", ccm(CCM_PCDR1), 24, 6);
clk[per8] = imx_clk_divider("per8", "per8_sel", ccm(CCM_PCDR2), 0, 6);
clk[per9] = imx_clk_divider("per9", "per9_sel", ccm(CCM_PCDR2), 8, 6);
clk[per10] = imx_clk_divider("per10", "per10_sel", ccm(CCM_PCDR2), 16, 6);
clk[per11] = imx_clk_divider("per11", "per11_sel", ccm(CCM_PCDR2), 24, 6);
clk[per12] = imx_clk_divider("per12", "per12_sel", ccm(CCM_PCDR3), 0, 6);
clk[per13] = imx_clk_divider("per13", "per13_sel", ccm(CCM_PCDR3), 8, 6);
clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6);
clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6);
clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[epit_ipg_per] = imx_clk_gate("epit_ipg_per", "per1", ccm(CCM_CGCR0), 1);
clk[esai_ipg_per] = imx_clk_gate("esai_ipg_per", "per2", ccm(CCM_CGCR0), 2);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0), 3);
clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4);
clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5);
clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6);
ARM i.MX25: Fix lcdc_ipg_per parent clock It's per7, not per6. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-08 14:46:06 +08:00
clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7);
ARM i.MX25 clk: Fix nfc_ipg_per parent It's per8, there is no ipg_per clk. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:03:00 +08:00
clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[owire_ipg_per] = imx_clk_gate("owire_ipg_per", "per9", ccm(CCM_CGCR0), 9);
clk[pwm_ipg_per] = imx_clk_gate("pwm_ipg_per", "per10", ccm(CCM_CGCR0), 10);
clk[sim1_ipg_per] = imx_clk_gate("sim1_ipg_per", "per11", ccm(CCM_CGCR0), 11);
clk[sim2_ipg_per] = imx_clk_gate("sim2_ipg_per", "per12", ccm(CCM_CGCR0), 12);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[ata_ahb] = imx_clk_gate("ata_ahb", "ahb", ccm(CCM_CGCR0), 16);
/* CCM_CGCR0(17): reserved */
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[emi_ahb] = imx_clk_gate("emi_ahb", "ahb", ccm(CCM_CGCR0), 19);
clk[esai_ahb] = imx_clk_gate("esai_ahb", "ahb", ccm(CCM_CGCR0), 20);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21);
clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22);
clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23);
clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[rtic_ahb] = imx_clk_gate("rtic_ahb", "ahb", ccm(CCM_CGCR0), 25);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[slcdc_ahb] = imx_clk_gate("slcdc_ahb", "ahb", ccm(CCM_CGCR0), 27);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
/* CCM_CGCR0(29-31): reserved */
/* CCM_CGCR1(0): reserved in datasheet, used as audmux in FSL kernel */
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2);
clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3);
clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4);
clk[cspi1_ipg] = imx_clk_gate("cspi1_ipg", "ipg", ccm(CCM_CGCR1), 5);
clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6);
clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7);
clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[ect_ipg] = imx_clk_gate("ect_ipg", "ipg", ccm(CCM_CGCR1), 9);
clk[epit1_ipg] = imx_clk_gate("epit1_ipg", "ipg", ccm(CCM_CGCR1), 10);
clk[epit2_ipg] = imx_clk_gate("epit2_ipg", "ipg", ccm(CCM_CGCR1), 11);
/* CCM_CGCR1(12): reserved in datasheet, used as esai in FSL kernel */
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13);
clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14);
clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
/* CCM_CGCR1(16): reserved in datasheet, used as gpio1 in FSL kernel */
/* CCM_CGCR1(17): reserved in datasheet, used as gpio2 in FSL kernel */
/* CCM_CGCR1(18): reserved in datasheet, used as gpio3 in FSL kernel */
clk[gpt1_ipg] = imx_clk_gate("gpt1_ipg", "ipg", ccm(CCM_CGCR1), 19);
clk[gpt2_ipg] = imx_clk_gate("gpt2_ipg", "ipg", ccm(CCM_CGCR1), 20);
clk[gpt3_ipg] = imx_clk_gate("gpt3_ipg", "ipg", ccm(CCM_CGCR1), 21);
clk[gpt4_ipg] = imx_clk_gate("gpt4_ipg", "ipg", ccm(CCM_CGCR1), 22);
/* CCM_CGCR1(23): reserved in datasheet, used as i2c1 in FSL kernel */
/* CCM_CGCR1(24): reserved in datasheet, used as i2c2 in FSL kernel */
/* CCM_CGCR1(25): reserved in datasheet, used as i2c3 in FSL kernel */
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
/* CCM_CGCR1(27): reserved in datasheet, used as iomuxc in FSL kernel */
/* CCM_CGCR1(28): reserved in datasheet, used as kpp in FSL kernel */
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28);
clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
/* CCM_CGCR1(30): reserved in datasheet, used as owire in FSL kernel */
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31);
clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2), 0);
clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2), 1);
clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2), 2);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", ccm(CCM_CGCR2), 3);
/* CCM_CGCR2(4): reserved in datasheet, used as rtic in FSL kernel */
clk[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", ccm(CCM_CGCR2), 5);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2), 6);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk[sim1_ipg] = imx_clk_gate("sim1_ipg", "ipg", ccm(CCM_CGCR2), 7);
clk[sim2_ipg] = imx_clk_gate("sim2_ipg", "ipg", ccm(CCM_CGCR2), 8);
clk[slcdc_ipg] = imx_clk_gate("slcdc_ipg", "ipg", ccm(CCM_CGCR2), 9);
clk[spba_ipg] = imx_clk_gate("spba_ipg", "ipg", ccm(CCM_CGCR2), 10);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11);
clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12);
clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13);
clk[uart1_ipg] = imx_clk_gate("uart1_ipg", "ipg", ccm(CCM_CGCR2), 14);
clk[uart2_ipg] = imx_clk_gate("uart2_ipg", "ipg", ccm(CCM_CGCR2), 15);
clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16);
clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17);
clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18);
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
/* CCM_CGCR2(19): reserved in datasheet, but used as wdt in FSL kernel */
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19);
ARM: i.MX clk: Move clock check function in common location This patch moves clock check function in common i.MX location and switch i.MX clk drivers to use this new function. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-10 23:40:26 +08:00
imx_check_clocks(clk, ARRAY_SIZE(clk));
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
ARM i.MX25: Add missing clock gates This completes the list of clock gates on the i.MX25. There are several clocks marked as reserved in the datasheet, but nevertheless used in the Freescale kernel. Add some comments to their positions and add 'reservedx' entries to the clk enum. This way we can replace them with the real names should we need them later. Adding the reserved entry names will help us keeping the clk numbers when moving to devicetree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-10-09 16:04:57 +08:00
clk_prepare_enable(clk[emi_ahb]);
ARM: i.MX25: clk: parent per5_clk to AHB clock The mxc-timer on the imx25 needs to be derived from the AHB clock. If a bootloader reparents this clock to the ipg_clk_highfreq, which according to the datasheet is a valid operation, the system can/will produce lockups/ freezes after some time [1]. This can be forced with code like while(1) syscall(SYS_clock_gettime, CLOCK_REALTIME, &tp); This was already fixed with the commit "i.MX25 GPT clock fix: ensure correct the clock source" [2], for 3.1-rc2, but was lost, when i.MX was converted to the common clock framework ("ARM i.MX25: implement clocks using common clock framework") [3] [1]: http://lists.arm.linux.org.uk/lurker/message/20130129.161230.229bda17.en.html [2]: 2012d9ca2a1381ae3e733330a7f0d1d2f1988bba [3]: 6bbaec5676e4f475b0d78743cbd4c70a8804ce14 Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Cc: stable@vger.kernel.org # v3.5+ Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-01-30 21:16:00 +08:00
/* Clock source for gpt must be derived from AHB */
clk_set_parent(clk[per5_sel], clk[ahb]);
ARM: mx25: Add CLKO support CLKO support is a clock output on mx25 which can output many of the internal clock sources. It is useful for debugging purpose or also for driving the audio codec for example. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-03-12 02:55:46 +08:00
/*
* Let's initially set up CLKO parent as ipg, since this configuration
* is used on some imx25 board designs to clock the audio codec.
*/
clk_set_parent(clk[cko_sel], clk[ipg]);
clk: imx25: retain early UART clocks during kernel init Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-09-22 00:53:58 +08:00
imx_register_uart_clocks(uart_clks);
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
return 0;
}
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
static void __init mx25_clocks_init_dt(struct device_node *np)
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
{
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
struct device_node *refnp;
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
unsigned long osc_rate = 24000000;
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
void __iomem *ccm;
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
/* retrieve the freqency of fixed clocks from device tree */
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
for_each_compatible_node(refnp, NULL, "fixed-clock") {
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
u32 rate;
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
if (of_property_read_u32(refnp, "clock-frequency", &rate))
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
continue;
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
if (of_device_is_compatible(refnp, "fsl,imx-osc"))
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
osc_rate = rate;
}
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
ccm = of_iomap(np, 0);
__mx25_clocks_init(osc_rate, ccm);
ARM i.MX25: Add devicetree support This adds a i.MX25 dt machine descriptor and changes the clock support to optionally initialize from dt. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-09-20 20:59:36 +08:00
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
ARM i.MX25: implement clocks using common clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-03-09 05:24:12 +08:00
}
ARM: i.MX25 clk: Use of_clk_init() for DT case Replace .init_time() hook with of_clk_init() for DT targets. Based on: d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-25 20:41:36 +08:00
CLK_OF_DECLARE(imx25_ccm, "fsl,imx25-ccm", mx25_clocks_init_dt);