2014-03-02 01:09:26 +08:00
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Allwinner sun4i USB PHY
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-----------------------
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Required properties:
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2014-05-14 20:58:57 +08:00
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- compatible : should be one of
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* allwinner,sun4i-a10-usb-phy
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* allwinner,sun5i-a13-usb-phy
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* allwinner,sun6i-a31-usb-phy
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* allwinner,sun7i-a20-usb-phy
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2014-03-02 01:09:26 +08:00
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- reg : a list of offset + length pairs
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2014-05-14 20:58:57 +08:00
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- reg-names :
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* "phy_ctrl"
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* "pmu1"
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* "pmu2" for sun4i, sun6i or sun7i
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2014-03-02 01:09:26 +08:00
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- #phy-cells : from the generic phy bindings, must be 1
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2014-05-14 20:58:57 +08:00
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- clocks : phandle + clock specifier for the phy clocks
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- clock-names :
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* "usb_phy" for sun4i, sun5i or sun7i
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* "usb0_phy", "usb1_phy" and "usb2_phy" for sun6i
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2014-03-02 01:09:26 +08:00
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- resets : a list of phandle + reset specifier pairs
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2014-05-14 20:58:57 +08:00
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- reset-names :
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* "usb0_reset"
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* "usb1_reset"
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* "usb2_reset" for sun4i, sun6i or sun7i
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2014-03-02 01:09:26 +08:00
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Example:
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usbphy: phy@0x01c13400 {
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#phy-cells = <1>;
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compatible = "allwinner,sun4i-a10-usb-phy";
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/* phy base regs, phy1 pmu reg, phy2 pmu reg */
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reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
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reg-names = "phy_ctrl", "pmu1", "pmu2";
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clocks = <&usb_clk 8>;
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clock-names = "usb_phy";
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resets = <&usb_clk 1>, <&usb_clk 2>;
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reset-names = "usb1_reset", "usb2_reset";
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};
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