2012-07-19 06:07:18 +08:00
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/*
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2013-04-11 23:55:26 +08:00
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* Copyright 2011-2012 Calxeda, Inc.
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* Copyright (C) 2012-2013 Altera Corporation <www.altera.com>
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2012-07-19 06:07:18 +08:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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2013-04-11 23:55:26 +08:00
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* Based from clk-highbank.c
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*
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2012-07-19 06:07:18 +08:00
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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2013-04-11 23:55:26 +08:00
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#include <linux/io.h>
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#include <linux/of.h>
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2013-12-10 07:16:38 +08:00
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#include <linux/of_address.h>
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2012-07-19 06:07:18 +08:00
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2014-01-07 00:27:37 +08:00
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#include "clk.h"
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2012-07-19 06:07:18 +08:00
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2014-01-07 00:27:37 +08:00
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void __iomem *clk_mgr_base_addr;
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2013-12-10 07:16:38 +08:00
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clk: socfpga: Fix section mismatch warning
WARNING: drivers/clk/socfpga/built-in.o(.data+0xc0): Section mismatch in
reference from the variable socfpga_child_clocks to the function
.init.text:socfpga_pll_init()
The variable socfpga_child_clocks references
the function __init socfpga_pll_init()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console
WARNING: drivers/clk/socfpga/built-in.o(.data+0x184): Section mismatch in
reference from the variable socfpga_child_clocks to the function
.init.text:socfpga_periph_init()
The variable socfpga_child_clocks references
the function __init socfpga_periph_init()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console
WARNING: drivers/clk/socfpga/built-in.o(.data+0x248): Section mismatch in
reference from the variable socfpga_child_clocks to the function
.init.text:socfpga_gate_init()
The variable socfpga_child_clocks references
the function __init socfpga_gate_init()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console
Reported-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-03-14 05:08:01 +08:00
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static const struct of_device_id socfpga_child_clocks[] __initconst = {
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2013-12-10 07:16:38 +08:00
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{ .compatible = "altr,socfpga-pll-clock", socfpga_pll_init, },
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{ .compatible = "altr,socfpga-perip-clk", socfpga_periph_init, },
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{ .compatible = "altr,socfpga-gate-clk", socfpga_gate_init, },
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{},
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};
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static void __init socfpga_clkmgr_init(struct device_node *node)
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{
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clk_mgr_base_addr = of_iomap(node, 0);
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of_clk_init(socfpga_child_clocks);
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}
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CLK_OF_DECLARE(socfpga_mgr, "altr,clk-mgr", socfpga_clkmgr_init);
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2013-06-05 23:02:55 +08:00
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