2019-01-10 12:02:03 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
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#ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
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#define _DT_BINDINGS_POWER_QCOM_RPMPD_H
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/* SDM845 Power Domain Indexes */
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#define SDM845_EBI 0
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#define SDM845_MX 1
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#define SDM845_MX_AO 2
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#define SDM845_CX 3
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#define SDM845_CX_AO 4
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#define SDM845_LMX 5
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#define SDM845_LCX 6
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#define SDM845_GFX 7
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#define SDM845_MSS 8
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2019-11-19 01:40:08 +08:00
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/* SM8150 Power Domain Indexes */
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#define SM8150_MSS 0
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#define SM8150_EBI 1
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#define SM8150_LMX 2
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#define SM8150_LCX 3
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#define SM8150_GFX 4
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#define SM8150_MX 5
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#define SM8150_MX_AO 6
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#define SM8150_CX 7
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#define SM8150_CX_AO 8
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#define SM8150_MMCX 9
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#define SM8150_MMCX_AO 10
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2019-11-19 01:40:15 +08:00
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/* SC7180 Power Domain Indexes */
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#define SC7180_CX 0
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#define SC7180_CX_AO 1
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#define SC7180_GFX 2
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#define SC7180_MX 3
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#define SC7180_MX_AO 4
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#define SC7180_LMX 5
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#define SC7180_LCX 6
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#define SC7180_MSS 7
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2019-01-10 12:02:03 +08:00
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/* SDM845 Power Domain performance levels */
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#define RPMH_REGULATOR_LEVEL_RETENTION 16
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#define RPMH_REGULATOR_LEVEL_MIN_SVS 48
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#define RPMH_REGULATOR_LEVEL_LOW_SVS 64
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#define RPMH_REGULATOR_LEVEL_SVS 128
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#define RPMH_REGULATOR_LEVEL_SVS_L1 192
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2019-11-19 01:40:08 +08:00
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#define RPMH_REGULATOR_LEVEL_SVS_L2 224
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2019-01-10 12:02:03 +08:00
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#define RPMH_REGULATOR_LEVEL_NOM 256
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#define RPMH_REGULATOR_LEVEL_NOM_L1 320
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#define RPMH_REGULATOR_LEVEL_NOM_L2 336
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#define RPMH_REGULATOR_LEVEL_TURBO 384
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#define RPMH_REGULATOR_LEVEL_TURBO_L1 416
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2019-10-05 19:07:58 +08:00
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/* MSM8976 Power Domain Indexes */
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#define MSM8976_VDDCX 0
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#define MSM8976_VDDCX_AO 1
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#define MSM8976_VDDCX_VFL 2
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#define MSM8976_VDDMX 3
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#define MSM8976_VDDMX_AO 4
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#define MSM8976_VDDMX_VFL 5
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2019-01-10 12:02:03 +08:00
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/* MSM8996 Power Domain Indexes */
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#define MSM8996_VDDCX 0
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#define MSM8996_VDDCX_AO 1
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#define MSM8996_VDDCX_VFC 2
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#define MSM8996_VDDMX 3
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#define MSM8996_VDDMX_AO 4
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#define MSM8996_VDDSSCX 5
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#define MSM8996_VDDSSCX_VFC 6
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2019-05-13 18:20:13 +08:00
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/* MSM8998 Power Domain Indexes */
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#define MSM8998_VDDCX 0
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#define MSM8998_VDDCX_AO 1
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#define MSM8998_VDDCX_VFL 2
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#define MSM8998_VDDMX 3
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#define MSM8998_VDDMX_AO 4
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#define MSM8998_VDDMX_VFL 5
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#define MSM8998_SSCCX 6
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#define MSM8998_SSCCX_VFL 7
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#define MSM8998_SSCMX 8
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#define MSM8998_SSCMX_VFL 9
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2019-05-13 18:20:10 +08:00
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/* QCS404 Power Domains */
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#define QCS404_VDDMX 0
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#define QCS404_VDDMX_AO 1
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#define QCS404_VDDMX_VFL 2
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#define QCS404_LPICX 3
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#define QCS404_LPICX_VFL 4
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#define QCS404_LPIMX 5
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#define QCS404_LPIMX_VFL 6
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/* RPM SMD Power Domain performance levels */
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#define RPM_SMD_LEVEL_RETENTION 16
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#define RPM_SMD_LEVEL_RETENTION_PLUS 32
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#define RPM_SMD_LEVEL_MIN_SVS 48
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#define RPM_SMD_LEVEL_LOW_SVS 64
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#define RPM_SMD_LEVEL_SVS 128
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#define RPM_SMD_LEVEL_SVS_PLUS 192
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#define RPM_SMD_LEVEL_NOM 256
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#define RPM_SMD_LEVEL_NOM_PLUS 320
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#define RPM_SMD_LEVEL_TURBO 384
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#define RPM_SMD_LEVEL_TURBO_NO_CPR 416
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2019-09-21 18:12:06 +08:00
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#define RPM_SMD_LEVEL_TURBO_HIGH 448
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2019-05-13 18:20:10 +08:00
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#define RPM_SMD_LEVEL_BINNING 512
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2019-01-10 12:02:03 +08:00
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#endif
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