2019-05-27 14:55:21 +08:00
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// SPDX-License-Identifier: GPL-2.0-only
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2012-12-19 01:53:14 +08:00
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/*
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*
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* Copyright (C) 2013 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#define pr_fmt(fmt) "psci: " fmt
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#include <linux/init.h>
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#include <linux/of.h>
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2013-10-25 03:30:14 +08:00
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#include <linux/smp.h>
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2014-05-07 22:18:36 +08:00
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#include <linux/delay.h>
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2015-07-31 22:46:16 +08:00
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#include <linux/psci.h>
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2017-01-11 05:35:49 +08:00
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#include <linux/mm.h>
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2015-07-31 22:46:16 +08:00
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2014-04-18 02:38:41 +08:00
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#include <uapi/linux/psci.h>
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2012-12-19 01:53:14 +08:00
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2013-10-25 03:30:15 +08:00
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#include <asm/cpu_ops.h>
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2012-12-19 01:53:14 +08:00
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#include <asm/errno.h>
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2013-10-25 03:30:14 +08:00
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#include <asm/smp_plat.h>
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2013-09-27 17:25:02 +08:00
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2015-05-13 21:12:46 +08:00
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static int __init cpu_psci_cpu_init(unsigned int cpu)
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2013-10-25 03:30:14 +08:00
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{
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return 0;
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}
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2013-10-25 03:30:15 +08:00
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static int __init cpu_psci_cpu_prepare(unsigned int cpu)
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2013-10-25 03:30:14 +08:00
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{
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if (!psci_ops.cpu_on) {
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pr_err("no cpu_on method, not booting CPU%d\n", cpu);
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return -ENODEV;
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}
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return 0;
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}
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arm64: factor out spin-table boot method
The arm64 kernel has an internal holding pen, which is necessary for
some systems where we can't bring CPUs online individually and must hold
multiple CPUs in a safe area until the kernel is able to handle them.
The current SMP infrastructure for arm64 is closely coupled to this
holding pen, and alternative boot methods must launch CPUs into the pen,
where they sit before they are launched into the kernel proper.
With PSCI (and possibly other future boot methods), we can bring CPUs
online individually, and need not perform the secondary_holding_pen
dance. Instead, this patch factors the holding pen management code out
to the spin-table boot method code, as it is the only boot method
requiring the pen.
A new entry point for secondaries, secondary_entry is added for other
boot methods to use, which bypasses the holding pen and its associated
overhead when bringing CPUs online. The smp.pen.text section is also
removed, as the pen can live in head.text without problem.
The cpu_operations structure is extended with two new functions,
cpu_boot and cpu_postboot, for bringing a cpu into the kernel and
performing any post-boot cleanup required by a bootmethod (e.g.
resetting the secondary_holding_pen_release to INVALID_HWID).
Documentation is added for cpu_operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-10-25 03:30:16 +08:00
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static int cpu_psci_cpu_boot(unsigned int cpu)
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{
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2017-01-11 05:35:49 +08:00
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int err = psci_ops.cpu_on(cpu_logical_map(cpu), __pa_symbol(secondary_entry));
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arm64: factor out spin-table boot method
The arm64 kernel has an internal holding pen, which is necessary for
some systems where we can't bring CPUs online individually and must hold
multiple CPUs in a safe area until the kernel is able to handle them.
The current SMP infrastructure for arm64 is closely coupled to this
holding pen, and alternative boot methods must launch CPUs into the pen,
where they sit before they are launched into the kernel proper.
With PSCI (and possibly other future boot methods), we can bring CPUs
online individually, and need not perform the secondary_holding_pen
dance. Instead, this patch factors the holding pen management code out
to the spin-table boot method code, as it is the only boot method
requiring the pen.
A new entry point for secondaries, secondary_entry is added for other
boot methods to use, which bypasses the holding pen and its associated
overhead when bringing CPUs online. The smp.pen.text section is also
removed, as the pen can live in head.text without problem.
The cpu_operations structure is extended with two new functions,
cpu_boot and cpu_postboot, for bringing a cpu into the kernel and
performing any post-boot cleanup required by a bootmethod (e.g.
resetting the secondary_holding_pen_release to INVALID_HWID).
Documentation is added for cpu_operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-10-25 03:30:16 +08:00
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if (err)
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2014-02-28 17:57:47 +08:00
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pr_err("failed to boot CPU%d (%d)\n", cpu, err);
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arm64: factor out spin-table boot method
The arm64 kernel has an internal holding pen, which is necessary for
some systems where we can't bring CPUs online individually and must hold
multiple CPUs in a safe area until the kernel is able to handle them.
The current SMP infrastructure for arm64 is closely coupled to this
holding pen, and alternative boot methods must launch CPUs into the pen,
where they sit before they are launched into the kernel proper.
With PSCI (and possibly other future boot methods), we can bring CPUs
online individually, and need not perform the secondary_holding_pen
dance. Instead, this patch factors the holding pen management code out
to the spin-table boot method code, as it is the only boot method
requiring the pen.
A new entry point for secondaries, secondary_entry is added for other
boot methods to use, which bypasses the holding pen and its associated
overhead when bringing CPUs online. The smp.pen.text section is also
removed, as the pen can live in head.text without problem.
The cpu_operations structure is extended with two new functions,
cpu_boot and cpu_postboot, for bringing a cpu into the kernel and
performing any post-boot cleanup required by a bootmethod (e.g.
resetting the secondary_holding_pen_release to INVALID_HWID).
Documentation is added for cpu_operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-10-25 03:30:16 +08:00
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return err;
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}
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2013-10-25 03:30:19 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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2019-06-12 20:51:37 +08:00
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static bool cpu_psci_cpu_can_disable(unsigned int cpu)
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{
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return !psci_tos_resident_on(cpu);
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}
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2013-10-25 03:30:19 +08:00
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static int cpu_psci_cpu_disable(unsigned int cpu)
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{
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/* Fail early if we don't have CPU_OFF support */
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if (!psci_ops.cpu_off)
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return -EOPNOTSUPP;
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2015-04-23 01:10:26 +08:00
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/* Trusted OS will deny CPU_OFF */
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if (psci_tos_resident_on(cpu))
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return -EPERM;
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2013-10-25 03:30:19 +08:00
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return 0;
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}
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static void cpu_psci_cpu_die(unsigned int cpu)
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{
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int ret;
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/*
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* There are no known implementations of PSCI actually using the
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* power state field, pass a sensible default for now.
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*/
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2015-05-01 00:59:03 +08:00
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u32 state = PSCI_POWER_STATE_TYPE_POWER_DOWN <<
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PSCI_0_2_POWER_STATE_TYPE_SHIFT;
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2013-10-25 03:30:19 +08:00
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ret = psci_ops.cpu_off(state);
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2014-02-28 17:57:47 +08:00
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pr_crit("unable to power off CPU%u (%d)\n", cpu, ret);
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2013-10-25 03:30:19 +08:00
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}
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2014-05-07 22:18:36 +08:00
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static int cpu_psci_cpu_kill(unsigned int cpu)
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{
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int err, i;
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if (!psci_ops.affinity_info)
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2015-04-21 00:55:30 +08:00
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return 0;
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2014-05-07 22:18:36 +08:00
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/*
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* cpu_kill could race with cpu_die and we can
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* potentially end up declaring this cpu undead
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* while it is dying. So, try again a few times.
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*/
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for (i = 0; i < 10; i++) {
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err = psci_ops.affinity_info(cpu_logical_map(cpu), 0);
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if (err == PSCI_0_2_AFFINITY_LEVEL_OFF) {
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pr_info("CPU%d killed.\n", cpu);
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2015-04-21 00:55:30 +08:00
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return 0;
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2014-05-07 22:18:36 +08:00
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}
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msleep(10);
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pr_info("Retrying again to check for CPU kill\n");
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}
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pr_warn("CPU%d may not have shut down cleanly (AFFINITY_INFO reports %d)\n",
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cpu, err);
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2015-04-21 00:55:30 +08:00
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return -ETIMEDOUT;
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2014-05-07 22:18:36 +08:00
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}
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2013-10-25 03:30:19 +08:00
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#endif
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2013-10-25 03:30:15 +08:00
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const struct cpu_operations cpu_psci_ops = {
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2013-10-25 03:30:14 +08:00
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.name = "psci",
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2013-10-25 03:30:15 +08:00
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.cpu_init = cpu_psci_cpu_init,
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.cpu_prepare = cpu_psci_cpu_prepare,
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arm64: factor out spin-table boot method
The arm64 kernel has an internal holding pen, which is necessary for
some systems where we can't bring CPUs online individually and must hold
multiple CPUs in a safe area until the kernel is able to handle them.
The current SMP infrastructure for arm64 is closely coupled to this
holding pen, and alternative boot methods must launch CPUs into the pen,
where they sit before they are launched into the kernel proper.
With PSCI (and possibly other future boot methods), we can bring CPUs
online individually, and need not perform the secondary_holding_pen
dance. Instead, this patch factors the holding pen management code out
to the spin-table boot method code, as it is the only boot method
requiring the pen.
A new entry point for secondaries, secondary_entry is added for other
boot methods to use, which bypasses the holding pen and its associated
overhead when bringing CPUs online. The smp.pen.text section is also
removed, as the pen can live in head.text without problem.
The cpu_operations structure is extended with two new functions,
cpu_boot and cpu_postboot, for bringing a cpu into the kernel and
performing any post-boot cleanup required by a bootmethod (e.g.
resetting the secondary_holding_pen_release to INVALID_HWID).
Documentation is added for cpu_operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2013-10-25 03:30:16 +08:00
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.cpu_boot = cpu_psci_cpu_boot,
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2013-10-25 03:30:19 +08:00
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#ifdef CONFIG_HOTPLUG_CPU
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2019-06-12 20:51:37 +08:00
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.cpu_can_disable = cpu_psci_cpu_can_disable,
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2013-10-25 03:30:19 +08:00
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.cpu_disable = cpu_psci_cpu_disable,
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.cpu_die = cpu_psci_cpu_die,
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2014-05-07 22:18:36 +08:00
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.cpu_kill = cpu_psci_cpu_kill,
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2013-10-25 03:30:19 +08:00
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#endif
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2013-10-25 03:30:14 +08:00
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};
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