2010-10-07 21:06:16 +08:00
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/*
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2013-02-02 02:00:40 +08:00
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* Samsung S5P/Exynos4 SoC series camera interface driver header
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2010-10-07 21:06:16 +08:00
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*
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2013-02-02 02:00:40 +08:00
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* Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
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* Sylwester Nawrocki <s.nawrocki@samsung.com>
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2010-10-07 21:06:16 +08:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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2010-12-28 01:42:15 +08:00
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#ifndef S5P_FIMC_H_
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#define S5P_FIMC_H_
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2010-10-07 21:06:16 +08:00
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2012-08-14 21:46:58 +08:00
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#include <media/media-entity.h>
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2013-05-31 22:37:18 +08:00
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#include <media/v4l2-dev.h>
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2013-02-26 00:20:21 +08:00
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#include <media/v4l2-mediabus.h>
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2012-08-14 21:46:58 +08:00
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2013-03-26 19:20:30 +08:00
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/*
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* Enumeration of data inputs to the camera subsystem.
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*/
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enum fimc_input {
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FIMC_INPUT_PARALLEL_0 = 1,
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FIMC_INPUT_PARALLEL_1,
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FIMC_INPUT_MIPI_CSI2_0 = 3,
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FIMC_INPUT_MIPI_CSI2_1,
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FIMC_INPUT_WRITEBACK_A = 5,
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FIMC_INPUT_WRITEBACK_B,
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FIMC_INPUT_WRITEBACK_ISP = 5,
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};
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2013-02-02 02:00:40 +08:00
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/*
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* Enumeration of the FIMC data bus types.
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*/
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enum fimc_bus_type {
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/* Camera parallel bus */
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FIMC_BUS_TYPE_ITU_601 = 1,
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/* Camera parallel bus with embedded synchronization */
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FIMC_BUS_TYPE_ITU_656,
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/* Camera MIPI-CSI2 serial bus */
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FIMC_BUS_TYPE_MIPI_CSI2,
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/* FIFO link from LCD controller (WriteBack A) */
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FIMC_BUS_TYPE_LCD_WRITEBACK_A,
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/* FIFO link from LCD controller (WriteBack B) */
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FIMC_BUS_TYPE_LCD_WRITEBACK_B,
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/* FIFO link from FIMC-IS */
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FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
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2010-10-07 21:06:16 +08:00
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};
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2013-03-30 01:12:39 +08:00
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#define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
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#define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
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2013-04-09 18:19:27 +08:00
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/*
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* The subdevices' group IDs.
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*/
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#define GRP_ID_SENSOR (1 << 8)
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#define GRP_ID_FIMC_IS_SENSOR (1 << 9)
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#define GRP_ID_WRITEBACK (1 << 10)
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#define GRP_ID_CSIS (1 << 11)
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#define GRP_ID_FIMC (1 << 12)
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#define GRP_ID_FLITE (1 << 13)
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#define GRP_ID_FIMC_IS (1 << 14)
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2010-10-07 21:06:16 +08:00
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struct i2c_board_info;
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/**
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* struct fimc_source_info - video source description required for the host
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* interface configuration
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2010-10-07 21:06:16 +08:00
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*
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* @board_info: pointer to I2C subdevice's board info
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2010-12-28 02:34:43 +08:00
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* @clk_frequency: frequency of the clock the host interface provides to sensor
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2013-02-02 02:00:40 +08:00
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* @fimc_bus_type: FIMC camera input type
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* @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
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* @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
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2010-10-07 21:06:16 +08:00
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* @i2c_bus_num: i2c control bus id the sensor is attached to
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* @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
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2011-09-01 17:01:08 +08:00
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* @clk_id: index of the SoC peripheral clock for sensors
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2010-10-07 21:06:16 +08:00
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*/
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2013-02-02 02:00:40 +08:00
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struct fimc_source_info {
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2010-10-07 21:06:16 +08:00
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struct i2c_board_info *board_info;
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2010-12-28 02:34:43 +08:00
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unsigned long clk_frequency;
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2013-02-02 02:00:40 +08:00
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enum fimc_bus_type fimc_bus_type;
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enum fimc_bus_type sensor_bus_type;
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u16 flags;
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2010-10-07 21:06:16 +08:00
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u16 i2c_bus_num;
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u16 mux_id;
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2011-09-01 17:01:08 +08:00
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u8 clk_id;
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2010-10-07 21:06:16 +08:00
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};
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/**
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2010-12-28 01:42:15 +08:00
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* struct s5p_platform_fimc - camera host interface platform data
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2010-10-07 21:06:16 +08:00
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*
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2013-02-02 02:00:40 +08:00
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* @source_info: properties of an image source for the host interface setup
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* @num_clients: the number of attached image sources
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2010-10-07 21:06:16 +08:00
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*/
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2010-12-28 01:42:15 +08:00
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struct s5p_platform_fimc {
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2013-02-02 02:00:40 +08:00
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struct fimc_source_info *source_info;
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2011-02-28 22:12:19 +08:00
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int num_clients;
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2010-10-07 21:06:16 +08:00
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};
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2011-06-11 02:36:58 +08:00
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/*
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* v4l2_device notification id. This is only for internal use in the kernel.
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* Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
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* frame capture mode when there is only one VSYNC pulse issued by the sensor
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* at begining of the frame transmission.
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*/
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#define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
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2013-02-26 00:20:21 +08:00
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#define FIMC_MAX_PLANES 3
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/**
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* struct fimc_fmt - color format data structure
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* @mbus_code: media bus pixel code, -1 if not applicable
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* @name: format description
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* @fourcc: fourcc code for this format, 0 if not applicable
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* @color: the driver's private color format id
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* @memplanes: number of physically non-contiguous data planes
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* @colplanes: number of physically contiguous data planes
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2013-06-20 21:49:09 +08:00
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* @colorspace: v4l2 colorspace (V4L2_COLORSPACE_*)
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2013-02-26 00:20:21 +08:00
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* @depth: per plane driver's private 'number of bits per pixel'
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* @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
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* @flags: flags indicating which operation mode format applies to
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*/
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struct fimc_fmt {
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enum v4l2_mbus_pixelcode mbus_code;
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char *name;
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u32 fourcc;
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u32 color;
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u16 memplanes;
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u16 colplanes;
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2013-06-20 21:49:09 +08:00
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u8 colorspace;
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2013-02-26 00:20:21 +08:00
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u8 depth[FIMC_MAX_PLANES];
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u16 mdataplanes;
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u16 flags;
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#define FMT_FLAGS_CAM (1 << 0)
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#define FMT_FLAGS_M2M_IN (1 << 1)
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#define FMT_FLAGS_M2M_OUT (1 << 2)
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#define FMT_FLAGS_M2M (1 << 1 | 1 << 2)
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#define FMT_HAS_ALPHA (1 << 3)
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#define FMT_FLAGS_COMPRESSED (1 << 4)
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#define FMT_FLAGS_WRITEBACK (1 << 5)
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2013-03-21 02:31:03 +08:00
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#define FMT_FLAGS_RAW_BAYER (1 << 6)
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#define FMT_FLAGS_YUV (1 << 7)
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2013-02-26 00:20:21 +08:00
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};
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2013-05-31 22:37:22 +08:00
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struct exynos_media_pipeline;
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2012-04-27 20:33:10 +08:00
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2013-05-31 22:37:22 +08:00
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/*
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* Media pipeline operations to be called from within a video node, i.e. the
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* last entity within the pipeline. Implemented by related media device driver.
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*/
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struct exynos_media_pipeline_ops {
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int (*prepare)(struct exynos_media_pipeline *p,
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struct media_entity *me);
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int (*unprepare)(struct exynos_media_pipeline *p);
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int (*open)(struct exynos_media_pipeline *p, struct media_entity *me,
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bool resume);
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int (*close)(struct exynos_media_pipeline *p);
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int (*set_stream)(struct exynos_media_pipeline *p, bool state);
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2012-04-27 20:33:10 +08:00
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};
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2013-05-31 22:37:18 +08:00
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struct exynos_video_entity {
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struct video_device vdev;
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2013-05-31 22:37:22 +08:00
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struct exynos_media_pipeline *pipe;
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2013-05-31 22:37:18 +08:00
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};
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2013-05-31 22:37:22 +08:00
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struct exynos_media_pipeline {
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struct media_pipeline mp;
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const struct exynos_media_pipeline_ops *ops;
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2012-08-14 21:46:58 +08:00
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};
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2013-05-31 22:37:22 +08:00
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static inline struct exynos_video_entity *vdev_to_exynos_video_entity(
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struct video_device *vdev)
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{
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return container_of(vdev, struct exynos_video_entity, vdev);
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}
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#define fimc_pipeline_call(ent, op, args...) \
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(!(ent) ? -ENOENT : (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
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(ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \
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2012-08-14 21:46:58 +08:00
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2010-12-28 01:42:15 +08:00
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#endif /* S5P_FIMC_H_ */
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