linux/drivers/fpga/Makefile

#
# Makefile for the fpga framework and fpga manager drivers.
#

# Core FPGA Manager Framework
obj-$(CONFIG_FPGA)			+= fpga-mgr.o

# FPGA Manager Drivers
obj-$(CONFIG_FPGA_MGR_SOCFPGA)		+= socfpga.o
obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA)	+= zynq-fpga.o
add FPGA manager core API to support programming FPGA's. The following functions are exported as GPL: * fpga_mgr_buf_load Load fpga from image in buffer * fpga_mgr_firmware_load Request firmware and load it to the FPGA. * fpga_mgr_register * fpga_mgr_unregister FPGA device drivers can be added by calling fpga_mgr_register() to register a set of fpga_manager_ops to do device specific stuff. * of_fpga_mgr_get * fpga_mgr_put Get/put a reference to a fpga manager. The following sysfs files are created: * /sys/class/fpga_manager/<fpga>/name Name of low level driver. * /sys/class/fpga_manager/<fpga>/state State of fpga manager Signed-off-by: Alan Tull <atull@opensource.altera.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2015-10-07 23:36:28 +08:00			`#`
			`# Makefile for the fpga framework and fpga manager drivers.`
			`#`

			`# Core FPGA Manager Framework`
			`obj-$(CONFIG_FPGA) += fpga-mgr.o`

			`# FPGA Manager Drivers`
fpga manager: add driver for socfpga fpga manager Add driver to fpga manager framework to allow configuration of FPGA in Altera SoCFPGA parts. Signed-off-by: Alan Tull <atull@opensource.altera.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2015-10-07 23:36:29 +08:00			`obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o`
fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000 This commit adds FPGA Manager support for the Xilinx Zynq chip. The code borrows some from the xdevcfg driver in Xilinx' vendor tree. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2015-10-17 06:42:30 +08:00			`obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o`