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linux/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts

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ARM64: dts: amlogic: Convert to new-style SPDX license identifiers Move the SPDX-License-Identifier lines to the top and drop the license splat. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-27 19:30:33 +08:00
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
ARM64: dts: amlogic: Add P200/P201 boards Add minimal DT files for the Amlogic P20x development boards, based on the Amlogic S905/GXBB SoC. Cc: Andreas Färber <afaerber@suse.de> Cc: Carlo Caione <carlo@endlessm.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
2016-03-25 02:05:15 +08:00
/*
* Copyright (c) 2016 Andreas Färber
* Copyright (c) 2016 BayLibre, Inc.
* Author: Kevin Hilman <khilman@kernel.org>
*/
/dts-v1/;
#include "meson-gxbb-p20x.dtsi"
/ {
compatible = "amlogic,p201", "amlogic,meson-gxbb";
model = "Amlogic Meson GXBB P201 Development Board";
};
ARM64: dts: meson-gxbb-p201: fix ethernet support Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with the reset GPIO being GPIOZ_14). However our P201 board .dts simply inherits the phy-mode setting from from meson-gx.dtsi where it defaults to RGMII mode. Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only specifies the RGMII pins which are only valid for the P200 board. Instead we add the ethmac node to the meson-gxbb-p201.dts and configure the pinctrl property and the phy-mode for an RMII PHY. An MDIO node (which would also specify the PHY) is not added since we don't know which PHY is being used (and thus which PHY address would have to be used). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-02-20 05:41:47 +08:00
&ethmac {
status = "okay";
pinctrl-0 = <&eth_rmii_pins>;
pinctrl-names = "default";
phy-mode = "rmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
arm64: dts: meson-gxbb-p201: fix snps, reset-delays-us format This fixes the following DT schemas check errors: meson-gxbb-p201.dt.yaml: ethernet@c9410000: snps,reset-delays-us: [[0, 10000, 1000000]] is too short Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-23 15:02:47 +08:00
snps,reset-delays-us = <0>, <10000>, <1000000>;
ARM64: dts: meson-gxbb-p201: fix ethernet support Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with the reset GPIO being GPIOZ_14). However our P201 board .dts simply inherits the phy-mode setting from from meson-gx.dtsi where it defaults to RGMII mode. Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only specifies the RGMII pins which are only valid for the P200 board. Instead we add the ethmac node to the meson-gxbb-p201.dts and configure the pinctrl property and the phy-mode for an RMII PHY. An MDIO node (which would also specify the PHY) is not added since we don't know which PHY is being used (and thus which PHY address would have to be used). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-02-20 05:41:47 +08:00
snps,reset-active-low;
};