2019-05-19 20:07:45 +08:00
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# SPDX-License-Identifier: GPL-2.0-only
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2020-06-11 17:23:16 +08:00
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config CLK_BCM2711_DVP
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tristate "Broadcom BCM2711 DVP support"
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depends on ARCH_BCM2835 ||COMPILE_TEST
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depends on COMMON_CLK
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default ARCH_BCM2835
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select RESET_SIMPLE
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help
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Enable common clock framework support for the Broadcom BCM2711
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DVP Controller.
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2019-05-10 04:29:55 +08:00
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config CLK_BCM2835
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bool "Broadcom BCM2835 clock support"
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2019-05-10 04:29:56 +08:00
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depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
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2019-05-10 04:29:55 +08:00
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depends on COMMON_CLK
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2019-05-10 04:29:56 +08:00
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default ARCH_BCM2835 || ARCH_BRCMSTB
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2019-05-10 04:29:55 +08:00
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help
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Enable common clock framework support for Broadcom BCM2835
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SoCs.
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2015-10-30 09:23:18 +08:00
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config CLK_BCM_63XX
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bool "Broadcom BCM63xx clock support"
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depends on ARCH_BCM_63XX || COMPILE_TEST
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select COMMON_CLK_IPROC
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default ARCH_BCM_63XX
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help
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Enable common clock framework support for Broadcom BCM63xx DSL SoCs
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based on the ARM architecture
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2019-05-02 20:26:56 +08:00
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config CLK_BCM_63XX_GATE
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bool "Broadcom BCM63xx gated clock support"
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depends on BMIPS_GENERIC || COMPILE_TEST
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default BMIPS_GENERIC
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help
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Enable common clock framework support for Broadcom BCM63xx DSL SoCs
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based on the MIPS architecture
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clk: bcm281xx: add initial clock framework support
Add code for device tree support of clocks in the BCM281xx family of
SoCs. Machines in this family use peripheral clocks implemented by
"Kona" clock control units (CCUs). (Other Broadcom SoC families use
Kona style CCUs as well, but support for them is not yet upstream.)
A BCM281xx SoC has multiple CCUs, each of which manages a set of
clocks on the SoC. A Kona peripheral clock is composite clock that
may include a gate, a parent clock multiplexor, and zero, one
or two dividers. There is a variety of gate types, and many gates
implement hardware-managed gating (often called "auto-gating").
Most dividers divide their input clock signal by an integer value
(one or more). There are also "fractional" dividers which allow
division by non-integer values. To accomodate such dividers,
clock rates and dividers are generally maintained by the code in
"scaled" form, which allows integer and fractional dividers to
be handled in a uniform way.
If present, the gate for a Kona peripheral clock must be enabled
when a change is made to its multiplexor or one of its dividers.
Additionally, dividers and multiplexors have trigger registers which
must be used whenever the divider value or selected parent clock is
changed. The same trigger is often used for a divider and
multiplexor, and a BCM281xx peripheral clock occasionally has two
triggers.
The gate, dividers, and parent clock selector are treated in this
code as "components" of a peripheral clock. Their functionality is
implemented directly--e.g. the common clock framework gate
implementation is not used for a Kona peripheral clock gate. (This
has being considered though, and the intention is to evolve this
code to leverage common code as much as possible.)
The source code is divided into three general portions:
drivers/clk/bcm/clk-kona.h
drivers/clk/bcm/clk-kona.c
These implement the basic Kona clock functionality,
including the clk_ops methods and various routines to
manipulate registers and interpret their values. This
includes some functions used to set clocks to a desired
initial state (though this feature is only partially
implemented here).
drivers/clk/bcm/clk-kona-setup.c
This contains generic run-time initialization code for
data structures representing Kona CCUs and clocks. This
encapsulates the clock structure initialization that can't
be done statically. Note that there is a great deal of
validity-checking code here, making explicit certain
assumptions in the code. This is mostly useful for adding
new clock definitions and could possibly be disabled for
production use.
drivers/clk/bcm/clk-bcm281xx.c
This file defines the specific CCUs used by BCM281XX family
SoCs, as well as the specific clocks implemented by each.
It declares a device tree clock match entry for each CCU
defined.
include/dt-bindings/clock/bcm281xx.h
This file defines the selector (index) values used to
identify a particular clock provided by a CCU. It consists
entirely of C preprocessor constants, to be used by both the
C source and device tree source files.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
2014-02-15 02:29:18 +08:00
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config CLK_BCM_KONA
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bool "Broadcom Kona CCU clock support"
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2015-10-13 22:18:18 +08:00
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depends on ARCH_BCM_MOBILE || COMPILE_TEST
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2016-11-24 06:41:59 +08:00
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default ARCH_BCM_MOBILE
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clk: bcm281xx: add initial clock framework support
Add code for device tree support of clocks in the BCM281xx family of
SoCs. Machines in this family use peripheral clocks implemented by
"Kona" clock control units (CCUs). (Other Broadcom SoC families use
Kona style CCUs as well, but support for them is not yet upstream.)
A BCM281xx SoC has multiple CCUs, each of which manages a set of
clocks on the SoC. A Kona peripheral clock is composite clock that
may include a gate, a parent clock multiplexor, and zero, one
or two dividers. There is a variety of gate types, and many gates
implement hardware-managed gating (often called "auto-gating").
Most dividers divide their input clock signal by an integer value
(one or more). There are also "fractional" dividers which allow
division by non-integer values. To accomodate such dividers,
clock rates and dividers are generally maintained by the code in
"scaled" form, which allows integer and fractional dividers to
be handled in a uniform way.
If present, the gate for a Kona peripheral clock must be enabled
when a change is made to its multiplexor or one of its dividers.
Additionally, dividers and multiplexors have trigger registers which
must be used whenever the divider value or selected parent clock is
changed. The same trigger is often used for a divider and
multiplexor, and a BCM281xx peripheral clock occasionally has two
triggers.
The gate, dividers, and parent clock selector are treated in this
code as "components" of a peripheral clock. Their functionality is
implemented directly--e.g. the common clock framework gate
implementation is not used for a Kona peripheral clock gate. (This
has being considered though, and the intention is to evolve this
code to leverage common code as much as possible.)
The source code is divided into three general portions:
drivers/clk/bcm/clk-kona.h
drivers/clk/bcm/clk-kona.c
These implement the basic Kona clock functionality,
including the clk_ops methods and various routines to
manipulate registers and interpret their values. This
includes some functions used to set clocks to a desired
initial state (though this feature is only partially
implemented here).
drivers/clk/bcm/clk-kona-setup.c
This contains generic run-time initialization code for
data structures representing Kona CCUs and clocks. This
encapsulates the clock structure initialization that can't
be done statically. Note that there is a great deal of
validity-checking code here, making explicit certain
assumptions in the code. This is mostly useful for adding
new clock definitions and could possibly be disabled for
production use.
drivers/clk/bcm/clk-bcm281xx.c
This file defines the specific CCUs used by BCM281XX family
SoCs, as well as the specific clocks implemented by each.
It declares a device tree clock match entry for each CCU
defined.
include/dt-bindings/clock/bcm281xx.h
This file defines the selector (index) values used to
identify a particular clock provided by a CCU. It consists
entirely of C preprocessor constants, to be used by both the
C source and device tree source files.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
2014-02-15 02:29:18 +08:00
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help
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Enable common clock framework support for Broadcom SoCs
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using "Kona" style clock control units, including those
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2014-04-22 05:26:26 +08:00
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in the BCM281xx and BCM21664 families.
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2015-05-06 02:13:19 +08:00
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config COMMON_CLK_IPROC
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2016-11-24 06:41:59 +08:00
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bool
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2015-05-06 02:13:19 +08:00
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help
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Enable common clock framework support for Broadcom SoCs
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based on the iProc architecture
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2015-10-30 04:44:10 +08:00
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config CLK_BCM_CYGNUS
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bool "Broadcom Cygnus clock support"
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depends on ARCH_BCM_CYGNUS || COMPILE_TEST
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2016-11-24 06:41:59 +08:00
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select COMMON_CLK_IPROC
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2015-10-30 04:44:10 +08:00
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default ARCH_BCM_CYGNUS
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help
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Enable common clock framework support for the Broadcom Cygnus SoC
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2017-09-29 07:14:57 +08:00
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config CLK_BCM_HR2
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bool "Broadcom Hurricane 2 clock support"
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depends on ARCH_BCM_HR2 || COMPILE_TEST
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select COMMON_CLK_IPROC
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default ARCH_BCM_HR2
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help
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Enable common clock framework support for the Broadcom Hurricane 2
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SoC
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2015-10-30 04:44:10 +08:00
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config CLK_BCM_NSP
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bool "Broadcom Northstar/Northstar Plus clock support"
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depends on ARCH_BCM_5301X || ARCH_BCM_NSP || COMPILE_TEST
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2016-11-24 06:41:59 +08:00
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select COMMON_CLK_IPROC
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2015-10-30 04:44:10 +08:00
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default ARCH_BCM_5301X || ARCH_BCM_NSP
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help
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Enable common clock framework support for the Broadcom Northstar and
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Northstar Plus SoCs
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config CLK_BCM_NS2
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bool "Broadcom Northstar 2 clock support"
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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2016-11-24 06:41:59 +08:00
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select COMMON_CLK_IPROC
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2015-10-30 04:44:10 +08:00
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default ARCH_BCM_IPROC
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help
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Enable common clock framework support for the Broadcom Northstar 2 SoC
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2017-06-06 12:23:58 +08:00
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config CLK_BCM_SR
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bool "Broadcom Stingray clock support"
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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select COMMON_CLK_IPROC
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default ARCH_BCM_IPROC
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help
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Enable common clock framework support for the Broadcom Stingray SoC
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2019-06-13 02:24:54 +08:00
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config CLK_RASPBERRYPI
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tristate "Raspberry Pi firmware based clock support"
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depends on RASPBERRYPI_FIRMWARE || (COMPILE_TEST && !RASPBERRYPI_FIRMWARE)
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help
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Enable common clock framework support for Raspberry Pi's firmware
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dependent clocks
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