linux/arch/arm/boot/dts/exynos5420-peach-pit.dts

/*
 * Google Peach Pit Rev 6+ board device tree source
 *
 * Copyright (c) 2014 Google, Inc
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "exynos5420.dtsi"

/ {
	model = "Google Peach Pit Rev 6+";

	compatible = "google,pit-rev16",
		"google,pit-rev15", "google,pit-rev14",
		"google,pit-rev13", "google,pit-rev12",
		"google,pit-rev11", "google,pit-rev10",
		"google,pit-rev9", "google,pit-rev8",
		"google,pit-rev7", "google,pit-rev6",
		"google,pit", "google,peach","samsung,exynos5420",
		"samsung,exynos5";

	memory {
		reg = <0x20000000 0x80000000>;
	};

	fixed-rate-clocks {
		oscclk {
			compatible = "samsung,exynos5420-oscclk";
			clock-frequency = <24000000>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		pinctrl-names = "default";
		pinctrl-0 = <&power_key_irq>;

		power {
			label = "Power";
			gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			gpio-key,wakeup;
		};
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm 0 1000000 0>;
		brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
		default-brightness-level = <7>;
		pinctrl-0 = <&pwm0_out>;
		pinctrl-names = "default";
	};

	sound {
		compatible = "google,snow-audio-max98090";

		samsung,i2s-controller = <&i2s0>;
		samsung,audio-codec = <&max98090>;
	};
};

&pinctrl_0 {
	max98090_irq: max98090-irq {
		samsung,pins = "gpx0-2";
		samsung,pin-function = <0>;
		samsung,pin-pud = <0>;
		samsung,pin-drv = <0>;
	};

	tpm_irq: tpm-irq {
		samsung,pins = "gpx1-0";
		samsung,pin-function = <0>;
		samsung,pin-pud = <0>;
		samsung,pin-drv = <0>;
	};

	power_key_irq: power-key-irq {
		samsung,pins = "gpx1-2";
		samsung,pin-function = <0>;
		samsung,pin-pud = <0>;
		samsung,pin-drv = <0>;
	};

	hdmi_hpd_irq: hdmi-hpd-irq {
		samsung,pins = "gpx3-7";
		samsung,pin-function = <0>;
		samsung,pin-pud = <1>;
		samsung,pin-drv = <0>;
	};
};

&rtc {
	status = "okay";
};

&uart_3 {
	status = "okay";
};

&mmc_0 {
	status = "okay";
	num-slots = <1>;
	broken-cd;
	caps2-mmc-hs200-1_8v;
	supports-highspeed;
	non-removable;
	card-detect-delay = <200>;
	clock-frequency = <400000000>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <0 4>;
	samsung,dw-mshc-ddr-timing = <0 2>;
	pinctrl-names = "default";
	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;

	slot@0 {
		reg = <0>;
		bus-width = <8>;
	};
};

&mmc_2 {
	status = "okay";
	num-slots = <1>;
	supports-highspeed;
	card-detect-delay = <200>;
	clock-frequency = <400000000>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <2 3>;
	samsung,dw-mshc-ddr-timing = <1 2>;
	pinctrl-names = "default";
	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;

	slot@0 {
		reg = <0>;
		bus-width = <4>;
	};
};

&hsi2c_7 {
	status = "okay";

	max98090: codec@10 {
		compatible = "maxim,max98090";
		reg = <0x10>;
		interrupts = <2 0>;
		interrupt-parent = <&gpx0>;
		pinctrl-names = "default";
		pinctrl-0 = <&max98090_irq>;
	};
};

&hsi2c_9 {
	status = "okay";
	clock-frequency = <400000>;

	tpm@20 {
		compatible = "infineon,slb9645tt";
		reg = <0x20>;

		/* Unused irq; but still need to configure the pins */
		pinctrl-names = "default";
		pinctrl-0 = <&tpm_irq>;
	};
};

&i2c_2	{
	status = "okay";
	samsung,i2c-sda-delay = <100>;
	samsung,i2c-max-bus-freq = <66000>;
	samsung,i2c-slave-addr = <0x50>;
};

&hdmi {
	status = "okay";
	hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
	pinctrl-names = "default";
	pinctrl-0 = <&hdmi_hpd_irq>;
	ddc = <&i2c_2>;
};

/*
 * Use longest HW watchdog in SoC (32 seconds) since the hardware
 * watchdog provides no debugging information (compared to soft/hard
 * lockup detectors) and so should be last resort.
 */
&watchdog {
	timeout-sec = <32>;
};

&i2s0 {
	status = "okay";
};