Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
/*
|
|
|
|
* drivers/net/ibm_newemac/mal.c
|
|
|
|
*
|
|
|
|
* Memory Access Layer (MAL) support
|
|
|
|
*
|
2007-12-05 08:14:33 +08:00
|
|
|
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
|
|
|
* <benh@kernel.crashing.org>
|
|
|
|
*
|
|
|
|
* Based on the arch/ppc version of the driver:
|
|
|
|
*
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
* Copyright (c) 2004, 2005 Zultys Technologies.
|
|
|
|
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
|
|
|
*
|
|
|
|
* Based on original work by
|
|
|
|
* Benjamin Herrenschmidt <benh@kernel.crashing.org>,
|
|
|
|
* David Gibson <hermes@gibson.dropbear.id.au>,
|
|
|
|
*
|
|
|
|
* Armin Kuster <akuster@mvista.com>
|
|
|
|
* Copyright 2002 MontaVista Softare Inc.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
|
|
* under the terms of the GNU General Public License as published by the
|
|
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
|
|
* option) any later version.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/delay.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
|
|
|
#include <linux/slab.h>
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
|
|
|
|
#include "core.h"
|
2008-09-04 12:08:20 +08:00
|
|
|
#include <asm/dcr-regs.h>
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
|
|
|
|
static int mal_count;
|
|
|
|
|
|
|
|
int __devinit mal_register_commac(struct mal_instance *mal,
|
|
|
|
struct mal_commac *commac)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&mal->lock, flags);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "reg(%08x, %08x)" NL,
|
|
|
|
commac->tx_chan_mask, commac->rx_chan_mask);
|
|
|
|
|
|
|
|
/* Don't let multiple commacs claim the same channel(s) */
|
|
|
|
if ((mal->tx_chan_mask & commac->tx_chan_mask) ||
|
|
|
|
(mal->rx_chan_mask & commac->rx_chan_mask)) {
|
|
|
|
spin_unlock_irqrestore(&mal->lock, flags);
|
|
|
|
printk(KERN_WARNING "mal%d: COMMAC channels conflict!\n",
|
|
|
|
mal->index);
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
2007-10-16 13:40:50 +08:00
|
|
|
if (list_empty(&mal->list))
|
|
|
|
napi_enable(&mal->napi);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
mal->tx_chan_mask |= commac->tx_chan_mask;
|
|
|
|
mal->rx_chan_mask |= commac->rx_chan_mask;
|
|
|
|
list_add(&commac->list, &mal->list);
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&mal->lock, flags);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-04-22 08:46:43 +08:00
|
|
|
void mal_unregister_commac(struct mal_instance *mal,
|
|
|
|
struct mal_commac *commac)
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&mal->lock, flags);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "unreg(%08x, %08x)" NL,
|
|
|
|
commac->tx_chan_mask, commac->rx_chan_mask);
|
|
|
|
|
|
|
|
mal->tx_chan_mask &= ~commac->tx_chan_mask;
|
|
|
|
mal->rx_chan_mask &= ~commac->rx_chan_mask;
|
|
|
|
list_del_init(&commac->list);
|
2007-10-16 13:40:50 +08:00
|
|
|
if (list_empty(&mal->list))
|
|
|
|
napi_disable(&mal->napi);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
|
|
|
|
spin_unlock_irqrestore(&mal->lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
int mal_set_rcbs(struct mal_instance *mal, int channel, unsigned long size)
|
|
|
|
{
|
|
|
|
BUG_ON(channel < 0 || channel >= mal->num_rx_chans ||
|
|
|
|
size > MAL_MAX_RX_SIZE);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "set_rbcs(%d, %lu)" NL, channel, size);
|
|
|
|
|
|
|
|
if (size & 0xf) {
|
|
|
|
printk(KERN_WARNING
|
|
|
|
"mal%d: incorrect RX size %lu for the channel %d\n",
|
|
|
|
mal->index, size, channel);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
set_mal_dcrn(mal, MAL_RCBS(channel), size >> 4);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mal_tx_bd_offset(struct mal_instance *mal, int channel)
|
|
|
|
{
|
|
|
|
BUG_ON(channel < 0 || channel >= mal->num_tx_chans);
|
|
|
|
|
|
|
|
return channel * NUM_TX_BUFF;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mal_rx_bd_offset(struct mal_instance *mal, int channel)
|
|
|
|
{
|
|
|
|
BUG_ON(channel < 0 || channel >= mal->num_rx_chans);
|
|
|
|
return mal->num_tx_chans * NUM_TX_BUFF + channel * NUM_RX_BUFF;
|
|
|
|
}
|
|
|
|
|
|
|
|
void mal_enable_tx_channel(struct mal_instance *mal, int channel)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&mal->lock, flags);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "enable_tx(%d)" NL, channel);
|
|
|
|
|
|
|
|
set_mal_dcrn(mal, MAL_TXCASR,
|
|
|
|
get_mal_dcrn(mal, MAL_TXCASR) | MAL_CHAN_MASK(channel));
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&mal->lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
void mal_disable_tx_channel(struct mal_instance *mal, int channel)
|
|
|
|
{
|
|
|
|
set_mal_dcrn(mal, MAL_TXCARR, MAL_CHAN_MASK(channel));
|
|
|
|
|
|
|
|
MAL_DBG(mal, "disable_tx(%d)" NL, channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
void mal_enable_rx_channel(struct mal_instance *mal, int channel)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
2008-04-22 08:46:42 +08:00
|
|
|
/*
|
|
|
|
* On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple
|
|
|
|
* of 8, but enabling in MAL_RXCASR needs the divided by 8 value
|
|
|
|
* for the bitmask
|
|
|
|
*/
|
|
|
|
if (!(channel % 8))
|
|
|
|
channel >>= 3;
|
|
|
|
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
spin_lock_irqsave(&mal->lock, flags);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "enable_rx(%d)" NL, channel);
|
|
|
|
|
|
|
|
set_mal_dcrn(mal, MAL_RXCASR,
|
|
|
|
get_mal_dcrn(mal, MAL_RXCASR) | MAL_CHAN_MASK(channel));
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&mal->lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
void mal_disable_rx_channel(struct mal_instance *mal, int channel)
|
|
|
|
{
|
2008-04-22 08:46:42 +08:00
|
|
|
/*
|
|
|
|
* On some 4xx PPC's (e.g. 460EX/GT), the rx channel is a multiple
|
|
|
|
* of 8, but enabling in MAL_RXCASR needs the divided by 8 value
|
|
|
|
* for the bitmask
|
|
|
|
*/
|
|
|
|
if (!(channel % 8))
|
|
|
|
channel >>= 3;
|
|
|
|
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
set_mal_dcrn(mal, MAL_RXCARR, MAL_CHAN_MASK(channel));
|
|
|
|
|
|
|
|
MAL_DBG(mal, "disable_rx(%d)" NL, channel);
|
|
|
|
}
|
|
|
|
|
|
|
|
void mal_poll_add(struct mal_instance *mal, struct mal_commac *commac)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&mal->lock, flags);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "poll_add(%p)" NL, commac);
|
|
|
|
|
|
|
|
/* starts disabled */
|
|
|
|
set_bit(MAL_COMMAC_POLL_DISABLED, &commac->flags);
|
|
|
|
|
|
|
|
list_add_tail(&commac->poll_list, &mal->poll_list);
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&mal->lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
void mal_poll_del(struct mal_instance *mal, struct mal_commac *commac)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&mal->lock, flags);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "poll_del(%p)" NL, commac);
|
|
|
|
|
|
|
|
list_del(&commac->poll_list);
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&mal->lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* synchronized by mal_poll() */
|
|
|
|
static inline void mal_enable_eob_irq(struct mal_instance *mal)
|
|
|
|
{
|
|
|
|
MAL_DBG2(mal, "enable_irq" NL);
|
|
|
|
|
|
|
|
// XXX might want to cache MAL_CFG as the DCR read can be slooooow
|
|
|
|
set_mal_dcrn(mal, MAL_CFG, get_mal_dcrn(mal, MAL_CFG) | MAL_CFG_EOPIE);
|
|
|
|
}
|
|
|
|
|
2007-10-16 13:40:50 +08:00
|
|
|
/* synchronized by NAPI state */
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
static inline void mal_disable_eob_irq(struct mal_instance *mal)
|
|
|
|
{
|
|
|
|
// XXX might want to cache MAL_CFG as the DCR read can be slooooow
|
|
|
|
set_mal_dcrn(mal, MAL_CFG, get_mal_dcrn(mal, MAL_CFG) & ~MAL_CFG_EOPIE);
|
|
|
|
|
|
|
|
MAL_DBG2(mal, "disable_irq" NL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t mal_serr(int irq, void *dev_instance)
|
|
|
|
{
|
|
|
|
struct mal_instance *mal = dev_instance;
|
|
|
|
|
|
|
|
u32 esr = get_mal_dcrn(mal, MAL_ESR);
|
|
|
|
|
|
|
|
/* Clear the error status register */
|
|
|
|
set_mal_dcrn(mal, MAL_ESR, esr);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "SERR %08x" NL, esr);
|
|
|
|
|
|
|
|
if (esr & MAL_ESR_EVB) {
|
|
|
|
if (esr & MAL_ESR_DE) {
|
|
|
|
/* We ignore Descriptor error,
|
|
|
|
* TXDE or RXDE interrupt will be generated anyway.
|
|
|
|
*/
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (esr & MAL_ESR_PEIN) {
|
|
|
|
/* PLB error, it's probably buggy hardware or
|
|
|
|
* incorrect physical address in BD (i.e. bug)
|
|
|
|
*/
|
|
|
|
if (net_ratelimit())
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: system error, "
|
|
|
|
"PLB (ESR = 0x%08x)\n",
|
|
|
|
mal->index, esr);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* OPB error, it's probably buggy hardware or incorrect
|
|
|
|
* EBC setup
|
|
|
|
*/
|
|
|
|
if (net_ratelimit())
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: system error, OPB (ESR = 0x%08x)\n",
|
|
|
|
mal->index, esr);
|
|
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void mal_schedule_poll(struct mal_instance *mal)
|
|
|
|
{
|
2007-10-10 06:48:56 +08:00
|
|
|
if (likely(napi_schedule_prep(&mal->napi))) {
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
MAL_DBG2(mal, "schedule_poll" NL);
|
|
|
|
mal_disable_eob_irq(mal);
|
2007-10-10 06:48:56 +08:00
|
|
|
__napi_schedule(&mal->napi);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
} else
|
|
|
|
MAL_DBG2(mal, "already in poll" NL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t mal_txeob(int irq, void *dev_instance)
|
|
|
|
{
|
|
|
|
struct mal_instance *mal = dev_instance;
|
|
|
|
|
|
|
|
u32 r = get_mal_dcrn(mal, MAL_TXEOBISR);
|
|
|
|
|
|
|
|
MAL_DBG2(mal, "txeob %08x" NL, r);
|
|
|
|
|
|
|
|
mal_schedule_poll(mal);
|
|
|
|
set_mal_dcrn(mal, MAL_TXEOBISR, r);
|
|
|
|
|
2008-10-16 12:38:40 +08:00
|
|
|
#ifdef CONFIG_PPC_DCR_NATIVE
|
2008-09-04 12:08:20 +08:00
|
|
|
if (mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT))
|
|
|
|
mtdcri(SDR0, DCRN_SDR_ICINTSTAT,
|
|
|
|
(mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICTX));
|
2008-10-16 12:38:40 +08:00
|
|
|
#endif
|
2008-09-04 12:08:20 +08:00
|
|
|
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t mal_rxeob(int irq, void *dev_instance)
|
|
|
|
{
|
|
|
|
struct mal_instance *mal = dev_instance;
|
|
|
|
|
|
|
|
u32 r = get_mal_dcrn(mal, MAL_RXEOBISR);
|
|
|
|
|
|
|
|
MAL_DBG2(mal, "rxeob %08x" NL, r);
|
|
|
|
|
|
|
|
mal_schedule_poll(mal);
|
|
|
|
set_mal_dcrn(mal, MAL_RXEOBISR, r);
|
|
|
|
|
2008-10-16 12:38:40 +08:00
|
|
|
#ifdef CONFIG_PPC_DCR_NATIVE
|
2008-09-04 12:08:20 +08:00
|
|
|
if (mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT))
|
|
|
|
mtdcri(SDR0, DCRN_SDR_ICINTSTAT,
|
|
|
|
(mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICRX));
|
2008-10-16 12:38:40 +08:00
|
|
|
#endif
|
2008-09-04 12:08:20 +08:00
|
|
|
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t mal_txde(int irq, void *dev_instance)
|
|
|
|
{
|
|
|
|
struct mal_instance *mal = dev_instance;
|
|
|
|
|
|
|
|
u32 deir = get_mal_dcrn(mal, MAL_TXDEIR);
|
|
|
|
set_mal_dcrn(mal, MAL_TXDEIR, deir);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "txde %08x" NL, deir);
|
|
|
|
|
|
|
|
if (net_ratelimit())
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: TX descriptor error (TXDEIR = 0x%08x)\n",
|
|
|
|
mal->index, deir);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t mal_rxde(int irq, void *dev_instance)
|
|
|
|
{
|
|
|
|
struct mal_instance *mal = dev_instance;
|
|
|
|
struct list_head *l;
|
|
|
|
|
|
|
|
u32 deir = get_mal_dcrn(mal, MAL_RXDEIR);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "rxde %08x" NL, deir);
|
|
|
|
|
|
|
|
list_for_each(l, &mal->list) {
|
|
|
|
struct mal_commac *mc = list_entry(l, struct mal_commac, list);
|
|
|
|
if (deir & mc->rx_chan_mask) {
|
|
|
|
set_bit(MAL_COMMAC_RX_STOPPED, &mc->flags);
|
|
|
|
mc->ops->rxde(mc->dev);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
mal_schedule_poll(mal);
|
|
|
|
set_mal_dcrn(mal, MAL_RXDEIR, deir);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
2008-09-04 12:08:20 +08:00
|
|
|
static irqreturn_t mal_int(int irq, void *dev_instance)
|
|
|
|
{
|
|
|
|
struct mal_instance *mal = dev_instance;
|
|
|
|
u32 esr = get_mal_dcrn(mal, MAL_ESR);
|
|
|
|
|
|
|
|
if (esr & MAL_ESR_EVB) {
|
|
|
|
/* descriptor error */
|
|
|
|
if (esr & MAL_ESR_DE) {
|
|
|
|
if (esr & MAL_ESR_CIDT)
|
|
|
|
return mal_rxde(irq, dev_instance);
|
|
|
|
else
|
|
|
|
return mal_txde(irq, dev_instance);
|
|
|
|
} else { /* SERR */
|
|
|
|
return mal_serr(irq, dev_instance);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
void mal_poll_disable(struct mal_instance *mal, struct mal_commac *commac)
|
|
|
|
{
|
|
|
|
/* Spinlock-type semantics: only one caller disable poll at a time */
|
|
|
|
while (test_and_set_bit(MAL_COMMAC_POLL_DISABLED, &commac->flags))
|
|
|
|
msleep(1);
|
|
|
|
|
2007-10-16 13:40:50 +08:00
|
|
|
/* Synchronize with the MAL NAPI poller */
|
2007-10-18 07:14:03 +08:00
|
|
|
napi_synchronize(&mal->napi);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
void mal_poll_enable(struct mal_instance *mal, struct mal_commac *commac)
|
|
|
|
{
|
|
|
|
smp_wmb();
|
|
|
|
clear_bit(MAL_COMMAC_POLL_DISABLED, &commac->flags);
|
|
|
|
|
2007-10-16 13:40:50 +08:00
|
|
|
/* Feels better to trigger a poll here to catch up with events that
|
|
|
|
* may have happened on this channel while disabled. It will most
|
|
|
|
* probably be delayed until the next interrupt but that's mostly a
|
|
|
|
* non-issue in the context where this is called.
|
|
|
|
*/
|
|
|
|
napi_schedule(&mal->napi);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
}
|
|
|
|
|
2007-10-10 06:48:56 +08:00
|
|
|
static int mal_poll(struct napi_struct *napi, int budget)
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
{
|
2007-10-10 06:48:56 +08:00
|
|
|
struct mal_instance *mal = container_of(napi, struct mal_instance, napi);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
struct list_head *l;
|
2007-10-10 06:48:56 +08:00
|
|
|
int received = 0;
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
unsigned long flags;
|
|
|
|
|
2007-10-16 13:40:50 +08:00
|
|
|
MAL_DBG2(mal, "poll(%d)" NL, budget);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
again:
|
|
|
|
/* Process TX skbs */
|
|
|
|
list_for_each(l, &mal->poll_list) {
|
|
|
|
struct mal_commac *mc =
|
|
|
|
list_entry(l, struct mal_commac, poll_list);
|
|
|
|
mc->ops->poll_tx(mc->dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process RX skbs.
|
|
|
|
*
|
|
|
|
* We _might_ need something more smart here to enforce polling
|
|
|
|
* fairness.
|
|
|
|
*/
|
|
|
|
list_for_each(l, &mal->poll_list) {
|
|
|
|
struct mal_commac *mc =
|
|
|
|
list_entry(l, struct mal_commac, poll_list);
|
|
|
|
int n;
|
|
|
|
if (unlikely(test_bit(MAL_COMMAC_POLL_DISABLED, &mc->flags)))
|
|
|
|
continue;
|
2007-10-10 06:48:56 +08:00
|
|
|
n = mc->ops->poll_rx(mc->dev, budget);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
if (n) {
|
|
|
|
received += n;
|
2007-10-10 06:48:56 +08:00
|
|
|
budget -= n;
|
|
|
|
if (budget <= 0)
|
|
|
|
goto more_work; // XXX What if this is the last one ?
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We need to disable IRQs to protect from RXDE IRQ here */
|
|
|
|
spin_lock_irqsave(&mal->lock, flags);
|
2007-10-10 06:48:56 +08:00
|
|
|
__napi_complete(napi);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
mal_enable_eob_irq(mal);
|
|
|
|
spin_unlock_irqrestore(&mal->lock, flags);
|
|
|
|
|
|
|
|
/* Check for "rotting" packet(s) */
|
|
|
|
list_for_each(l, &mal->poll_list) {
|
|
|
|
struct mal_commac *mc =
|
|
|
|
list_entry(l, struct mal_commac, poll_list);
|
|
|
|
if (unlikely(test_bit(MAL_COMMAC_POLL_DISABLED, &mc->flags)))
|
|
|
|
continue;
|
|
|
|
if (unlikely(mc->ops->peek_rx(mc->dev) ||
|
|
|
|
test_bit(MAL_COMMAC_RX_STOPPED, &mc->flags))) {
|
|
|
|
MAL_DBG2(mal, "rotting packet" NL);
|
2007-10-10 06:48:56 +08:00
|
|
|
if (napi_reschedule(napi))
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
mal_disable_eob_irq(mal);
|
|
|
|
else
|
|
|
|
MAL_DBG2(mal, "already in poll list" NL);
|
|
|
|
|
2007-10-10 06:48:56 +08:00
|
|
|
if (budget > 0)
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
goto again;
|
|
|
|
else
|
|
|
|
goto more_work;
|
|
|
|
}
|
|
|
|
mc->ops->poll_tx(mc->dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
more_work:
|
2007-10-10 06:48:56 +08:00
|
|
|
MAL_DBG2(mal, "poll() %d <- %d" NL, budget, received);
|
|
|
|
return received;
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void mal_reset(struct mal_instance *mal)
|
|
|
|
{
|
|
|
|
int n = 10;
|
|
|
|
|
|
|
|
MAL_DBG(mal, "reset" NL);
|
|
|
|
|
|
|
|
set_mal_dcrn(mal, MAL_CFG, MAL_CFG_SR);
|
|
|
|
|
|
|
|
/* Wait for reset to complete (1 system clock) */
|
|
|
|
while ((get_mal_dcrn(mal, MAL_CFG) & MAL_CFG_SR) && n)
|
|
|
|
--n;
|
|
|
|
|
|
|
|
if (unlikely(!n))
|
|
|
|
printk(KERN_ERR "mal%d: reset timeout\n", mal->index);
|
|
|
|
}
|
|
|
|
|
|
|
|
int mal_get_regs_len(struct mal_instance *mal)
|
|
|
|
{
|
|
|
|
return sizeof(struct emac_ethtool_regs_subhdr) +
|
|
|
|
sizeof(struct mal_regs);
|
|
|
|
}
|
|
|
|
|
|
|
|
void *mal_dump_regs(struct mal_instance *mal, void *buf)
|
|
|
|
{
|
|
|
|
struct emac_ethtool_regs_subhdr *hdr = buf;
|
|
|
|
struct mal_regs *regs = (struct mal_regs *)(hdr + 1);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
hdr->version = mal->version;
|
|
|
|
hdr->index = mal->index;
|
|
|
|
|
|
|
|
regs->tx_count = mal->num_tx_chans;
|
|
|
|
regs->rx_count = mal->num_rx_chans;
|
|
|
|
|
|
|
|
regs->cfg = get_mal_dcrn(mal, MAL_CFG);
|
|
|
|
regs->esr = get_mal_dcrn(mal, MAL_ESR);
|
|
|
|
regs->ier = get_mal_dcrn(mal, MAL_IER);
|
|
|
|
regs->tx_casr = get_mal_dcrn(mal, MAL_TXCASR);
|
|
|
|
regs->tx_carr = get_mal_dcrn(mal, MAL_TXCARR);
|
|
|
|
regs->tx_eobisr = get_mal_dcrn(mal, MAL_TXEOBISR);
|
|
|
|
regs->tx_deir = get_mal_dcrn(mal, MAL_TXDEIR);
|
|
|
|
regs->rx_casr = get_mal_dcrn(mal, MAL_RXCASR);
|
|
|
|
regs->rx_carr = get_mal_dcrn(mal, MAL_RXCARR);
|
|
|
|
regs->rx_eobisr = get_mal_dcrn(mal, MAL_RXEOBISR);
|
|
|
|
regs->rx_deir = get_mal_dcrn(mal, MAL_RXDEIR);
|
|
|
|
|
|
|
|
for (i = 0; i < regs->tx_count; ++i)
|
|
|
|
regs->tx_ctpr[i] = get_mal_dcrn(mal, MAL_TXCTPR(i));
|
|
|
|
|
|
|
|
for (i = 0; i < regs->rx_count; ++i) {
|
|
|
|
regs->rx_ctpr[i] = get_mal_dcrn(mal, MAL_RXCTPR(i));
|
|
|
|
regs->rcbs[i] = get_mal_dcrn(mal, MAL_RCBS(i));
|
|
|
|
}
|
|
|
|
return regs + 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __devinit mal_probe(struct of_device *ofdev,
|
|
|
|
const struct of_device_id *match)
|
|
|
|
{
|
|
|
|
struct mal_instance *mal;
|
|
|
|
int err = 0, i, bd_size;
|
|
|
|
int index = mal_count++;
|
2007-10-15 17:34:34 +08:00
|
|
|
unsigned int dcr_base;
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
const u32 *prop;
|
|
|
|
u32 cfg;
|
2008-09-04 12:08:20 +08:00
|
|
|
unsigned long irqflags;
|
|
|
|
irq_handler_t hdlr_serr, hdlr_txde, hdlr_rxde;
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
|
|
|
|
mal = kzalloc(sizeof(struct mal_instance), GFP_KERNEL);
|
|
|
|
if (!mal) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: out of memory allocating MAL structure!\n",
|
|
|
|
index);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
mal->index = index;
|
|
|
|
mal->ofdev = ofdev;
|
2010-04-14 07:12:29 +08:00
|
|
|
mal->version = of_device_is_compatible(ofdev->dev.of_node, "ibm,mcmal2") ? 2 : 1;
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
|
|
|
|
MAL_DBG(mal, "probe" NL);
|
|
|
|
|
2010-04-14 07:12:29 +08:00
|
|
|
prop = of_get_property(ofdev->dev.of_node, "num-tx-chans", NULL);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
if (prop == NULL) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: can't find MAL num-tx-chans property!\n",
|
|
|
|
index);
|
|
|
|
err = -ENODEV;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
mal->num_tx_chans = prop[0];
|
|
|
|
|
2010-04-14 07:12:29 +08:00
|
|
|
prop = of_get_property(ofdev->dev.of_node, "num-rx-chans", NULL);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
if (prop == NULL) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: can't find MAL num-rx-chans property!\n",
|
|
|
|
index);
|
|
|
|
err = -ENODEV;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
mal->num_rx_chans = prop[0];
|
|
|
|
|
2010-04-14 07:12:29 +08:00
|
|
|
dcr_base = dcr_resource_start(ofdev->dev.of_node, 0);
|
2007-10-15 17:34:34 +08:00
|
|
|
if (dcr_base == 0) {
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: can't find DCR resource!\n", index);
|
|
|
|
err = -ENODEV;
|
|
|
|
goto fail;
|
|
|
|
}
|
2010-04-14 07:12:29 +08:00
|
|
|
mal->dcr_host = dcr_map(ofdev->dev.of_node, dcr_base, 0x100);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
if (!DCR_MAP_OK(mal->dcr_host)) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: failed to map DCRs !\n", index);
|
|
|
|
err = -ENODEV;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2010-04-14 07:12:29 +08:00
|
|
|
if (of_device_is_compatible(ofdev->dev.of_node, "ibm,mcmal-405ez")) {
|
2008-10-16 12:38:40 +08:00
|
|
|
#if defined(CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT) && \
|
|
|
|
defined(CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR)
|
2008-09-04 12:08:20 +08:00
|
|
|
mal->features |= (MAL_FTR_CLEAR_ICINTSTAT |
|
|
|
|
MAL_FTR_COMMON_ERR_INT);
|
2008-10-16 12:38:40 +08:00
|
|
|
#else
|
|
|
|
printk(KERN_ERR "%s: Support for 405EZ not enabled!\n",
|
2010-04-14 07:12:29 +08:00
|
|
|
ofdev->dev.of_node->full_name);
|
2008-10-16 12:38:40 +08:00
|
|
|
err = -ENODEV;
|
|
|
|
goto fail;
|
|
|
|
#endif
|
|
|
|
}
|
2008-09-04 12:08:20 +08:00
|
|
|
|
2010-04-14 07:12:29 +08:00
|
|
|
mal->txeob_irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
|
|
|
|
mal->rxeob_irq = irq_of_parse_and_map(ofdev->dev.of_node, 1);
|
|
|
|
mal->serr_irq = irq_of_parse_and_map(ofdev->dev.of_node, 2);
|
2008-09-04 12:08:20 +08:00
|
|
|
|
|
|
|
if (mal_has_feature(mal, MAL_FTR_COMMON_ERR_INT)) {
|
|
|
|
mal->txde_irq = mal->rxde_irq = mal->serr_irq;
|
|
|
|
} else {
|
2010-04-14 07:12:29 +08:00
|
|
|
mal->txde_irq = irq_of_parse_and_map(ofdev->dev.of_node, 3);
|
|
|
|
mal->rxde_irq = irq_of_parse_and_map(ofdev->dev.of_node, 4);
|
2008-09-04 12:08:20 +08:00
|
|
|
}
|
|
|
|
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
if (mal->txeob_irq == NO_IRQ || mal->rxeob_irq == NO_IRQ ||
|
|
|
|
mal->serr_irq == NO_IRQ || mal->txde_irq == NO_IRQ ||
|
|
|
|
mal->rxde_irq == NO_IRQ) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: failed to map interrupts !\n", index);
|
|
|
|
err = -ENODEV;
|
|
|
|
goto fail_unmap;
|
|
|
|
}
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&mal->poll_list);
|
|
|
|
INIT_LIST_HEAD(&mal->list);
|
|
|
|
spin_lock_init(&mal->lock);
|
|
|
|
|
2009-01-15 13:05:05 +08:00
|
|
|
init_dummy_netdev(&mal->dummy_dev);
|
|
|
|
|
|
|
|
netif_napi_add(&mal->dummy_dev, &mal->napi, mal_poll,
|
2007-10-16 13:40:50 +08:00
|
|
|
CONFIG_IBM_NEW_EMAC_POLL_WEIGHT);
|
|
|
|
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
/* Load power-on reset defaults */
|
|
|
|
mal_reset(mal);
|
|
|
|
|
|
|
|
/* Set the MAL configuration register */
|
|
|
|
cfg = (mal->version == 2) ? MAL2_CFG_DEFAULT : MAL1_CFG_DEFAULT;
|
|
|
|
cfg |= MAL_CFG_PLBB | MAL_CFG_OPBBL | MAL_CFG_LEA;
|
|
|
|
|
|
|
|
/* Current Axon is not happy with priority being non-0, it can
|
|
|
|
* deadlock, fix it up here
|
|
|
|
*/
|
2010-04-14 07:12:29 +08:00
|
|
|
if (of_device_is_compatible(ofdev->dev.of_node, "ibm,mcmal-axon"))
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
cfg &= ~(MAL2_CFG_RPP_10 | MAL2_CFG_WPP_10);
|
|
|
|
|
|
|
|
/* Apply configuration */
|
|
|
|
set_mal_dcrn(mal, MAL_CFG, cfg);
|
|
|
|
|
|
|
|
/* Allocate space for BD rings */
|
|
|
|
BUG_ON(mal->num_tx_chans <= 0 || mal->num_tx_chans > 32);
|
|
|
|
BUG_ON(mal->num_rx_chans <= 0 || mal->num_rx_chans > 32);
|
|
|
|
|
|
|
|
bd_size = sizeof(struct mal_descriptor) *
|
|
|
|
(NUM_TX_BUFF * mal->num_tx_chans +
|
|
|
|
NUM_RX_BUFF * mal->num_rx_chans);
|
|
|
|
mal->bd_virt =
|
|
|
|
dma_alloc_coherent(&ofdev->dev, bd_size, &mal->bd_dma,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (mal->bd_virt == NULL) {
|
|
|
|
printk(KERN_ERR
|
|
|
|
"mal%d: out of memory allocating RX/TX descriptors!\n",
|
|
|
|
index);
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto fail_unmap;
|
|
|
|
}
|
|
|
|
memset(mal->bd_virt, 0, bd_size);
|
|
|
|
|
|
|
|
for (i = 0; i < mal->num_tx_chans; ++i)
|
|
|
|
set_mal_dcrn(mal, MAL_TXCTPR(i), mal->bd_dma +
|
|
|
|
sizeof(struct mal_descriptor) *
|
|
|
|
mal_tx_bd_offset(mal, i));
|
|
|
|
|
|
|
|
for (i = 0; i < mal->num_rx_chans; ++i)
|
|
|
|
set_mal_dcrn(mal, MAL_RXCTPR(i), mal->bd_dma +
|
|
|
|
sizeof(struct mal_descriptor) *
|
|
|
|
mal_rx_bd_offset(mal, i));
|
|
|
|
|
2008-09-04 12:08:20 +08:00
|
|
|
if (mal_has_feature(mal, MAL_FTR_COMMON_ERR_INT)) {
|
|
|
|
irqflags = IRQF_SHARED;
|
|
|
|
hdlr_serr = hdlr_txde = hdlr_rxde = mal_int;
|
|
|
|
} else {
|
|
|
|
irqflags = 0;
|
|
|
|
hdlr_serr = mal_serr;
|
|
|
|
hdlr_txde = mal_txde;
|
|
|
|
hdlr_rxde = mal_rxde;
|
|
|
|
}
|
|
|
|
|
|
|
|
err = request_irq(mal->serr_irq, hdlr_serr, irqflags, "MAL SERR", mal);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
if (err)
|
|
|
|
goto fail2;
|
2008-09-04 12:08:20 +08:00
|
|
|
err = request_irq(mal->txde_irq, hdlr_txde, irqflags, "MAL TX DE", mal);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
if (err)
|
|
|
|
goto fail3;
|
|
|
|
err = request_irq(mal->txeob_irq, mal_txeob, 0, "MAL TX EOB", mal);
|
|
|
|
if (err)
|
|
|
|
goto fail4;
|
2008-09-04 12:08:20 +08:00
|
|
|
err = request_irq(mal->rxde_irq, hdlr_rxde, irqflags, "MAL RX DE", mal);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
if (err)
|
|
|
|
goto fail5;
|
|
|
|
err = request_irq(mal->rxeob_irq, mal_rxeob, 0, "MAL RX EOB", mal);
|
|
|
|
if (err)
|
|
|
|
goto fail6;
|
|
|
|
|
|
|
|
/* Enable all MAL SERR interrupt sources */
|
|
|
|
if (mal->version == 2)
|
|
|
|
set_mal_dcrn(mal, MAL_IER, MAL2_IER_EVENTS);
|
|
|
|
else
|
|
|
|
set_mal_dcrn(mal, MAL_IER, MAL1_IER_EVENTS);
|
|
|
|
|
|
|
|
/* Enable EOB interrupt */
|
|
|
|
mal_enable_eob_irq(mal);
|
|
|
|
|
|
|
|
printk(KERN_INFO
|
|
|
|
"MAL v%d %s, %d TX channels, %d RX channels\n",
|
2010-04-14 07:12:29 +08:00
|
|
|
mal->version, ofdev->dev.of_node->full_name,
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
mal->num_tx_chans, mal->num_rx_chans);
|
|
|
|
|
|
|
|
/* Advertise this instance to the rest of the world */
|
|
|
|
wmb();
|
|
|
|
dev_set_drvdata(&ofdev->dev, mal);
|
|
|
|
|
|
|
|
mal_dbg_register(mal);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail6:
|
|
|
|
free_irq(mal->rxde_irq, mal);
|
|
|
|
fail5:
|
|
|
|
free_irq(mal->txeob_irq, mal);
|
|
|
|
fail4:
|
|
|
|
free_irq(mal->txde_irq, mal);
|
|
|
|
fail3:
|
|
|
|
free_irq(mal->serr_irq, mal);
|
|
|
|
fail2:
|
|
|
|
dma_free_coherent(&ofdev->dev, bd_size, mal->bd_virt, mal->bd_dma);
|
|
|
|
fail_unmap:
|
2007-10-15 17:34:37 +08:00
|
|
|
dcr_unmap(mal->dcr_host, 0x100);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
fail:
|
|
|
|
kfree(mal);
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __devexit mal_remove(struct of_device *ofdev)
|
|
|
|
{
|
|
|
|
struct mal_instance *mal = dev_get_drvdata(&ofdev->dev);
|
|
|
|
|
|
|
|
MAL_DBG(mal, "remove" NL);
|
|
|
|
|
2007-10-10 06:48:56 +08:00
|
|
|
/* Synchronize with scheduled polling */
|
|
|
|
napi_disable(&mal->napi);
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
|
|
|
|
if (!list_empty(&mal->list)) {
|
|
|
|
/* This is *very* bad */
|
|
|
|
printk(KERN_EMERG
|
|
|
|
"mal%d: commac list is not empty on remove!\n",
|
|
|
|
mal->index);
|
|
|
|
WARN_ON(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_set_drvdata(&ofdev->dev, NULL);
|
|
|
|
|
|
|
|
free_irq(mal->serr_irq, mal);
|
|
|
|
free_irq(mal->txde_irq, mal);
|
|
|
|
free_irq(mal->txeob_irq, mal);
|
|
|
|
free_irq(mal->rxde_irq, mal);
|
|
|
|
free_irq(mal->rxeob_irq, mal);
|
|
|
|
|
|
|
|
mal_reset(mal);
|
|
|
|
|
|
|
|
mal_dbg_unregister(mal);
|
|
|
|
|
|
|
|
dma_free_coherent(&ofdev->dev,
|
|
|
|
sizeof(struct mal_descriptor) *
|
|
|
|
(NUM_TX_BUFF * mal->num_tx_chans +
|
|
|
|
NUM_RX_BUFF * mal->num_rx_chans), mal->bd_virt,
|
|
|
|
mal->bd_dma);
|
|
|
|
kfree(mal);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct of_device_id mal_platform_match[] =
|
|
|
|
{
|
|
|
|
{
|
|
|
|
.compatible = "ibm,mcmal",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.compatible = "ibm,mcmal2",
|
|
|
|
},
|
|
|
|
/* Backward compat */
|
|
|
|
{
|
|
|
|
.type = "mcmal-dma",
|
|
|
|
.compatible = "ibm,mcmal",
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.type = "mcmal-dma",
|
|
|
|
.compatible = "ibm,mcmal2",
|
|
|
|
},
|
|
|
|
{},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct of_platform_driver mal_of_driver = {
|
2010-04-14 07:13:02 +08:00
|
|
|
.driver = {
|
|
|
|
.name = "mcmal",
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.of_match_table = mal_platform_match,
|
|
|
|
},
|
Device tree aware EMAC driver
Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs. The
same ASIC is also found in the Axon bridge chip. This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.
This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac). The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).
This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging. Specifically:
- Should be adjusted to properly use the dma mapping API.
Axon needs this.
- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices. The dependencies here between
EMAC, MAL, ZMII etc. make this complicated. At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-08-23 11:56:01 +08:00
|
|
|
.probe = mal_probe,
|
|
|
|
.remove = mal_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
int __init mal_init(void)
|
|
|
|
{
|
|
|
|
return of_register_platform_driver(&mal_of_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
void mal_exit(void)
|
|
|
|
{
|
|
|
|
of_unregister_platform_driver(&mal_of_driver);
|
|
|
|
}
|