2011-06-21 01:47:27 +08:00
|
|
|
/*
|
|
|
|
* This file contains common code that is intended to be used across
|
|
|
|
* boards so that it's not replicated.
|
|
|
|
*
|
|
|
|
* Copyright (C) 2011 Xilinx
|
|
|
|
*
|
|
|
|
* This software is licensed under the terms of the GNU General Public
|
|
|
|
* License version 2, as published by the Free Software Foundation, and
|
|
|
|
* may be copied, distributed, and modified under those terms.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
* GNU General Public License for more details.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/cpumask.h>
|
|
|
|
#include <linux/platform_device.h>
|
|
|
|
#include <linux/clk.h>
|
|
|
|
#include <linux/of_irq.h>
|
|
|
|
#include <linux/of_platform.h>
|
2011-07-07 19:35:20 +08:00
|
|
|
#include <linux/of.h>
|
2011-06-21 01:47:27 +08:00
|
|
|
|
2011-07-07 19:35:20 +08:00
|
|
|
#include <asm/mach/arch.h>
|
2011-06-21 01:47:27 +08:00
|
|
|
#include <asm/mach/map.h>
|
2012-11-01 01:11:59 +08:00
|
|
|
#include <asm/mach/time.h>
|
2011-07-07 19:35:20 +08:00
|
|
|
#include <asm/mach-types.h>
|
2011-06-21 01:47:27 +08:00
|
|
|
#include <asm/page.h>
|
|
|
|
#include <asm/hardware/gic.h>
|
|
|
|
#include <asm/hardware/cache-l2x0.h>
|
|
|
|
|
|
|
|
#include <mach/zynq_soc.h>
|
|
|
|
#include "common.h"
|
|
|
|
|
|
|
|
static struct of_device_id zynq_of_bus_ids[] __initdata = {
|
|
|
|
{ .compatible = "simple-bus", },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* xilinx_init_machine() - System specific initialization, intended to be
|
|
|
|
* called from board specific initialization.
|
|
|
|
*/
|
2011-07-07 19:35:20 +08:00
|
|
|
static void __init xilinx_init_machine(void)
|
2011-06-21 01:47:27 +08:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* 64KB way size, 8-way associativity, parity disabled
|
|
|
|
*/
|
2012-10-24 06:34:22 +08:00
|
|
|
l2x0_of_init(0x02060000, 0xF0F0FFFF);
|
2011-06-21 01:47:27 +08:00
|
|
|
|
|
|
|
of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
|
|
|
|
}
|
|
|
|
|
2012-10-18 08:46:49 +08:00
|
|
|
static struct of_device_id irq_match[] __initdata = {
|
|
|
|
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
|
|
|
|
{ }
|
|
|
|
};
|
|
|
|
|
2011-06-21 01:47:27 +08:00
|
|
|
/**
|
|
|
|
* xilinx_irq_init() - Interrupt controller initialization for the GIC.
|
|
|
|
*/
|
2011-07-07 19:35:20 +08:00
|
|
|
static void __init xilinx_irq_init(void)
|
2011-06-21 01:47:27 +08:00
|
|
|
{
|
2012-10-18 08:46:49 +08:00
|
|
|
of_irq_init(irq_match);
|
2011-06-21 01:47:27 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* The minimum devices needed to be mapped before the VM system is up and
|
|
|
|
* running include the GIC, UART and Timer Counter.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static struct map_desc io_desc[] __initdata = {
|
|
|
|
{
|
|
|
|
.virtual = TTC0_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(TTC0_PHYS),
|
2012-10-22 10:15:37 +08:00
|
|
|
.length = TTC0_SIZE,
|
2011-06-21 01:47:27 +08:00
|
|
|
.type = MT_DEVICE,
|
|
|
|
}, {
|
|
|
|
.virtual = SCU_PERIPH_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
|
2012-10-22 10:15:37 +08:00
|
|
|
.length = SCU_PERIPH_SIZE,
|
2011-06-21 01:47:27 +08:00
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_LL
|
|
|
|
{
|
2012-11-06 05:45:49 +08:00
|
|
|
.virtual = LL_UART_VADDR,
|
|
|
|
.pfn = __phys_to_pfn(LL_UART_PADDR),
|
|
|
|
.length = UART_SIZE,
|
2011-06-21 01:47:27 +08:00
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
#endif
|
|
|
|
|
|
|
|
};
|
|
|
|
|
2012-11-01 01:11:59 +08:00
|
|
|
static void __init xilinx_zynq_timer_init(void)
|
|
|
|
{
|
|
|
|
xttcpss_timer_init();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Instantiate and initialize the system timer structure
|
|
|
|
*/
|
|
|
|
static struct sys_timer xttcpss_sys_timer = {
|
|
|
|
.init = xilinx_zynq_timer_init,
|
|
|
|
};
|
|
|
|
|
2011-06-21 01:47:27 +08:00
|
|
|
/**
|
|
|
|
* xilinx_map_io() - Create memory mappings needed for early I/O.
|
|
|
|
*/
|
2011-07-07 19:35:20 +08:00
|
|
|
static void __init xilinx_map_io(void)
|
2011-06-21 01:47:27 +08:00
|
|
|
{
|
|
|
|
iotable_init(io_desc, ARRAY_SIZE(io_desc));
|
|
|
|
}
|
2011-07-07 19:35:20 +08:00
|
|
|
|
|
|
|
static const char *xilinx_dt_match[] = {
|
|
|
|
"xlnx,zynq-ep107",
|
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
|
|
|
MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
|
|
|
|
.map_io = xilinx_map_io,
|
|
|
|
.init_irq = xilinx_irq_init,
|
2011-09-06 17:23:45 +08:00
|
|
|
.handle_irq = gic_handle_irq,
|
2011-07-07 19:35:20 +08:00
|
|
|
.init_machine = xilinx_init_machine,
|
|
|
|
.timer = &xttcpss_sys_timer,
|
|
|
|
.dt_compat = xilinx_dt_match,
|
|
|
|
MACHINE_END
|