2013-06-26 03:15:24 +08:00
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#include <linux/init.h>
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2005-04-17 06:20:36 +08:00
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/tty.h>
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#include <linux/console.h>
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#include <linux/rtc.h>
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#include <linux/vt_kern.h>
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#include <linux/interrupt.h>
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#include <asm/setup.h>
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#include <asm/bootinfo.h>
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2013-10-02 17:37:33 +08:00
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#include <asm/bootinfo-apollo.h>
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2013-10-04 17:41:24 +08:00
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#include <asm/byteorder.h>
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2005-04-17 06:20:36 +08:00
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#include <asm/pgtable.h>
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#include <asm/apollohw.h>
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#include <asm/irq.h>
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#include <asm/machdep.h>
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u_long sio01_physaddr;
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u_long sio23_physaddr;
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u_long rtc_physaddr;
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u_long pica_physaddr;
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u_long picb_physaddr;
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u_long cpuctrl_physaddr;
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u_long timer_physaddr;
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u_long apollo_model;
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2006-10-09 19:19:47 +08:00
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extern void dn_sched_init(irq_handler_t handler);
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2005-04-17 06:20:36 +08:00
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extern void dn_init_IRQ(void);
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2012-11-09 02:34:55 +08:00
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extern u32 dn_gettimeoffset(void);
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2005-04-17 06:20:36 +08:00
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extern int dn_dummy_hwclk(int, struct rtc_time *);
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extern int dn_dummy_set_clock_mmss(unsigned long);
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extern void dn_dummy_reset(void);
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#ifdef CONFIG_HEARTBEAT
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static void dn_heartbeat(int on);
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#endif
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2006-10-07 21:16:45 +08:00
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static irqreturn_t dn_timer_int(int irq,void *);
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2005-04-17 06:20:36 +08:00
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static void dn_get_model(char *model);
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static const char *apollo_models[] = {
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[APOLLO_DN3000-APOLLO_DN3000] = "DN3000 (Otter)",
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[APOLLO_DN3010-APOLLO_DN3000] = "DN3010 (Otter)",
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[APOLLO_DN3500-APOLLO_DN3000] = "DN3500 (Cougar II)",
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[APOLLO_DN4000-APOLLO_DN3000] = "DN4000 (Mink)",
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[APOLLO_DN4500-APOLLO_DN3000] = "DN4500 (Roadrunner)"
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};
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2013-06-26 03:15:24 +08:00
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int __init apollo_parse_bootinfo(const struct bi_record *record)
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{
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2005-04-17 06:20:36 +08:00
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int unknown = 0;
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2013-10-04 17:41:24 +08:00
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const void *data = record->data;
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2005-04-17 06:20:36 +08:00
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2013-10-04 17:41:24 +08:00
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switch (be16_to_cpu(record->tag)) {
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case BI_APOLLO_MODEL:
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apollo_model = be32_to_cpup(data);
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break;
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2005-04-17 06:20:36 +08:00
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2013-10-04 17:41:24 +08:00
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default:
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unknown=1;
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2005-04-17 06:20:36 +08:00
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}
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return unknown;
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}
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2013-06-26 03:15:24 +08:00
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static void __init dn_setup_model(void)
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{
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2014-05-10 18:40:53 +08:00
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pr_info("Apollo hardware found: [%s]\n",
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apollo_models[apollo_model - APOLLO_DN3000]);
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2005-04-17 06:20:36 +08:00
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switch(apollo_model) {
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case APOLLO_UNKNOWN:
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panic("Unknown apollo model");
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break;
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case APOLLO_DN3000:
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case APOLLO_DN3010:
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sio01_physaddr=SAU8_SIO01_PHYSADDR;
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rtc_physaddr=SAU8_RTC_PHYSADDR;
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pica_physaddr=SAU8_PICA;
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picb_physaddr=SAU8_PICB;
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cpuctrl_physaddr=SAU8_CPUCTRL;
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timer_physaddr=SAU8_TIMER;
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break;
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case APOLLO_DN4000:
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sio01_physaddr=SAU7_SIO01_PHYSADDR;
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sio23_physaddr=SAU7_SIO23_PHYSADDR;
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rtc_physaddr=SAU7_RTC_PHYSADDR;
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pica_physaddr=SAU7_PICA;
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picb_physaddr=SAU7_PICB;
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cpuctrl_physaddr=SAU7_CPUCTRL;
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timer_physaddr=SAU7_TIMER;
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break;
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case APOLLO_DN4500:
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panic("Apollo model not yet supported");
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break;
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case APOLLO_DN3500:
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sio01_physaddr=SAU7_SIO01_PHYSADDR;
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sio23_physaddr=SAU7_SIO23_PHYSADDR;
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rtc_physaddr=SAU7_RTC_PHYSADDR;
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pica_physaddr=SAU7_PICA;
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picb_physaddr=SAU7_PICB;
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cpuctrl_physaddr=SAU7_CPUCTRL;
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timer_physaddr=SAU7_TIMER;
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break;
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default:
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panic("Undefined apollo model");
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break;
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}
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}
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int dn_serial_console_wait_key(struct console *co) {
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while(!(sio01.srb_csrb & 1))
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barrier();
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return sio01.rhrb_thrb;
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}
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void dn_serial_console_write (struct console *co, const char *str,unsigned int count)
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{
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while(count--) {
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if (*str == '\n') {
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sio01.rhrb_thrb = (unsigned char)'\r';
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while (!(sio01.srb_csrb & 0x4))
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;
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}
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sio01.rhrb_thrb = (unsigned char)*str++;
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while (!(sio01.srb_csrb & 0x4))
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;
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}
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}
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void dn_serial_print (const char *str)
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{
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while (*str) {
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if (*str == '\n') {
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sio01.rhrb_thrb = (unsigned char)'\r';
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while (!(sio01.srb_csrb & 0x4))
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;
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}
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sio01.rhrb_thrb = (unsigned char)*str++;
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while (!(sio01.srb_csrb & 0x4))
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;
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}
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}
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2007-07-20 11:33:28 +08:00
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void __init config_apollo(void)
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{
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2005-04-17 06:20:36 +08:00
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int i;
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dn_setup_model();
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mach_sched_init=dn_sched_init; /* */
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mach_init_IRQ=dn_init_IRQ;
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2012-11-09 02:34:55 +08:00
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arch_gettimeoffset = dn_gettimeoffset;
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2005-04-17 06:20:36 +08:00
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mach_max_dma_address = 0xffffffff;
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mach_hwclk = dn_dummy_hwclk; /* */
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mach_set_clock_mmss = dn_dummy_set_clock_mmss; /* */
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mach_reset = dn_dummy_reset; /* */
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#ifdef CONFIG_HEARTBEAT
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mach_heartbeat = dn_heartbeat;
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#endif
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mach_get_model = dn_get_model;
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cpuctrl=0xaa00;
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/* clear DMA translation table */
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for(i=0;i<0x400;i++)
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addr_xlat_map[i]=0;
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}
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2006-10-07 21:16:45 +08:00
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irqreturn_t dn_timer_int(int irq, void *dev_id)
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2006-06-25 20:47:02 +08:00
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{
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2006-10-09 19:19:47 +08:00
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irq_handler_t timer_handler = dev_id;
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2005-04-17 06:20:36 +08:00
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volatile unsigned char x;
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2006-10-07 21:16:45 +08:00
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timer_handler(irq, dev_id);
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2005-04-17 06:20:36 +08:00
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2012-07-21 03:54:29 +08:00
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x = *(volatile unsigned char *)(apollo_timer + 3);
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x = *(volatile unsigned char *)(apollo_timer + 5);
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2005-04-17 06:20:36 +08:00
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return IRQ_HANDLED;
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}
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2006-10-09 19:19:47 +08:00
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void dn_sched_init(irq_handler_t timer_routine)
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2006-10-07 21:16:45 +08:00
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{
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2005-04-17 06:20:36 +08:00
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/* program timer 1 */
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2012-07-21 03:54:29 +08:00
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*(volatile unsigned char *)(apollo_timer + 3) = 0x01;
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*(volatile unsigned char *)(apollo_timer + 1) = 0x40;
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*(volatile unsigned char *)(apollo_timer + 5) = 0x09;
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*(volatile unsigned char *)(apollo_timer + 7) = 0xc4;
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2005-04-17 06:20:36 +08:00
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/* enable IRQ of PIC B */
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*(volatile unsigned char *)(pica+1)&=(~8);
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#if 0
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2014-05-10 18:40:53 +08:00
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pr_info("*(0x10803) %02x\n",
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*(volatile unsigned char *)(apollo_timer + 0x3));
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pr_info("*(0x10803) %02x\n",
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*(volatile unsigned char *)(apollo_timer + 0x3));
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2005-04-17 06:20:36 +08:00
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#endif
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2008-12-30 21:01:07 +08:00
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if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
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pr_err("Couldn't register timer interrupt\n");
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2005-04-17 06:20:36 +08:00
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}
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2012-11-09 02:34:55 +08:00
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u32 dn_gettimeoffset(void)
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{
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2005-04-17 06:20:36 +08:00
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return 0xdeadbeef;
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}
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int dn_dummy_hwclk(int op, struct rtc_time *t) {
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if(!op) { /* read */
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t->tm_sec=rtc->second;
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t->tm_min=rtc->minute;
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t->tm_hour=rtc->hours;
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t->tm_mday=rtc->day_of_month;
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t->tm_wday=rtc->day_of_week;
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t->tm_mon=rtc->month;
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t->tm_year=rtc->year;
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} else {
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rtc->second=t->tm_sec;
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rtc->minute=t->tm_min;
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rtc->hours=t->tm_hour;
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rtc->day_of_month=t->tm_mday;
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if(t->tm_wday!=-1)
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rtc->day_of_week=t->tm_wday;
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rtc->month=t->tm_mon;
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rtc->year=t->tm_year;
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}
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return 0;
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}
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2014-05-10 18:40:53 +08:00
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int dn_dummy_set_clock_mmss(unsigned long nowtime)
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{
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pr_info("set_clock_mmss\n");
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return 0;
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2005-04-17 06:20:36 +08:00
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}
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void dn_dummy_reset(void) {
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dn_serial_print("The end !\n");
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for(;;);
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}
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void dn_dummy_waitbut(void) {
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dn_serial_print("waitbut\n");
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}
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static void dn_get_model(char *model)
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{
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strcpy(model, "Apollo ");
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if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
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strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
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}
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#ifdef CONFIG_HEARTBEAT
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static int dn_cpuctrl=0xff00;
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static void dn_heartbeat(int on) {
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if(on) {
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dn_cpuctrl&=~0x100;
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cpuctrl=dn_cpuctrl;
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}
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else {
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dn_cpuctrl&=~0x100;
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dn_cpuctrl|=0x100;
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cpuctrl=dn_cpuctrl;
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}
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}
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#endif
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