2012-05-09 23:09:13 +08:00
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/*
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* Dmaengine driver base library for DMA controllers, found on SH-based SoCs
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*
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* extracted from shdma.c
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*
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* Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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* Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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* Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
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* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/shdma-base.h>
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#include <linux/dmaengine.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include "../dmaengine.h"
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/* DMA descriptor control */
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enum shdma_desc_status {
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DESC_IDLE,
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DESC_PREPARED,
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DESC_SUBMITTED,
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DESC_COMPLETED, /* completed, have to call callback */
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DESC_WAITING, /* callback called, waiting for ack / re-submit */
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};
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#define NR_DESCS_PER_CHANNEL 32
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#define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
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#define to_shdma_dev(d) container_of(d, struct shdma_dev, dma_dev)
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/*
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* For slave DMA we assume, that there is a finite number of DMA slaves in the
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* system, and that each such slave can only use a finite number of channels.
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* We use slave channel IDs to make sure, that no such slave channel ID is
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* allocated more than once.
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*/
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static unsigned int slave_num = 256;
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module_param(slave_num, uint, 0444);
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/* A bitmask with slave_num bits */
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static unsigned long *shdma_slave_used;
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/* Called under spin_lock_irq(&schan->chan_lock") */
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static void shdma_chan_xfer_ld_queue(struct shdma_chan *schan)
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{
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struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
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const struct shdma_ops *ops = sdev->ops;
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struct shdma_desc *sdesc;
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/* DMA work check */
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if (ops->channel_busy(schan))
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return;
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/* Find the first not transferred descriptor */
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list_for_each_entry(sdesc, &schan->ld_queue, node)
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if (sdesc->mark == DESC_SUBMITTED) {
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ops->start_xfer(schan, sdesc);
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break;
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}
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}
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static dma_cookie_t shdma_tx_submit(struct dma_async_tx_descriptor *tx)
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{
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struct shdma_desc *chunk, *c, *desc =
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container_of(tx, struct shdma_desc, async_tx),
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*last = desc;
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struct shdma_chan *schan = to_shdma_chan(tx->chan);
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dma_async_tx_callback callback = tx->callback;
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dma_cookie_t cookie;
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bool power_up;
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spin_lock_irq(&schan->chan_lock);
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power_up = list_empty(&schan->ld_queue);
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cookie = dma_cookie_assign(tx);
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/* Mark all chunks of this descriptor as submitted, move to the queue */
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list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
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/*
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* All chunks are on the global ld_free, so, we have to find
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* the end of the chain ourselves
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*/
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if (chunk != desc && (chunk->mark == DESC_IDLE ||
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chunk->async_tx.cookie > 0 ||
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chunk->async_tx.cookie == -EBUSY ||
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&chunk->node == &schan->ld_free))
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break;
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chunk->mark = DESC_SUBMITTED;
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/* Callback goes to the last chunk */
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chunk->async_tx.callback = NULL;
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chunk->cookie = cookie;
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list_move_tail(&chunk->node, &schan->ld_queue);
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last = chunk;
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dev_dbg(schan->dev, "submit #%d@%p on %d\n",
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tx->cookie, &last->async_tx, schan->id);
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}
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last->async_tx.callback = callback;
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last->async_tx.callback_param = tx->callback_param;
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if (power_up) {
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int ret;
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schan->pm_state = SHDMA_PM_BUSY;
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ret = pm_runtime_get(schan->dev);
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spin_unlock_irq(&schan->chan_lock);
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if (ret < 0)
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dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret);
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pm_runtime_barrier(schan->dev);
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spin_lock_irq(&schan->chan_lock);
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/* Have we been reset, while waiting? */
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if (schan->pm_state != SHDMA_PM_ESTABLISHED) {
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struct shdma_dev *sdev =
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to_shdma_dev(schan->dma_chan.device);
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const struct shdma_ops *ops = sdev->ops;
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dev_dbg(schan->dev, "Bring up channel %d\n",
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schan->id);
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/*
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* TODO: .xfer_setup() might fail on some platforms.
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* Make it int then, on error remove chunks from the
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* queue again
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*/
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2012-07-05 18:29:41 +08:00
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ops->setup_xfer(schan, schan->slave_id);
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2012-05-09 23:09:13 +08:00
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if (schan->pm_state == SHDMA_PM_PENDING)
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shdma_chan_xfer_ld_queue(schan);
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schan->pm_state = SHDMA_PM_ESTABLISHED;
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}
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} else {
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/*
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* Tell .device_issue_pending() not to run the queue, interrupts
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* will do it anyway
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*/
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schan->pm_state = SHDMA_PM_PENDING;
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}
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spin_unlock_irq(&schan->chan_lock);
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return cookie;
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}
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/* Called with desc_lock held */
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static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan)
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{
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struct shdma_desc *sdesc;
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list_for_each_entry(sdesc, &schan->ld_free, node)
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if (sdesc->mark != DESC_PREPARED) {
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BUG_ON(sdesc->mark != DESC_IDLE);
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list_del(&sdesc->node);
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return sdesc;
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}
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return NULL;
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}
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2012-07-05 18:29:42 +08:00
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static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
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{
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struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
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const struct shdma_ops *ops = sdev->ops;
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int ret;
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if (slave_id < 0 || slave_id >= slave_num)
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return -EINVAL;
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if (test_and_set_bit(slave_id, shdma_slave_used))
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return -EBUSY;
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ret = ops->set_slave(schan, slave_id, false);
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if (ret < 0) {
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clear_bit(slave_id, shdma_slave_used);
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return ret;
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}
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schan->slave_id = slave_id;
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return 0;
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}
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/*
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* This is the standard shdma filter function to be used as a replacement to the
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* "old" method, using the .private pointer. If for some reason you allocate a
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* channel without slave data, use something like ERR_PTR(-EINVAL) as a filter
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* parameter. If this filter is used, the slave driver, after calling
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* dma_request_channel(), will also have to call dmaengine_slave_config() with
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* .slave_id, .direction, and either .src_addr or .dst_addr set.
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* NOTE: this filter doesn't support multiple DMAC drivers with the DMA_SLAVE
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* capability! If this becomes a requirement, hardware glue drivers, using this
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* services would have to provide their own filters, which first would check
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* the device driver, similar to how other DMAC drivers, e.g., sa11x0-dma.c, do
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* this, and only then, in case of a match, call this common filter.
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*/
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bool shdma_chan_filter(struct dma_chan *chan, void *arg)
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{
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struct shdma_chan *schan = to_shdma_chan(chan);
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struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
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const struct shdma_ops *ops = sdev->ops;
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int slave_id = (int)arg;
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int ret;
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if (slave_id < 0)
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/* No slave requested - arbitrary channel */
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return true;
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if (slave_id >= slave_num)
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return false;
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ret = ops->set_slave(schan, slave_id, true);
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if (ret < 0)
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return false;
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return true;
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}
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EXPORT_SYMBOL(shdma_chan_filter);
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2012-05-09 23:09:13 +08:00
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static int shdma_alloc_chan_resources(struct dma_chan *chan)
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{
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struct shdma_chan *schan = to_shdma_chan(chan);
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struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
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const struct shdma_ops *ops = sdev->ops;
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struct shdma_desc *desc;
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struct shdma_slave *slave = chan->private;
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int ret, i;
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/*
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* This relies on the guarantee from dmaengine that alloc_chan_resources
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* never runs concurrently with itself or free_chan_resources.
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*/
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if (slave) {
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2012-07-05 18:29:42 +08:00
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/* Legacy mode: .private is set in filter */
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ret = shdma_setup_slave(schan, slave->slave_id);
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2012-05-09 23:09:13 +08:00
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if (ret < 0)
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goto esetslave;
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2012-07-05 18:29:41 +08:00
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} else {
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schan->slave_id = -EINVAL;
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2012-05-09 23:09:13 +08:00
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}
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schan->desc = kcalloc(NR_DESCS_PER_CHANNEL,
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sdev->desc_size, GFP_KERNEL);
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if (!schan->desc) {
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ret = -ENOMEM;
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goto edescalloc;
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}
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schan->desc_num = NR_DESCS_PER_CHANNEL;
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for (i = 0; i < NR_DESCS_PER_CHANNEL; i++) {
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desc = ops->embedded_desc(schan->desc, i);
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dma_async_tx_descriptor_init(&desc->async_tx,
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&schan->dma_chan);
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desc->async_tx.tx_submit = shdma_tx_submit;
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desc->mark = DESC_IDLE;
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list_add(&desc->node, &schan->ld_free);
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}
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return NR_DESCS_PER_CHANNEL;
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edescalloc:
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if (slave)
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esetslave:
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clear_bit(slave->slave_id, shdma_slave_used);
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chan->private = NULL;
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return ret;
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}
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static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all)
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{
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struct shdma_desc *desc, *_desc;
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/* Is the "exposed" head of a chain acked? */
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bool head_acked = false;
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dma_cookie_t cookie = 0;
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dma_async_tx_callback callback = NULL;
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void *param = NULL;
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unsigned long flags;
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spin_lock_irqsave(&schan->chan_lock, flags);
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list_for_each_entry_safe(desc, _desc, &schan->ld_queue, node) {
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struct dma_async_tx_descriptor *tx = &desc->async_tx;
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BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
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BUG_ON(desc->mark != DESC_SUBMITTED &&
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desc->mark != DESC_COMPLETED &&
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desc->mark != DESC_WAITING);
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/*
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* queue is ordered, and we use this loop to (1) clean up all
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* completed descriptors, and to (2) update descriptor flags of
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* any chunks in a (partially) completed chain
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*/
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if (!all && desc->mark == DESC_SUBMITTED &&
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desc->cookie != cookie)
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break;
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if (tx->cookie > 0)
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cookie = tx->cookie;
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if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
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if (schan->dma_chan.completed_cookie != desc->cookie - 1)
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dev_dbg(schan->dev,
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"Completing cookie %d, expected %d\n",
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desc->cookie,
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schan->dma_chan.completed_cookie + 1);
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schan->dma_chan.completed_cookie = desc->cookie;
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}
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/* Call callback on the last chunk */
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if (desc->mark == DESC_COMPLETED && tx->callback) {
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desc->mark = DESC_WAITING;
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callback = tx->callback;
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param = tx->callback_param;
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dev_dbg(schan->dev, "descriptor #%d@%p on %d callback\n",
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tx->cookie, tx, schan->id);
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BUG_ON(desc->chunks != 1);
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break;
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}
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if (tx->cookie > 0 || tx->cookie == -EBUSY) {
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if (desc->mark == DESC_COMPLETED) {
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BUG_ON(tx->cookie < 0);
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desc->mark = DESC_WAITING;
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}
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head_acked = async_tx_test_ack(tx);
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} else {
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switch (desc->mark) {
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case DESC_COMPLETED:
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desc->mark = DESC_WAITING;
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/* Fall through */
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case DESC_WAITING:
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if (head_acked)
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async_tx_ack(&desc->async_tx);
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}
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}
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dev_dbg(schan->dev, "descriptor %p #%d completed.\n",
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tx, tx->cookie);
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if (((desc->mark == DESC_COMPLETED ||
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desc->mark == DESC_WAITING) &&
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async_tx_test_ack(&desc->async_tx)) || all) {
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|
|
/* Remove from ld_queue list */
|
|
|
|
desc->mark = DESC_IDLE;
|
|
|
|
|
|
|
|
list_move(&desc->node, &schan->ld_free);
|
|
|
|
|
|
|
|
if (list_empty(&schan->ld_queue)) {
|
|
|
|
dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
|
|
|
|
pm_runtime_put(schan->dev);
|
|
|
|
schan->pm_state = SHDMA_PM_ESTABLISHED;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (all && !callback)
|
|
|
|
/*
|
|
|
|
* Terminating and the loop completed normally: forgive
|
|
|
|
* uncompleted cookies
|
|
|
|
*/
|
|
|
|
schan->dma_chan.completed_cookie = schan->dma_chan.cookie;
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&schan->chan_lock, flags);
|
|
|
|
|
|
|
|
if (callback)
|
|
|
|
callback(param);
|
|
|
|
|
|
|
|
return callback;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* shdma_chan_ld_cleanup - Clean up link descriptors
|
|
|
|
*
|
|
|
|
* Clean up the ld_queue of DMA channel.
|
|
|
|
*/
|
|
|
|
static void shdma_chan_ld_cleanup(struct shdma_chan *schan, bool all)
|
|
|
|
{
|
|
|
|
while (__ld_cleanup(schan, all))
|
|
|
|
;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* shdma_free_chan_resources - Free all resources of the channel.
|
|
|
|
*/
|
|
|
|
static void shdma_free_chan_resources(struct dma_chan *chan)
|
|
|
|
{
|
|
|
|
struct shdma_chan *schan = to_shdma_chan(chan);
|
|
|
|
struct shdma_dev *sdev = to_shdma_dev(chan->device);
|
|
|
|
const struct shdma_ops *ops = sdev->ops;
|
|
|
|
LIST_HEAD(list);
|
|
|
|
|
|
|
|
/* Protect against ISR */
|
|
|
|
spin_lock_irq(&schan->chan_lock);
|
|
|
|
ops->halt_channel(schan);
|
|
|
|
spin_unlock_irq(&schan->chan_lock);
|
|
|
|
|
|
|
|
/* Now no new interrupts will occur */
|
|
|
|
|
|
|
|
/* Prepared and not submitted descriptors can still be on the queue */
|
|
|
|
if (!list_empty(&schan->ld_queue))
|
|
|
|
shdma_chan_ld_cleanup(schan, true);
|
|
|
|
|
2012-07-05 18:29:41 +08:00
|
|
|
if (schan->slave_id >= 0) {
|
2012-05-09 23:09:13 +08:00
|
|
|
/* The caller is holding dma_list_mutex */
|
2012-07-05 18:29:41 +08:00
|
|
|
clear_bit(schan->slave_id, shdma_slave_used);
|
2012-05-09 23:09:13 +08:00
|
|
|
chan->private = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock_irq(&schan->chan_lock);
|
|
|
|
|
|
|
|
list_splice_init(&schan->ld_free, &list);
|
|
|
|
schan->desc_num = 0;
|
|
|
|
|
|
|
|
spin_unlock_irq(&schan->chan_lock);
|
|
|
|
|
|
|
|
kfree(schan->desc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* shdma_add_desc - get, set up and return one transfer descriptor
|
|
|
|
* @schan: DMA channel
|
|
|
|
* @flags: DMA transfer flags
|
|
|
|
* @dst: destination DMA address, incremented when direction equals
|
|
|
|
* DMA_DEV_TO_MEM or DMA_MEM_TO_MEM
|
|
|
|
* @src: source DMA address, incremented when direction equals
|
|
|
|
* DMA_MEM_TO_DEV or DMA_MEM_TO_MEM
|
|
|
|
* @len: DMA transfer length
|
|
|
|
* @first: if NULL, set to the current descriptor and cookie set to -EBUSY
|
|
|
|
* @direction: needed for slave DMA to decide which address to keep constant,
|
|
|
|
* equals DMA_MEM_TO_MEM for MEMCPY
|
|
|
|
* Returns 0 or an error
|
|
|
|
* Locks: called with desc_lock held
|
|
|
|
*/
|
|
|
|
static struct shdma_desc *shdma_add_desc(struct shdma_chan *schan,
|
|
|
|
unsigned long flags, dma_addr_t *dst, dma_addr_t *src, size_t *len,
|
|
|
|
struct shdma_desc **first, enum dma_transfer_direction direction)
|
|
|
|
{
|
|
|
|
struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
|
|
|
|
const struct shdma_ops *ops = sdev->ops;
|
|
|
|
struct shdma_desc *new;
|
|
|
|
size_t copy_size = *len;
|
|
|
|
|
|
|
|
if (!copy_size)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
/* Allocate the link descriptor from the free list */
|
|
|
|
new = shdma_get_desc(schan);
|
|
|
|
if (!new) {
|
|
|
|
dev_err(schan->dev, "No free link descriptor available\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ops->desc_setup(schan, new, *src, *dst, ©_size);
|
|
|
|
|
|
|
|
if (!*first) {
|
|
|
|
/* First desc */
|
|
|
|
new->async_tx.cookie = -EBUSY;
|
|
|
|
*first = new;
|
|
|
|
} else {
|
|
|
|
/* Other desc - invisible to the user */
|
|
|
|
new->async_tx.cookie = -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_dbg(schan->dev,
|
|
|
|
"chaining (%u/%u)@%x -> %x with %p, cookie %d\n",
|
|
|
|
copy_size, *len, *src, *dst, &new->async_tx,
|
|
|
|
new->async_tx.cookie);
|
|
|
|
|
|
|
|
new->mark = DESC_PREPARED;
|
|
|
|
new->async_tx.flags = flags;
|
|
|
|
new->direction = direction;
|
|
|
|
|
|
|
|
*len -= copy_size;
|
|
|
|
if (direction == DMA_MEM_TO_MEM || direction == DMA_MEM_TO_DEV)
|
|
|
|
*src += copy_size;
|
|
|
|
if (direction == DMA_MEM_TO_MEM || direction == DMA_DEV_TO_MEM)
|
|
|
|
*dst += copy_size;
|
|
|
|
|
|
|
|
return new;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* shdma_prep_sg - prepare transfer descriptors from an SG list
|
|
|
|
*
|
|
|
|
* Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
|
|
|
|
* converted to scatter-gather to guarantee consistent locking and a correct
|
|
|
|
* list manipulation. For slave DMA direction carries the usual meaning, and,
|
|
|
|
* logically, the SG list is RAM and the addr variable contains slave address,
|
|
|
|
* e.g., the FIFO I/O register. For MEMCPY direction equals DMA_MEM_TO_MEM
|
|
|
|
* and the SG list contains only one element and points at the source buffer.
|
|
|
|
*/
|
|
|
|
static struct dma_async_tx_descriptor *shdma_prep_sg(struct shdma_chan *schan,
|
|
|
|
struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
|
|
|
|
enum dma_transfer_direction direction, unsigned long flags)
|
|
|
|
{
|
|
|
|
struct scatterlist *sg;
|
|
|
|
struct shdma_desc *first = NULL, *new = NULL /* compiler... */;
|
|
|
|
LIST_HEAD(tx_list);
|
|
|
|
int chunks = 0;
|
|
|
|
unsigned long irq_flags;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for_each_sg(sgl, sg, sg_len, i)
|
|
|
|
chunks += DIV_ROUND_UP(sg_dma_len(sg), schan->max_xfer_len);
|
|
|
|
|
|
|
|
/* Have to lock the whole loop to protect against concurrent release */
|
|
|
|
spin_lock_irqsave(&schan->chan_lock, irq_flags);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Chaining:
|
|
|
|
* first descriptor is what user is dealing with in all API calls, its
|
|
|
|
* cookie is at first set to -EBUSY, at tx-submit to a positive
|
|
|
|
* number
|
|
|
|
* if more than one chunk is needed further chunks have cookie = -EINVAL
|
|
|
|
* the last chunk, if not equal to the first, has cookie = -ENOSPC
|
|
|
|
* all chunks are linked onto the tx_list head with their .node heads
|
|
|
|
* only during this function, then they are immediately spliced
|
|
|
|
* back onto the free list in form of a chain
|
|
|
|
*/
|
|
|
|
for_each_sg(sgl, sg, sg_len, i) {
|
|
|
|
dma_addr_t sg_addr = sg_dma_address(sg);
|
|
|
|
size_t len = sg_dma_len(sg);
|
|
|
|
|
|
|
|
if (!len)
|
|
|
|
goto err_get_desc;
|
|
|
|
|
|
|
|
do {
|
|
|
|
dev_dbg(schan->dev, "Add SG #%d@%p[%d], dma %llx\n",
|
|
|
|
i, sg, len, (unsigned long long)sg_addr);
|
|
|
|
|
|
|
|
if (direction == DMA_DEV_TO_MEM)
|
|
|
|
new = shdma_add_desc(schan, flags,
|
|
|
|
&sg_addr, addr, &len, &first,
|
|
|
|
direction);
|
|
|
|
else
|
|
|
|
new = shdma_add_desc(schan, flags,
|
|
|
|
addr, &sg_addr, &len, &first,
|
|
|
|
direction);
|
|
|
|
if (!new)
|
|
|
|
goto err_get_desc;
|
|
|
|
|
|
|
|
new->chunks = chunks--;
|
|
|
|
list_add_tail(&new->node, &tx_list);
|
|
|
|
} while (len);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (new != first)
|
|
|
|
new->async_tx.cookie = -ENOSPC;
|
|
|
|
|
|
|
|
/* Put them back on the free list, so, they don't get lost */
|
|
|
|
list_splice_tail(&tx_list, &schan->ld_free);
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
|
|
|
|
|
|
|
|
return &first->async_tx;
|
|
|
|
|
|
|
|
err_get_desc:
|
|
|
|
list_for_each_entry(new, &tx_list, node)
|
|
|
|
new->mark = DESC_IDLE;
|
|
|
|
list_splice(&tx_list, &schan->ld_free);
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct dma_async_tx_descriptor *shdma_prep_memcpy(
|
|
|
|
struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
|
|
|
|
size_t len, unsigned long flags)
|
|
|
|
{
|
|
|
|
struct shdma_chan *schan = to_shdma_chan(chan);
|
|
|
|
struct scatterlist sg;
|
|
|
|
|
|
|
|
if (!chan || !len)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
BUG_ON(!schan->desc_num);
|
|
|
|
|
|
|
|
sg_init_table(&sg, 1);
|
|
|
|
sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
|
|
|
|
offset_in_page(dma_src));
|
|
|
|
sg_dma_address(&sg) = dma_src;
|
|
|
|
sg_dma_len(&sg) = len;
|
|
|
|
|
|
|
|
return shdma_prep_sg(schan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct dma_async_tx_descriptor *shdma_prep_slave_sg(
|
|
|
|
struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
|
|
|
|
enum dma_transfer_direction direction, unsigned long flags, void *context)
|
|
|
|
{
|
|
|
|
struct shdma_chan *schan = to_shdma_chan(chan);
|
|
|
|
struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
|
|
|
|
const struct shdma_ops *ops = sdev->ops;
|
2012-07-05 18:29:41 +08:00
|
|
|
int slave_id = schan->slave_id;
|
2012-05-09 23:09:13 +08:00
|
|
|
dma_addr_t slave_addr;
|
|
|
|
|
|
|
|
if (!chan)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
BUG_ON(!schan->desc_num);
|
|
|
|
|
|
|
|
/* Someone calling slave DMA on a generic channel? */
|
2012-07-05 18:29:41 +08:00
|
|
|
if (slave_id < 0 || !sg_len) {
|
|
|
|
dev_warn(schan->dev, "%s: bad parameter: len=%d, id=%d\n",
|
|
|
|
__func__, sg_len, slave_id);
|
2012-05-09 23:09:13 +08:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
slave_addr = ops->slave_addr(schan);
|
|
|
|
|
|
|
|
return shdma_prep_sg(schan, sgl, sg_len, &slave_addr,
|
|
|
|
direction, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
|
|
|
|
unsigned long arg)
|
|
|
|
{
|
|
|
|
struct shdma_chan *schan = to_shdma_chan(chan);
|
|
|
|
struct shdma_dev *sdev = to_shdma_dev(chan->device);
|
|
|
|
const struct shdma_ops *ops = sdev->ops;
|
2012-07-05 18:29:42 +08:00
|
|
|
struct dma_slave_config *config;
|
2012-05-09 23:09:13 +08:00
|
|
|
unsigned long flags;
|
2012-07-05 18:29:42 +08:00
|
|
|
int ret;
|
2012-05-09 23:09:13 +08:00
|
|
|
|
|
|
|
if (!chan)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2012-07-05 18:29:42 +08:00
|
|
|
switch (cmd) {
|
|
|
|
case DMA_TERMINATE_ALL:
|
|
|
|
spin_lock_irqsave(&schan->chan_lock, flags);
|
|
|
|
ops->halt_channel(schan);
|
|
|
|
spin_unlock_irqrestore(&schan->chan_lock, flags);
|
2012-05-09 23:09:13 +08:00
|
|
|
|
2012-07-05 18:29:42 +08:00
|
|
|
shdma_chan_ld_cleanup(schan, true);
|
|
|
|
break;
|
|
|
|
case DMA_SLAVE_CONFIG:
|
|
|
|
/*
|
|
|
|
* So far only .slave_id is used, but the slave drivers are
|
|
|
|
* encouraged to also set a transfer direction and an address.
|
|
|
|
*/
|
|
|
|
if (!arg)
|
|
|
|
return -EINVAL;
|
|
|
|
/*
|
|
|
|
* We could lock this, but you shouldn't be configuring the
|
|
|
|
* channel, while using it...
|
|
|
|
*/
|
|
|
|
config = (struct dma_slave_config *)arg;
|
|
|
|
ret = shdma_setup_slave(schan, config->slave_id);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -ENXIO;
|
|
|
|
}
|
2012-05-09 23:09:13 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void shdma_issue_pending(struct dma_chan *chan)
|
|
|
|
{
|
|
|
|
struct shdma_chan *schan = to_shdma_chan(chan);
|
|
|
|
|
|
|
|
spin_lock_irq(&schan->chan_lock);
|
|
|
|
if (schan->pm_state == SHDMA_PM_ESTABLISHED)
|
|
|
|
shdma_chan_xfer_ld_queue(schan);
|
|
|
|
else
|
|
|
|
schan->pm_state = SHDMA_PM_PENDING;
|
|
|
|
spin_unlock_irq(&schan->chan_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
static enum dma_status shdma_tx_status(struct dma_chan *chan,
|
|
|
|
dma_cookie_t cookie,
|
|
|
|
struct dma_tx_state *txstate)
|
|
|
|
{
|
|
|
|
struct shdma_chan *schan = to_shdma_chan(chan);
|
|
|
|
enum dma_status status;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
shdma_chan_ld_cleanup(schan, false);
|
|
|
|
|
|
|
|
spin_lock_irqsave(&schan->chan_lock, flags);
|
|
|
|
|
|
|
|
status = dma_cookie_status(chan, cookie, txstate);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If we don't find cookie on the queue, it has been aborted and we have
|
|
|
|
* to report error
|
|
|
|
*/
|
|
|
|
if (status != DMA_SUCCESS) {
|
|
|
|
struct shdma_desc *sdesc;
|
|
|
|
status = DMA_ERROR;
|
|
|
|
list_for_each_entry(sdesc, &schan->ld_queue, node)
|
|
|
|
if (sdesc->cookie == cookie) {
|
|
|
|
status = DMA_IN_PROGRESS;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&schan->chan_lock, flags);
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Called from error IRQ or NMI */
|
|
|
|
bool shdma_reset(struct shdma_dev *sdev)
|
|
|
|
{
|
|
|
|
const struct shdma_ops *ops = sdev->ops;
|
|
|
|
struct shdma_chan *schan;
|
|
|
|
unsigned int handled = 0;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Reset all channels */
|
|
|
|
shdma_for_each_chan(schan, sdev, i) {
|
|
|
|
struct shdma_desc *sdesc;
|
|
|
|
LIST_HEAD(dl);
|
|
|
|
|
|
|
|
if (!schan)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
spin_lock(&schan->chan_lock);
|
|
|
|
|
|
|
|
/* Stop the channel */
|
|
|
|
ops->halt_channel(schan);
|
|
|
|
|
|
|
|
list_splice_init(&schan->ld_queue, &dl);
|
|
|
|
|
|
|
|
if (!list_empty(&dl)) {
|
|
|
|
dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
|
|
|
|
pm_runtime_put(schan->dev);
|
|
|
|
}
|
|
|
|
schan->pm_state = SHDMA_PM_ESTABLISHED;
|
|
|
|
|
|
|
|
spin_unlock(&schan->chan_lock);
|
|
|
|
|
|
|
|
/* Complete all */
|
|
|
|
list_for_each_entry(sdesc, &dl, node) {
|
|
|
|
struct dma_async_tx_descriptor *tx = &sdesc->async_tx;
|
|
|
|
sdesc->mark = DESC_IDLE;
|
|
|
|
if (tx->callback)
|
|
|
|
tx->callback(tx->callback_param);
|
|
|
|
}
|
|
|
|
|
|
|
|
spin_lock(&schan->chan_lock);
|
|
|
|
list_splice(&dl, &schan->ld_free);
|
|
|
|
spin_unlock(&schan->chan_lock);
|
|
|
|
|
|
|
|
handled++;
|
|
|
|
}
|
|
|
|
|
|
|
|
return !!handled;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(shdma_reset);
|
|
|
|
|
|
|
|
static irqreturn_t chan_irq(int irq, void *dev)
|
|
|
|
{
|
|
|
|
struct shdma_chan *schan = dev;
|
|
|
|
const struct shdma_ops *ops =
|
|
|
|
to_shdma_dev(schan->dma_chan.device)->ops;
|
|
|
|
irqreturn_t ret;
|
|
|
|
|
|
|
|
spin_lock(&schan->chan_lock);
|
|
|
|
|
|
|
|
ret = ops->chan_irq(schan, irq) ? IRQ_WAKE_THREAD : IRQ_NONE;
|
|
|
|
|
|
|
|
spin_unlock(&schan->chan_lock);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t chan_irqt(int irq, void *dev)
|
|
|
|
{
|
|
|
|
struct shdma_chan *schan = dev;
|
|
|
|
const struct shdma_ops *ops =
|
|
|
|
to_shdma_dev(schan->dma_chan.device)->ops;
|
|
|
|
struct shdma_desc *sdesc;
|
|
|
|
|
|
|
|
spin_lock_irq(&schan->chan_lock);
|
|
|
|
list_for_each_entry(sdesc, &schan->ld_queue, node) {
|
|
|
|
if (sdesc->mark == DESC_SUBMITTED &&
|
|
|
|
ops->desc_completed(schan, sdesc)) {
|
|
|
|
dev_dbg(schan->dev, "done #%d@%p\n",
|
|
|
|
sdesc->async_tx.cookie, &sdesc->async_tx);
|
|
|
|
sdesc->mark = DESC_COMPLETED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* Next desc */
|
|
|
|
shdma_chan_xfer_ld_queue(schan);
|
|
|
|
spin_unlock_irq(&schan->chan_lock);
|
|
|
|
|
|
|
|
shdma_chan_ld_cleanup(schan, false);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
int shdma_request_irq(struct shdma_chan *schan, int irq,
|
|
|
|
unsigned long flags, const char *name)
|
|
|
|
{
|
|
|
|
int ret = request_threaded_irq(irq, chan_irq, chan_irqt,
|
|
|
|
flags, name, schan);
|
|
|
|
|
|
|
|
schan->irq = ret < 0 ? ret : irq;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(shdma_request_irq);
|
|
|
|
|
|
|
|
void shdma_free_irq(struct shdma_chan *schan)
|
|
|
|
{
|
|
|
|
if (schan->irq >= 0)
|
|
|
|
free_irq(schan->irq, schan);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(shdma_free_irq);
|
|
|
|
|
|
|
|
void shdma_chan_probe(struct shdma_dev *sdev,
|
|
|
|
struct shdma_chan *schan, int id)
|
|
|
|
{
|
|
|
|
schan->pm_state = SHDMA_PM_ESTABLISHED;
|
|
|
|
|
|
|
|
/* reference struct dma_device */
|
|
|
|
schan->dma_chan.device = &sdev->dma_dev;
|
|
|
|
dma_cookie_init(&schan->dma_chan);
|
|
|
|
|
|
|
|
schan->dev = sdev->dma_dev.dev;
|
|
|
|
schan->id = id;
|
|
|
|
|
|
|
|
if (!schan->max_xfer_len)
|
|
|
|
schan->max_xfer_len = PAGE_SIZE;
|
|
|
|
|
|
|
|
spin_lock_init(&schan->chan_lock);
|
|
|
|
|
|
|
|
/* Init descripter manage list */
|
|
|
|
INIT_LIST_HEAD(&schan->ld_queue);
|
|
|
|
INIT_LIST_HEAD(&schan->ld_free);
|
|
|
|
|
|
|
|
/* Add the channel to DMA device channel list */
|
|
|
|
list_add_tail(&schan->dma_chan.device_node,
|
|
|
|
&sdev->dma_dev.channels);
|
|
|
|
sdev->schan[sdev->dma_dev.chancnt++] = schan;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(shdma_chan_probe);
|
|
|
|
|
|
|
|
void shdma_chan_remove(struct shdma_chan *schan)
|
|
|
|
{
|
|
|
|
list_del(&schan->dma_chan.device_node);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(shdma_chan_remove);
|
|
|
|
|
|
|
|
int shdma_init(struct device *dev, struct shdma_dev *sdev,
|
|
|
|
int chan_num)
|
|
|
|
{
|
|
|
|
struct dma_device *dma_dev = &sdev->dma_dev;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Require all call-backs for now, they can trivially be made optional
|
|
|
|
* later as required
|
|
|
|
*/
|
|
|
|
if (!sdev->ops ||
|
|
|
|
!sdev->desc_size ||
|
|
|
|
!sdev->ops->embedded_desc ||
|
|
|
|
!sdev->ops->start_xfer ||
|
|
|
|
!sdev->ops->setup_xfer ||
|
|
|
|
!sdev->ops->set_slave ||
|
|
|
|
!sdev->ops->desc_setup ||
|
|
|
|
!sdev->ops->slave_addr ||
|
|
|
|
!sdev->ops->channel_busy ||
|
|
|
|
!sdev->ops->halt_channel ||
|
|
|
|
!sdev->ops->desc_completed)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
sdev->schan = kcalloc(chan_num, sizeof(*sdev->schan), GFP_KERNEL);
|
|
|
|
if (!sdev->schan)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
INIT_LIST_HEAD(&dma_dev->channels);
|
|
|
|
|
|
|
|
/* Common and MEMCPY operations */
|
|
|
|
dma_dev->device_alloc_chan_resources
|
|
|
|
= shdma_alloc_chan_resources;
|
|
|
|
dma_dev->device_free_chan_resources = shdma_free_chan_resources;
|
|
|
|
dma_dev->device_prep_dma_memcpy = shdma_prep_memcpy;
|
|
|
|
dma_dev->device_tx_status = shdma_tx_status;
|
|
|
|
dma_dev->device_issue_pending = shdma_issue_pending;
|
|
|
|
|
|
|
|
/* Compulsory for DMA_SLAVE fields */
|
|
|
|
dma_dev->device_prep_slave_sg = shdma_prep_slave_sg;
|
|
|
|
dma_dev->device_control = shdma_control;
|
|
|
|
|
|
|
|
dma_dev->dev = dev;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(shdma_init);
|
|
|
|
|
|
|
|
void shdma_cleanup(struct shdma_dev *sdev)
|
|
|
|
{
|
|
|
|
kfree(sdev->schan);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(shdma_cleanup);
|
|
|
|
|
|
|
|
static int __init shdma_enter(void)
|
|
|
|
{
|
|
|
|
shdma_slave_used = kzalloc(DIV_ROUND_UP(slave_num, BITS_PER_LONG) *
|
|
|
|
sizeof(long), GFP_KERNEL);
|
|
|
|
if (!shdma_slave_used)
|
|
|
|
return -ENOMEM;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
module_init(shdma_enter);
|
|
|
|
|
|
|
|
static void __exit shdma_exit(void)
|
|
|
|
{
|
|
|
|
kfree(shdma_slave_used);
|
|
|
|
}
|
|
|
|
module_exit(shdma_exit);
|
|
|
|
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
MODULE_DESCRIPTION("SH-DMA driver base library");
|
|
|
|
MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
|