2008-10-21 21:06:40 +08:00
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/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C6400 - DMA support
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*/
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#ifndef __ASM_ARCH_DMA_H
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#define __ASM_ARCH_DMA_H __FILE__
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2013-10-17 03:10:54 +08:00
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#define S3C64XX_DMA_CHAN(name) ((unsigned long)(name))
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/* DMA0/SDMA0 */
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2015-11-18 22:25:23 +08:00
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#define DMACH_UART0 "uart0_tx"
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#define DMACH_UART0_SRC2 "uart0_rx"
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#define DMACH_UART1 "uart1_tx"
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#define DMACH_UART1_SRC2 "uart1_rx"
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#define DMACH_UART2 "uart2_tx"
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#define DMACH_UART2_SRC2 "uart2_rx"
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#define DMACH_UART3 "uart3_tx"
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#define DMACH_UART3_SRC2 "uart3_rx"
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#define DMACH_PCM0_TX "pcm0_tx"
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#define DMACH_PCM0_RX "pcm0_rx"
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#define DMACH_I2S0_OUT "i2s0_tx"
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#define DMACH_I2S0_IN "i2s0_rx"
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2013-10-17 03:10:54 +08:00
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#define DMACH_SPI0_TX S3C64XX_DMA_CHAN("spi0_tx")
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#define DMACH_SPI0_RX S3C64XX_DMA_CHAN("spi0_rx")
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2015-11-18 22:25:23 +08:00
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#define DMACH_HSI_I2SV40_TX "i2s2_tx"
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#define DMACH_HSI_I2SV40_RX "i2s2_rx"
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2013-10-17 03:10:54 +08:00
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/* DMA1/SDMA1 */
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2015-11-18 22:25:23 +08:00
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#define DMACH_PCM1_TX "pcm1_tx"
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#define DMACH_PCM1_RX "pcm1_rx"
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#define DMACH_I2S1_OUT "i2s1_tx"
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#define DMACH_I2S1_IN "i2s1_rx"
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2013-10-17 03:10:54 +08:00
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#define DMACH_SPI1_TX S3C64XX_DMA_CHAN("spi1_tx")
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#define DMACH_SPI1_RX S3C64XX_DMA_CHAN("spi1_rx")
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2015-11-18 22:25:23 +08:00
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#define DMACH_AC97_PCMOUT "ac97_out"
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#define DMACH_AC97_PCMIN "ac97_in"
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#define DMACH_AC97_MICIN "ac97_mic"
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#define DMACH_PWM "pwm"
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#define DMACH_IRDA "irda"
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#define DMACH_EXTERNAL "external"
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#define DMACH_SECURITY_RX "sec_rx"
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#define DMACH_SECURITY_TX "sec_tx"
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2013-10-17 03:10:54 +08:00
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enum dma_ch {
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DMACH_MAX = 32
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};
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#include <linux/amba/pl08x.h>
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2008-10-21 21:06:40 +08:00
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#endif /* __ASM_ARCH_IRQ_H */
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