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linux/arch/x86/include/asm/pmc_atom.h

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x86/platform: New Intel Atom SOC power management controller driver The Power Management Controller (PMC) controls many of the power management features present in the Atom SoC. This driver provides a native power off function via PMC PCI IO port. On some ACPI hardware-reduced platforms(e.g. ASUS-T100), ACPI sleep registers are not valid so that (*pm_power_off)() is not hooked by acpi_power_off(). The power off function in this driver is installed only when pm_power_off is NULL. Signed-off-by: Aubrey Li <aubrey.li@linux.intel.com> Link: http://lkml.kernel.org/r/53B0FEEA.3010805@linux.intel.com Signed-off-by: Lejun Zhu <lejun.zhu@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-06-30 14:08:42 +08:00
/*
* Intel Atom SOC Power Management Controller Header File
* Copyright (c) 2014, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#ifndef PMC_ATOM_H
#define PMC_ATOM_H
/* ValleyView Power Control Unit PCI Device ID */
#define PCI_DEVICE_ID_VLV_PMC 0x0F1C
x86/pmc_atom: Eisable a few S0ix wake up events for S0ix residency Disable PMC S0IX_WAKE_EN events coming from LPC block(unused) and also from GPIO_SUS ored dedicated IRQs (must be disabled as per PMC programming rule), GPIOSCORE ored dedicated IRQs (must be disabled as per PMC programming rule), GPIO_SUS shared IRQ (not necessary since the IOAPIC_DS wake event will still work), GPIO_SCORE shared IRQ (not necessary since the IOAPIC_DS wake event will still work). Signed-off-by: Aubrey Li <aubrey.li@linux.intel.com> Link: http://lkml.kernel.org/r/53B0FF22.5080403@linux.intel.com Signed-off-by: Olivier Leveque <olivier.leveque@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-06-30 14:09:38 +08:00
/* PMC Memory mapped IO registers */
#define PMC_BASE_ADDR_OFFSET 0x44
#define PMC_BASE_ADDR_MASK 0xFFFFFE00
#define PMC_MMIO_REG_LEN 0x100
#define PMC_REG_BIT_WIDTH 32
/* S0ix wake event control */
#define PMC_S0IX_WAKE_EN 0x3C
#define BIT_LPC_CLOCK_RUN BIT(4)
#define BIT_SHARED_IRQ_GPSC BIT(5)
#define BIT_ORED_DEDICATED_IRQ_GPSS BIT(18)
#define BIT_ORED_DEDICATED_IRQ_GPSC BIT(19)
#define BIT_SHARED_IRQ_GPSS BIT(20)
#define PMC_WAKE_EN_SETTING ~(BIT_LPC_CLOCK_RUN | \
BIT_SHARED_IRQ_GPSC | \
BIT_ORED_DEDICATED_IRQ_GPSS | \
BIT_ORED_DEDICATED_IRQ_GPSC | \
BIT_SHARED_IRQ_GPSS)
x86/platform: New Intel Atom SOC power management controller driver The Power Management Controller (PMC) controls many of the power management features present in the Atom SoC. This driver provides a native power off function via PMC PCI IO port. On some ACPI hardware-reduced platforms(e.g. ASUS-T100), ACPI sleep registers are not valid so that (*pm_power_off)() is not hooked by acpi_power_off(). The power off function in this driver is installed only when pm_power_off is NULL. Signed-off-by: Aubrey Li <aubrey.li@linux.intel.com> Link: http://lkml.kernel.org/r/53B0FEEA.3010805@linux.intel.com Signed-off-by: Lejun Zhu <lejun.zhu@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-06-30 14:08:42 +08:00
/* PMC I/O Registers */
#define ACPI_BASE_ADDR_OFFSET 0x40
#define ACPI_BASE_ADDR_MASK 0xFFFFFE00
#define ACPI_MMIO_REG_LEN 0x100
#define PM1_CNT 0x4
#define SLEEP_TYPE_MASK 0xFFFFECFF
#define SLEEP_TYPE_S5 0x1C00
#define SLEEP_ENABLE 0x2000
#endif /* PMC_ATOM_H */