2006-01-17 14:14:17 +08:00
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/*
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* arch/sh/kernel/cpu/clock.c - SuperH clock framework
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*
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2009-05-12 03:27:43 +08:00
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* Copyright (C) 2005 - 2009 Paul Mundt
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2006-01-17 14:14:17 +08:00
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*
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* This clock framework is derived from the OMAP version by:
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*
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2009-05-12 03:27:43 +08:00
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* Copyright (C) 2004 - 2008 Nokia Corporation
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2006-01-17 14:14:17 +08:00
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* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
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*
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2006-12-01 12:15:14 +08:00
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* Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
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*
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2006-01-17 14:14:17 +08:00
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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2006-09-27 16:28:20 +08:00
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#include <linux/mutex.h>
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2006-01-17 14:14:17 +08:00
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#include <linux/list.h>
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2009-03-11 15:42:05 +08:00
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#include <linux/kobject.h>
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#include <linux/sysdev.h>
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2006-01-17 14:14:17 +08:00
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#include <linux/seq_file.h>
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#include <linux/err.h>
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2006-12-01 12:15:14 +08:00
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#include <linux/platform_device.h>
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2007-04-26 11:17:20 +08:00
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#include <linux/proc_fs.h>
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2006-01-17 14:14:17 +08:00
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#include <asm/clock.h>
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#include <asm/timer.h>
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static LIST_HEAD(clock_list);
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static DEFINE_SPINLOCK(clock_lock);
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2006-09-27 16:28:20 +08:00
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static DEFINE_MUTEX(clock_list_sem);
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2006-01-17 14:14:17 +08:00
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/*
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* Each subtype is expected to define the init routines for these clocks,
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* as each subtype (or processor family) will have these clocks at the
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* very least. These are all provided through the CPG, which even some of
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* the more quirky parts (such as ST40, SH4-202, etc.) still have.
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*
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* The processor-specific code is expected to register any additional
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* clock sources that are of interest.
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*/
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static struct clk master_clk = {
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.name = "master_clk",
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2009-05-12 03:27:43 +08:00
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.flags = CLK_ALWAYS_ENABLED,
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2006-01-17 14:14:17 +08:00
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.rate = CONFIG_SH_PCLK_FREQ,
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};
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static struct clk module_clk = {
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.name = "module_clk",
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.parent = &master_clk,
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2009-05-12 03:27:43 +08:00
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.flags = CLK_ALWAYS_ENABLED,
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2006-01-17 14:14:17 +08:00
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};
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static struct clk bus_clk = {
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.name = "bus_clk",
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.parent = &master_clk,
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2009-05-12 03:27:43 +08:00
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.flags = CLK_ALWAYS_ENABLED,
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2006-01-17 14:14:17 +08:00
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};
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static struct clk cpu_clk = {
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.name = "cpu_clk",
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.parent = &master_clk,
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.flags = CLK_ALWAYS_ENABLED,
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};
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/*
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* The ordering of these clocks matters, do not change it.
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*/
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static struct clk *onchip_clocks[] = {
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&master_clk,
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&module_clk,
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&bus_clk,
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&cpu_clk,
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};
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2009-05-12 03:27:43 +08:00
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/* Used for clocks that always have same value as the parent clock */
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unsigned long followparent_recalc(struct clk *clk)
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{
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return clk->parent->rate;
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}
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2009-05-12 02:45:08 +08:00
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/* Propagate rate to children */
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2009-05-12 03:27:43 +08:00
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void propagate_rate(struct clk *tclk)
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2006-01-17 14:14:17 +08:00
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{
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struct clk *clkp;
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2009-05-12 03:27:43 +08:00
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list_for_each_entry(clkp, &tclk->children, sibling) {
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if (clkp->ops->recalc)
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2009-05-12 02:45:08 +08:00
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clkp->rate = clkp->ops->recalc(clkp);
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2009-05-12 03:27:43 +08:00
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propagate_rate(clkp);
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2006-01-17 14:14:17 +08:00
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}
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}
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2009-05-08 16:23:29 +08:00
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static void __clk_init(struct clk *clk)
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2006-01-17 14:14:17 +08:00
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{
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/*
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* See if this is the first time we're enabling the clock, some
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* clocks that are always enabled still require "special"
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* initialization. This is especially true if the clock mode
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* changes and the clock needs to hunt for the proper set of
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* divisors to use before it can effectively recalc.
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*/
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2009-05-07 18:31:39 +08:00
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2009-05-08 16:23:29 +08:00
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if (clk->flags & CLK_NEEDS_INIT) {
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2006-01-17 14:14:17 +08:00
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if (clk->ops && clk->ops->init)
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clk->ops->init(clk);
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2009-05-08 16:23:29 +08:00
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clk->flags &= ~CLK_NEEDS_INIT;
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}
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}
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static int __clk_enable(struct clk *clk)
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{
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if (!clk)
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return -EINVAL;
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clk->usecount++;
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/* nothing to do if always enabled */
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if (clk->flags & CLK_ALWAYS_ENABLED)
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return 0;
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if (clk->usecount == 1) {
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__clk_init(clk);
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2007-04-24 12:39:09 +08:00
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2009-05-08 16:23:29 +08:00
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__clk_enable(clk->parent);
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if (clk->ops && clk->ops->enable)
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clk->ops->enable(clk);
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}
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2006-01-17 14:14:17 +08:00
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return 0;
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}
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&clock_lock, flags);
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ret = __clk_enable(clk);
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spin_unlock_irqrestore(&clock_lock, flags);
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return ret;
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}
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2007-04-26 11:17:20 +08:00
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EXPORT_SYMBOL_GPL(clk_enable);
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2006-01-17 14:14:17 +08:00
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2008-06-18 08:36:50 +08:00
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static void __clk_disable(struct clk *clk)
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2006-01-17 14:14:17 +08:00
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{
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2009-05-08 16:23:29 +08:00
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if (!clk)
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return;
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clk->usecount--;
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WARN_ON(clk->usecount < 0);
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2007-04-24 12:39:09 +08:00
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2006-01-17 14:14:17 +08:00
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if (clk->flags & CLK_ALWAYS_ENABLED)
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return;
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2009-05-08 16:23:29 +08:00
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if (clk->usecount == 0) {
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2007-04-24 12:39:09 +08:00
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if (likely(clk->ops && clk->ops->disable))
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clk->ops->disable(clk);
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2009-05-08 16:23:29 +08:00
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__clk_disable(clk->parent);
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2007-04-24 12:39:09 +08:00
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}
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2006-01-17 14:14:17 +08:00
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}
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clock_lock, flags);
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__clk_disable(clk);
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spin_unlock_irqrestore(&clock_lock, flags);
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}
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2007-04-26 11:17:20 +08:00
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EXPORT_SYMBOL_GPL(clk_disable);
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2006-01-17 14:14:17 +08:00
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2009-05-12 03:27:43 +08:00
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static LIST_HEAD(root_clks);
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/**
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* recalculate_root_clocks - recalculate and propagate all root clocks
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*
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* Recalculates all root clocks (clocks with no parent), which if the
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* clock's .recalc is set correctly, should also propagate their rates.
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* Called at init.
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*/
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void recalculate_root_clocks(void)
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{
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struct clk *clkp;
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list_for_each_entry(clkp, &root_clks, sibling) {
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if (clkp->ops->recalc)
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clkp->rate = clkp->ops->recalc(clkp);
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propagate_rate(clkp);
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}
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}
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2006-01-17 14:14:17 +08:00
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int clk_register(struct clk *clk)
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{
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2009-05-12 03:27:43 +08:00
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if (clk == NULL || IS_ERR(clk))
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return -EINVAL;
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/*
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* trap out already registered clocks
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*/
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if (clk->node.next || clk->node.prev)
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return 0;
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2006-09-27 16:28:20 +08:00
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mutex_lock(&clock_list_sem);
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2006-01-17 14:14:17 +08:00
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2009-05-12 03:27:43 +08:00
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INIT_LIST_HEAD(&clk->children);
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if (clk->parent)
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list_add(&clk->sibling, &clk->parent->children);
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else
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list_add(&clk->sibling, &root_clks);
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2006-01-17 14:14:17 +08:00
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list_add(&clk->node, &clock_list);
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2009-05-08 16:23:29 +08:00
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clk->usecount = 0;
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clk->flags |= CLK_NEEDS_INIT;
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2006-01-17 14:14:17 +08:00
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2006-09-27 16:28:20 +08:00
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mutex_unlock(&clock_list_sem);
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2006-01-17 14:14:17 +08:00
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2007-04-24 12:39:09 +08:00
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if (clk->flags & CLK_ALWAYS_ENABLED) {
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2009-05-08 16:23:29 +08:00
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__clk_init(clk);
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2007-04-24 12:39:09 +08:00
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pr_debug( "Clock '%s' is ALWAYS_ENABLED\n", clk->name);
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if (clk->ops && clk->ops->enable)
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clk->ops->enable(clk);
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pr_debug( "Enabled.");
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}
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2006-01-17 14:14:17 +08:00
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return 0;
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}
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2007-04-26 11:17:20 +08:00
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EXPORT_SYMBOL_GPL(clk_register);
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2006-01-17 14:14:17 +08:00
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void clk_unregister(struct clk *clk)
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{
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2006-09-27 16:28:20 +08:00
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mutex_lock(&clock_list_sem);
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2009-05-12 03:27:43 +08:00
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list_del(&clk->sibling);
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2006-01-17 14:14:17 +08:00
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list_del(&clk->node);
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2006-09-27 16:28:20 +08:00
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mutex_unlock(&clock_list_sem);
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2006-01-17 14:14:17 +08:00
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}
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2007-04-26 11:17:20 +08:00
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EXPORT_SYMBOL_GPL(clk_unregister);
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2006-01-17 14:14:17 +08:00
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2007-04-26 11:17:20 +08:00
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unsigned long clk_get_rate(struct clk *clk)
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2006-01-17 14:14:17 +08:00
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{
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return clk->rate;
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}
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2007-04-26 11:17:20 +08:00
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EXPORT_SYMBOL_GPL(clk_get_rate);
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2006-01-17 14:14:17 +08:00
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int clk_set_rate(struct clk *clk, unsigned long rate)
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2007-04-24 12:39:09 +08:00
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{
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return clk_set_rate_ex(clk, rate, 0);
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}
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2007-04-26 11:17:20 +08:00
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EXPORT_SYMBOL_GPL(clk_set_rate);
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2007-04-24 12:39:09 +08:00
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int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
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2006-01-17 14:14:17 +08:00
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{
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int ret = -EOPNOTSUPP;
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if (likely(clk->ops && clk->ops->set_rate)) {
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unsigned long flags;
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spin_lock_irqsave(&clock_lock, flags);
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2007-04-24 12:39:09 +08:00
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ret = clk->ops->set_rate(clk, rate, algo_id);
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2009-05-12 03:27:43 +08:00
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if (ret == 0) {
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if (clk->ops->recalc)
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clk->rate = clk->ops->recalc(clk);
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propagate_rate(clk);
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}
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2006-01-17 14:14:17 +08:00
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spin_unlock_irqrestore(&clock_lock, flags);
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}
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return ret;
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}
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2007-04-26 11:17:20 +08:00
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EXPORT_SYMBOL_GPL(clk_set_rate_ex);
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2006-01-17 14:14:17 +08:00
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void clk_recalc_rate(struct clk *clk)
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{
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2009-05-12 03:27:43 +08:00
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unsigned long flags;
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2006-01-17 14:14:17 +08:00
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2009-05-12 03:27:43 +08:00
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if (!clk->ops->recalc)
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return;
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2006-01-17 14:14:17 +08:00
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2009-05-12 03:27:43 +08:00
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spin_lock_irqsave(&clock_lock, flags);
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clk->rate = clk->ops->recalc(clk);
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propagate_rate(clk);
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spin_unlock_irqrestore(&clock_lock, flags);
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2006-01-17 14:14:17 +08:00
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}
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2007-04-26 11:17:20 +08:00
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EXPORT_SYMBOL_GPL(clk_recalc_rate);
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2006-01-17 14:14:17 +08:00
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2009-03-11 15:40:54 +08:00
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int clk_set_parent(struct clk *clk, struct clk *parent)
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{
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2009-05-12 03:27:43 +08:00
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unsigned long flags;
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2009-03-11 15:40:54 +08:00
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int ret = -EINVAL;
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if (!parent || !clk)
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return ret;
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2009-05-12 03:27:43 +08:00
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spin_lock_irqsave(&clock_lock, flags);
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if (clk->usecount == 0) {
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if (clk->ops->set_parent)
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ret = clk->ops->set_parent(clk, parent);
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if (ret == 0) {
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if (clk->ops->recalc)
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clk->rate = clk->ops->recalc(clk);
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propagate_rate(clk);
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}
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} else
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ret = -EBUSY;
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spin_unlock_irqrestore(&clock_lock, flags);
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2009-03-11 15:40:54 +08:00
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return ret;
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}
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EXPORT_SYMBOL_GPL(clk_set_parent);
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struct clk *clk_get_parent(struct clk *clk)
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{
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return clk->parent;
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}
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|
|
EXPORT_SYMBOL_GPL(clk_get_parent);
|
|
|
|
|
2007-07-20 12:29:09 +08:00
|
|
|
long clk_round_rate(struct clk *clk, unsigned long rate)
|
|
|
|
{
|
|
|
|
if (likely(clk->ops && clk->ops->round_rate)) {
|
|
|
|
unsigned long flags, rounded;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&clock_lock, flags);
|
|
|
|
rounded = clk->ops->round_rate(clk, rate);
|
|
|
|
spin_unlock_irqrestore(&clock_lock, flags);
|
|
|
|
|
|
|
|
return rounded;
|
|
|
|
}
|
|
|
|
|
|
|
|
return clk_get_rate(clk);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(clk_round_rate);
|
|
|
|
|
2006-12-01 12:15:14 +08:00
|
|
|
/*
|
|
|
|
* Returns a clock. Note that we first try to use device id on the bus
|
|
|
|
* and clock name. If this fails, we try to use clock name only.
|
|
|
|
*/
|
|
|
|
struct clk *clk_get(struct device *dev, const char *id)
|
2006-01-17 14:14:17 +08:00
|
|
|
{
|
|
|
|
struct clk *p, *clk = ERR_PTR(-ENOENT);
|
2006-12-01 12:15:14 +08:00
|
|
|
int idno;
|
|
|
|
|
|
|
|
if (dev == NULL || dev->bus != &platform_bus_type)
|
|
|
|
idno = -1;
|
|
|
|
else
|
|
|
|
idno = to_platform_device(dev)->id;
|
2006-01-17 14:14:17 +08:00
|
|
|
|
2006-09-27 16:28:20 +08:00
|
|
|
mutex_lock(&clock_list_sem);
|
2006-12-01 12:15:14 +08:00
|
|
|
list_for_each_entry(p, &clock_list, node) {
|
|
|
|
if (p->id == idno &&
|
|
|
|
strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
|
|
|
|
clk = p;
|
|
|
|
goto found;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2006-01-17 14:14:17 +08:00
|
|
|
list_for_each_entry(p, &clock_list, node) {
|
|
|
|
if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
|
|
|
|
clk = p;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2006-12-01 12:15:14 +08:00
|
|
|
|
|
|
|
found:
|
2006-09-27 16:28:20 +08:00
|
|
|
mutex_unlock(&clock_list_sem);
|
2006-01-17 14:14:17 +08:00
|
|
|
|
|
|
|
return clk;
|
|
|
|
}
|
2007-04-26 11:17:20 +08:00
|
|
|
EXPORT_SYMBOL_GPL(clk_get);
|
2006-01-17 14:14:17 +08:00
|
|
|
|
|
|
|
void clk_put(struct clk *clk)
|
|
|
|
{
|
|
|
|
if (clk && !IS_ERR(clk))
|
|
|
|
module_put(clk->owner);
|
|
|
|
}
|
2007-04-26 11:17:20 +08:00
|
|
|
EXPORT_SYMBOL_GPL(clk_put);
|
2006-01-17 14:14:17 +08:00
|
|
|
|
|
|
|
void __init __attribute__ ((weak))
|
|
|
|
arch_init_clk_ops(struct clk_ops **ops, int type)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2008-09-04 17:53:58 +08:00
|
|
|
int __init __attribute__ ((weak))
|
2007-05-15 07:42:22 +08:00
|
|
|
arch_clk_init(void)
|
|
|
|
{
|
2008-09-04 17:53:58 +08:00
|
|
|
return 0;
|
2007-05-15 07:42:22 +08:00
|
|
|
}
|
|
|
|
|
2007-04-26 11:17:20 +08:00
|
|
|
static int show_clocks(char *buf, char **start, off_t off,
|
|
|
|
int len, int *eof, void *data)
|
|
|
|
{
|
|
|
|
struct clk *clk;
|
|
|
|
char *p = buf;
|
|
|
|
|
|
|
|
list_for_each_entry_reverse(clk, &clock_list, node) {
|
|
|
|
unsigned long rate = clk_get_rate(clk);
|
|
|
|
|
2008-07-17 18:05:54 +08:00
|
|
|
p += sprintf(p, "%-12s\t: %ld.%02ldMHz\t%s\n", clk->name,
|
|
|
|
rate / 1000000, (rate % 1000000) / 10000,
|
|
|
|
((clk->flags & CLK_ALWAYS_ENABLED) ||
|
2009-05-08 16:23:29 +08:00
|
|
|
clk->usecount > 0) ?
|
2008-07-17 18:05:54 +08:00
|
|
|
"enabled" : "disabled");
|
2007-04-26 11:17:20 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return p - buf;
|
|
|
|
}
|
|
|
|
|
2009-03-11 15:42:05 +08:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
|
|
|
|
{
|
|
|
|
static pm_message_t prev_state;
|
|
|
|
struct clk *clkp;
|
|
|
|
|
|
|
|
switch (state.event) {
|
|
|
|
case PM_EVENT_ON:
|
|
|
|
/* Resumeing from hibernation */
|
2009-05-12 02:45:08 +08:00
|
|
|
if (prev_state.event != PM_EVENT_FREEZE)
|
|
|
|
break;
|
|
|
|
|
|
|
|
list_for_each_entry(clkp, &clock_list, node) {
|
|
|
|
if (likely(clkp->ops)) {
|
|
|
|
unsigned long rate = clkp->rate;
|
|
|
|
|
|
|
|
if (likely(clkp->ops->set_parent))
|
|
|
|
clkp->ops->set_parent(clkp,
|
|
|
|
clkp->parent);
|
|
|
|
if (likely(clkp->ops->set_rate))
|
|
|
|
clkp->ops->set_rate(clkp,
|
|
|
|
rate, NO_CHANGE);
|
|
|
|
else if (likely(clkp->ops->recalc))
|
|
|
|
clkp->rate = clkp->ops->recalc(clkp);
|
|
|
|
}
|
2009-03-11 15:42:05 +08:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case PM_EVENT_FREEZE:
|
|
|
|
break;
|
|
|
|
case PM_EVENT_SUSPEND:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
prev_state = state;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int clks_sysdev_resume(struct sys_device *dev)
|
|
|
|
{
|
|
|
|
return clks_sysdev_suspend(dev, PMSG_ON);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct sysdev_class clks_sysdev_class = {
|
|
|
|
.name = "clks",
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct sysdev_driver clks_sysdev_driver = {
|
|
|
|
.suspend = clks_sysdev_suspend,
|
|
|
|
.resume = clks_sysdev_resume,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct sys_device clks_sysdev_dev = {
|
|
|
|
.cls = &clks_sysdev_class,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init clk_sysdev_init(void)
|
|
|
|
{
|
|
|
|
sysdev_class_register(&clks_sysdev_class);
|
|
|
|
sysdev_driver_register(&clks_sysdev_class, &clks_sysdev_driver);
|
|
|
|
sysdev_register(&clks_sysdev_dev);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
subsys_initcall(clk_sysdev_init);
|
|
|
|
#endif
|
|
|
|
|
2006-01-17 14:14:17 +08:00
|
|
|
int __init clk_init(void)
|
|
|
|
{
|
|
|
|
int i, ret = 0;
|
|
|
|
|
2006-09-27 11:31:01 +08:00
|
|
|
BUG_ON(!master_clk.rate);
|
2006-01-17 14:14:17 +08:00
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
|
|
|
|
struct clk *clk = onchip_clocks[i];
|
|
|
|
|
|
|
|
arch_init_clk_ops(&clk->ops, i);
|
|
|
|
ret |= clk_register(clk);
|
|
|
|
}
|
|
|
|
|
2008-09-04 17:53:58 +08:00
|
|
|
ret |= arch_clk_init();
|
2007-05-15 07:42:22 +08:00
|
|
|
|
2006-01-17 14:14:17 +08:00
|
|
|
/* Kick the child clocks.. */
|
2009-05-12 03:27:43 +08:00
|
|
|
recalculate_root_clocks();
|
2006-01-17 14:14:17 +08:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2007-04-26 11:17:20 +08:00
|
|
|
static int __init clk_proc_init(void)
|
2006-01-17 14:14:17 +08:00
|
|
|
{
|
2007-04-26 11:17:20 +08:00
|
|
|
struct proc_dir_entry *p;
|
|
|
|
p = create_proc_read_entry("clocks", S_IRUSR, NULL,
|
|
|
|
show_clocks, NULL);
|
|
|
|
if (unlikely(!p))
|
|
|
|
return -EINVAL;
|
2006-01-17 14:14:17 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2007-04-26 11:17:20 +08:00
|
|
|
subsys_initcall(clk_proc_init);
|