2014-11-04 02:07:36 +08:00
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/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
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2016-02-18 08:52:03 +08:00
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*
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* Description: CoreSight Trace Memory Controller driver
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2014-11-04 02:07:36 +08:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/uaccess.h>
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#include <linux/slab.h>
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#include <linux/dma-mapping.h>
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#include <linux/spinlock.h>
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2015-05-20 00:55:13 +08:00
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#include <linux/pm_runtime.h>
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2014-11-04 02:07:36 +08:00
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#include <linux/of.h>
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#include <linux/coresight.h>
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#include <linux/amba/bus.h>
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#include "coresight-priv.h"
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2016-05-04 01:33:48 +08:00
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#include "coresight-tmc.h"
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2014-11-04 02:07:36 +08:00
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2016-05-04 01:33:50 +08:00
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void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata)
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2014-11-04 02:07:36 +08:00
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{
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/* Ensure formatter, unformatter and hardware fifo are empty */
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if (coresight_timeout(drvdata->base,
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2016-05-04 01:33:44 +08:00
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TMC_STS, TMC_STS_TMCREADY_BIT, 1)) {
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2014-11-04 02:07:36 +08:00
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dev_err(drvdata->dev,
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"timeout observed when probing at offset %#x\n",
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TMC_STS);
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}
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}
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2016-05-04 01:33:50 +08:00
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void tmc_flush_and_stop(struct tmc_drvdata *drvdata)
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2014-11-04 02:07:36 +08:00
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{
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u32 ffcr;
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ffcr = readl_relaxed(drvdata->base + TMC_FFCR);
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ffcr |= TMC_FFCR_STOP_ON_FLUSH;
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writel_relaxed(ffcr, drvdata->base + TMC_FFCR);
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2016-05-04 01:33:49 +08:00
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ffcr |= BIT(TMC_FFCR_FLUSHMAN_BIT);
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2014-11-04 02:07:36 +08:00
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writel_relaxed(ffcr, drvdata->base + TMC_FFCR);
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/* Ensure flush completes */
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if (coresight_timeout(drvdata->base,
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TMC_FFCR, TMC_FFCR_FLUSHMAN_BIT, 0)) {
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dev_err(drvdata->dev,
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"timeout observed when probing at offset %#x\n",
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TMC_FFCR);
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}
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2016-05-04 01:33:44 +08:00
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tmc_wait_for_tmcready(drvdata);
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2014-11-04 02:07:36 +08:00
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}
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2016-05-04 01:33:50 +08:00
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void tmc_enable_hw(struct tmc_drvdata *drvdata)
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2014-11-04 02:07:36 +08:00
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{
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writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL);
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}
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2016-05-04 01:33:50 +08:00
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void tmc_disable_hw(struct tmc_drvdata *drvdata)
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2014-11-04 02:07:36 +08:00
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{
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writel_relaxed(0x0, drvdata->base + TMC_CTL);
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}
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static int tmc_read_prepare(struct tmc_drvdata *drvdata)
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{
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2016-05-04 01:33:46 +08:00
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int ret = 0;
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2014-11-04 02:07:36 +08:00
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2016-05-04 01:33:46 +08:00
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switch (drvdata->config_type) {
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case TMC_CONFIG_TYPE_ETB:
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case TMC_CONFIG_TYPE_ETF:
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2016-05-04 01:33:51 +08:00
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ret = tmc_read_prepare_etb(drvdata);
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2016-05-04 01:33:46 +08:00
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break;
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case TMC_CONFIG_TYPE_ETR:
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2016-05-04 01:33:51 +08:00
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ret = tmc_read_prepare_etr(drvdata);
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2016-05-04 01:33:46 +08:00
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break;
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default:
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ret = -EINVAL;
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2014-11-04 02:07:36 +08:00
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}
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2016-05-04 01:33:46 +08:00
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2016-05-04 01:33:51 +08:00
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if (!ret)
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dev_info(drvdata->dev, "TMC read start\n");
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2014-11-04 02:07:36 +08:00
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return ret;
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}
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2016-05-04 01:33:53 +08:00
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static int tmc_read_unprepare(struct tmc_drvdata *drvdata)
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2014-11-04 02:07:36 +08:00
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{
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2016-05-04 01:33:51 +08:00
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int ret = 0;
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2014-11-04 02:07:36 +08:00
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2016-05-04 01:33:46 +08:00
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switch (drvdata->config_type) {
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case TMC_CONFIG_TYPE_ETB:
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case TMC_CONFIG_TYPE_ETF:
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2016-05-04 01:33:51 +08:00
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ret = tmc_read_unprepare_etb(drvdata);
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2016-05-04 01:33:46 +08:00
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break;
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case TMC_CONFIG_TYPE_ETR:
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2016-05-04 01:33:51 +08:00
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ret = tmc_read_unprepare_etr(drvdata);
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2016-05-04 01:33:46 +08:00
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break;
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default:
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2016-05-04 01:33:51 +08:00
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ret = -EINVAL;
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2014-11-04 02:07:36 +08:00
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}
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2016-05-04 01:33:46 +08:00
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2016-05-04 01:33:51 +08:00
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if (!ret)
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dev_info(drvdata->dev, "TMC read end\n");
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2016-05-04 01:33:53 +08:00
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return ret;
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2014-11-04 02:07:36 +08:00
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}
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static int tmc_open(struct inode *inode, struct file *file)
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{
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2016-05-04 01:33:53 +08:00
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int ret;
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2014-11-04 02:07:36 +08:00
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struct tmc_drvdata *drvdata = container_of(file->private_data,
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struct tmc_drvdata, miscdev);
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ret = tmc_read_prepare(drvdata);
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if (ret)
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return ret;
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2016-05-04 01:33:53 +08:00
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2014-11-04 02:07:36 +08:00
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nonseekable_open(inode, file);
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dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__);
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return 0;
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}
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static ssize_t tmc_read(struct file *file, char __user *data, size_t len,
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loff_t *ppos)
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{
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struct tmc_drvdata *drvdata = container_of(file->private_data,
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struct tmc_drvdata, miscdev);
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char *bufp = drvdata->buf + *ppos;
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if (*ppos + len > drvdata->size)
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len = drvdata->size - *ppos;
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if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
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if (bufp == (char *)(drvdata->vaddr + drvdata->size))
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bufp = drvdata->vaddr;
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else if (bufp > (char *)(drvdata->vaddr + drvdata->size))
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bufp -= drvdata->size;
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if ((bufp + len) > (char *)(drvdata->vaddr + drvdata->size))
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len = (char *)(drvdata->vaddr + drvdata->size) - bufp;
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}
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if (copy_to_user(data, bufp, len)) {
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dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__);
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return -EFAULT;
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}
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*ppos += len;
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2015-03-31 04:13:35 +08:00
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dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
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__func__, len, (int)(drvdata->size - *ppos));
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2014-11-04 02:07:36 +08:00
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return len;
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}
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static int tmc_release(struct inode *inode, struct file *file)
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{
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2016-05-04 01:33:53 +08:00
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int ret;
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2014-11-04 02:07:36 +08:00
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struct tmc_drvdata *drvdata = container_of(file->private_data,
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struct tmc_drvdata, miscdev);
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2016-05-04 01:33:53 +08:00
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ret = tmc_read_unprepare(drvdata);
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if (ret)
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return ret;
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2014-11-04 02:07:36 +08:00
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dev_dbg(drvdata->dev, "%s: released\n", __func__);
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return 0;
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}
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static const struct file_operations tmc_fops = {
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.owner = THIS_MODULE,
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.open = tmc_open,
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.read = tmc_read,
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.release = tmc_release,
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.llseek = no_llseek,
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};
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2016-05-04 01:33:43 +08:00
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#define coresight_tmc_simple_func(name, offset) \
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coresight_simple_func(struct tmc_drvdata, name, offset)
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coresight_tmc_simple_func(rsz, TMC_RSZ);
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coresight_tmc_simple_func(sts, TMC_STS);
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coresight_tmc_simple_func(rrp, TMC_RRP);
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coresight_tmc_simple_func(rwp, TMC_RWP);
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coresight_tmc_simple_func(trg, TMC_TRG);
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coresight_tmc_simple_func(ctl, TMC_CTL);
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coresight_tmc_simple_func(ffsr, TMC_FFSR);
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coresight_tmc_simple_func(ffcr, TMC_FFCR);
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coresight_tmc_simple_func(mode, TMC_MODE);
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coresight_tmc_simple_func(pscr, TMC_PSCR);
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coresight_tmc_simple_func(devid, CORESIGHT_DEVID);
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static struct attribute *coresight_tmc_mgmt_attrs[] = {
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&dev_attr_rsz.attr,
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&dev_attr_sts.attr,
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&dev_attr_rrp.attr,
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&dev_attr_rwp.attr,
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&dev_attr_trg.attr,
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&dev_attr_ctl.attr,
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&dev_attr_ffsr.attr,
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&dev_attr_ffcr.attr,
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&dev_attr_mode.attr,
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&dev_attr_pscr.attr,
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&dev_attr_devid.attr,
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NULL,
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};
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2015-03-31 04:13:40 +08:00
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2016-05-04 01:33:43 +08:00
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ssize_t trigger_cntr_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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2014-11-04 02:07:36 +08:00
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{
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struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
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unsigned long val = drvdata->trigger_cntr;
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return sprintf(buf, "%#lx\n", val);
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}
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static ssize_t trigger_cntr_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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{
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int ret;
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unsigned long val;
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struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
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ret = kstrtoul(buf, 16, &val);
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if (ret)
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return ret;
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drvdata->trigger_cntr = val;
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return size;
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}
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static DEVICE_ATTR_RW(trigger_cntr);
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2016-05-04 01:33:43 +08:00
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static struct attribute *coresight_tmc_attrs[] = {
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2014-11-04 02:07:36 +08:00
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&dev_attr_trigger_cntr.attr,
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NULL,
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};
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2016-05-04 01:33:43 +08:00
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static const struct attribute_group coresight_tmc_group = {
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.attrs = coresight_tmc_attrs,
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2014-11-04 02:07:36 +08:00
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};
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2016-05-04 01:33:43 +08:00
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static const struct attribute_group coresight_tmc_mgmt_group = {
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.attrs = coresight_tmc_mgmt_attrs,
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.name = "mgmt",
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};
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const struct attribute_group *coresight_tmc_groups[] = {
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&coresight_tmc_group,
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&coresight_tmc_mgmt_group,
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2014-11-04 02:07:36 +08:00
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NULL,
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};
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static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
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{
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int ret = 0;
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u32 devid;
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void __iomem *base;
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struct device *dev = &adev->dev;
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struct coresight_platform_data *pdata = NULL;
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struct tmc_drvdata *drvdata;
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struct resource *res = &adev->res;
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struct coresight_desc *desc;
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struct device_node *np = adev->dev.of_node;
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if (np) {
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pdata = of_get_coresight_platform_data(dev, np);
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if (IS_ERR(pdata))
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return PTR_ERR(pdata);
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adev->dev.platform_data = pdata;
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}
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drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
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if (!drvdata)
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return -ENOMEM;
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drvdata->dev = &adev->dev;
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dev_set_drvdata(dev, drvdata);
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/* Validity for the resource is already checked by the AMBA core */
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base = devm_ioremap_resource(dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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drvdata->base = base;
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spin_lock_init(&drvdata->spinlock);
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devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
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drvdata->config_type = BMVAL(devid, 6, 7);
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if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
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if (np)
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ret = of_property_read_u32(np,
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"arm,buffer-size",
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&drvdata->size);
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if (ret)
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drvdata->size = SZ_1M;
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} else {
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drvdata->size = readl_relaxed(drvdata->base + TMC_RSZ) * 4;
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}
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2015-05-20 00:55:13 +08:00
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pm_runtime_put(&adev->dev);
|
2014-11-04 02:07:36 +08:00
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desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
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if (!desc) {
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ret = -ENOMEM;
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goto err_devm_kzalloc;
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}
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|
|
|
|
desc->pdata = pdata;
|
|
|
|
desc->dev = dev;
|
|
|
|
desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
|
2016-05-04 01:33:43 +08:00
|
|
|
desc->groups = coresight_tmc_groups;
|
2014-11-04 02:07:36 +08:00
|
|
|
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
|
|
|
|
desc->type = CORESIGHT_DEV_TYPE_SINK;
|
|
|
|
desc->ops = &tmc_etb_cs_ops;
|
|
|
|
} else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
|
|
|
|
desc->type = CORESIGHT_DEV_TYPE_SINK;
|
|
|
|
desc->ops = &tmc_etr_cs_ops;
|
|
|
|
} else {
|
|
|
|
desc->type = CORESIGHT_DEV_TYPE_LINKSINK;
|
|
|
|
desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO;
|
|
|
|
desc->ops = &tmc_etf_cs_ops;
|
|
|
|
}
|
|
|
|
|
|
|
|
drvdata->csdev = coresight_register(desc);
|
|
|
|
if (IS_ERR(drvdata->csdev)) {
|
|
|
|
ret = PTR_ERR(drvdata->csdev);
|
|
|
|
goto err_devm_kzalloc;
|
|
|
|
}
|
|
|
|
|
|
|
|
drvdata->miscdev.name = pdata->name;
|
|
|
|
drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
|
|
|
|
drvdata->miscdev.fops = &tmc_fops;
|
|
|
|
ret = misc_register(&drvdata->miscdev);
|
|
|
|
if (ret)
|
|
|
|
goto err_misc_register;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_misc_register:
|
|
|
|
coresight_unregister(drvdata->csdev);
|
|
|
|
err_devm_kzalloc:
|
|
|
|
if (drvdata->config_type == TMC_CONFIG_TYPE_ETR)
|
|
|
|
dma_free_coherent(dev, drvdata->size,
|
2016-02-18 08:51:44 +08:00
|
|
|
drvdata->vaddr, drvdata->paddr);
|
2014-11-04 02:07:36 +08:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct amba_id tmc_ids[] = {
|
|
|
|
{
|
|
|
|
.id = 0x0003b961,
|
|
|
|
.mask = 0x0003ffff,
|
|
|
|
},
|
|
|
|
{ 0, 0},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct amba_driver tmc_driver = {
|
|
|
|
.drv = {
|
|
|
|
.name = "coresight-tmc",
|
|
|
|
.owner = THIS_MODULE,
|
2016-02-03 05:14:00 +08:00
|
|
|
.suppress_bind_attrs = true,
|
2014-11-04 02:07:36 +08:00
|
|
|
},
|
|
|
|
.probe = tmc_probe,
|
|
|
|
.id_table = tmc_ids,
|
|
|
|
};
|
2016-02-18 08:52:03 +08:00
|
|
|
builtin_amba_driver(tmc_driver);
|