2012-03-17 03:41:22 +08:00
|
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|
/*
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|
* Gmux driver for Apple laptops
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|
*
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* Copyright (C) Canonical Ltd. <seth.forshee@canonical.com>
|
2012-08-18 00:17:04 +08:00
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* Copyright (C) 2010-2012 Andreas Heider <andreas@meetr.de>
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
* Copyright (C) 2015 Lukas Wunner <lukas@wunner.de>
|
2012-03-17 03:41:22 +08:00
|
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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|
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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|
#include <linux/module.h>
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|
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#include <linux/kernel.h>
|
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#include <linux/init.h>
|
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|
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#include <linux/backlight.h>
|
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|
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#include <linux/acpi.h>
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|
|
#include <linux/pnp.h>
|
|
|
|
#include <linux/apple_bl.h>
|
2016-01-12 03:09:20 +08:00
|
|
|
#include <linux/apple-gmux.h>
|
2012-03-17 03:41:22 +08:00
|
|
|
#include <linux/slab.h>
|
2012-08-10 01:45:01 +08:00
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|
#include <linux/delay.h>
|
2012-08-18 00:17:04 +08:00
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|
#include <linux/pci.h>
|
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|
|
#include <linux/vga_switcheroo.h>
|
2015-03-12 05:34:45 +08:00
|
|
|
#include <linux/vgaarb.h>
|
2012-03-17 03:41:22 +08:00
|
|
|
#include <acpi/video.h>
|
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|
|
#include <asm/io.h>
|
|
|
|
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
/**
|
|
|
|
* DOC: Overview
|
|
|
|
*
|
|
|
|
* gmux is a microcontroller built into the MacBook Pro to support dual GPUs:
|
2016-07-04 18:40:35 +08:00
|
|
|
* A `Lattice XP2`_ on pre-retinas, a `Renesas R4F2113`_ on retinas.
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
*
|
|
|
|
* (The MacPro6,1 2013 also has a gmux, however it is unclear why since it has
|
|
|
|
* dual GPUs but no built-in display.)
|
|
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|
*
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|
|
|
* gmux is connected to the LPC bus of the southbridge. Its I/O ports are
|
|
|
|
* accessed differently depending on the microcontroller: Driver functions
|
2016-07-04 18:40:35 +08:00
|
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|
* to access a pre-retina gmux are infixed ``_pio_``, those for a retina gmux
|
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|
|
* are infixed ``_index_``.
|
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|
*
|
|
|
|
* .. _Lattice XP2:
|
|
|
|
* http://www.latticesemi.com/en/Products/FPGAandCPLD/LatticeXP2.aspx
|
|
|
|
* .. _Renesas R4F2113:
|
|
|
|
* http://www.renesas.com/products/mpumcu/h8s/h8s2100/h8s2113/index.jsp
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
*/
|
|
|
|
|
2012-03-17 03:41:22 +08:00
|
|
|
struct apple_gmux_data {
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|
|
|
unsigned long iostart;
|
|
|
|
unsigned long iolen;
|
2012-08-10 01:45:01 +08:00
|
|
|
bool indexed;
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|
|
struct mutex index_lock;
|
2012-03-17 03:41:22 +08:00
|
|
|
|
2015-03-12 05:34:45 +08:00
|
|
|
struct pci_dev *pdev;
|
2012-03-17 03:41:22 +08:00
|
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|
struct backlight_device *bdev;
|
2012-08-18 00:17:04 +08:00
|
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|
|
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/* switcheroo data */
|
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|
acpi_handle dhandle;
|
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|
|
int gpe;
|
apple-gmux: Track switch state
gmux has 3 switch registers:
* GMUX_PORT_SWITCH_DISPLAY switches the panel
* GMUX_PORT_SWITCH_DDC switches the panel's DDC lines
(only on pre-retinas; on retinas this is a no-op)
* GMUX_PORT_SWITCH_EXTERNAL switches the external DP port(s)
(only on models without Thunderbolt, i.e. introduced before 2011;
those with Thunderbolt switch only HPD/AUX, not the main link)
Currently we switch all 3 registers in unison.
gmux does not preserve the switch state during suspend, so we currently
read GMUX_PORT_SWITCH_DISPLAY before suspend and restore all 3 registers
to this value on resume.
With the upcoming ->switch_ddc callback, GMUX_PORT_SWITCH_DDC may
temporarily contain a different value than the other 2 registers.
If we happen to suspend at this moment, we'll write an incorrect
value to GMUX_PORT_SWITCH_DDC on resume.
Also, on models with Thunderbolt the integrated GPU is unable to drive
the external DP port(s), so we want to keep GMUX_PORT_SWITCH_EXTERNAL
permanently switched to the discrete GPU on those machines.
Consequently we can no longer assume that GMUX_PORT_SWITCH_DISPLAY
represents the correct value for all 3 registers on suspend.
Track the state of all 3 registers: Add gmux_read_switch_state() and
gmux_write_switch_state(). Instead of reading the switch state on
every suspend, read it once on driver initialization so that we know
the current switch state all the time. (This allows us to use some
optimizations and shortcuts, e.g. we can skip switching DDC if we
know that it's already switched to the requested GPU.) Change the
->switchto callback to use gmux_write_switch_state().
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/5679f414cb0ddf1654dcc359571f3764b275edf0.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
enum vga_switcheroo_client_id switch_state_display;
|
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|
enum vga_switcheroo_client_id switch_state_ddc;
|
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|
|
enum vga_switcheroo_client_id switch_state_external;
|
2012-08-18 00:17:04 +08:00
|
|
|
enum vga_switcheroo_state power_state;
|
|
|
|
struct completion powerchange_done;
|
2012-03-17 03:41:22 +08:00
|
|
|
};
|
|
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|
|
2012-08-18 00:17:04 +08:00
|
|
|
static struct apple_gmux_data *apple_gmux_data;
|
|
|
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|
2012-03-17 03:41:22 +08:00
|
|
|
/*
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|
|
|
* gmux port offsets. Many of these are not yet used, but may be in the
|
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|
|
* future, and it's useful to have them documented here anyhow.
|
|
|
|
*/
|
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|
#define GMUX_PORT_VERSION_MAJOR 0x04
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|
#define GMUX_PORT_VERSION_MINOR 0x05
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#define GMUX_PORT_VERSION_RELEASE 0x06
|
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|
#define GMUX_PORT_SWITCH_DISPLAY 0x10
|
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|
|
#define GMUX_PORT_SWITCH_GET_DISPLAY 0x11
|
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|
#define GMUX_PORT_INTERRUPT_ENABLE 0x14
|
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|
#define GMUX_PORT_INTERRUPT_STATUS 0x16
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|
#define GMUX_PORT_SWITCH_DDC 0x28
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#define GMUX_PORT_SWITCH_EXTERNAL 0x40
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|
#define GMUX_PORT_SWITCH_GET_EXTERNAL 0x41
|
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|
#define GMUX_PORT_DISCRETE_POWER 0x50
|
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|
#define GMUX_PORT_MAX_BRIGHTNESS 0x70
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#define GMUX_PORT_BRIGHTNESS 0x74
|
2012-08-10 01:45:01 +08:00
|
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|
#define GMUX_PORT_VALUE 0xc2
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#define GMUX_PORT_READ 0xd0
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#define GMUX_PORT_WRITE 0xd4
|
2012-03-17 03:41:22 +08:00
|
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|
#define GMUX_MIN_IO_LEN (GMUX_PORT_BRIGHTNESS + 4)
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#define GMUX_INTERRUPT_ENABLE 0xff
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|
#define GMUX_INTERRUPT_DISABLE 0x00
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|
#define GMUX_INTERRUPT_STATUS_ACTIVE 0
|
|
|
|
#define GMUX_INTERRUPT_STATUS_DISPLAY (1 << 0)
|
|
|
|
#define GMUX_INTERRUPT_STATUS_POWER (1 << 2)
|
|
|
|
#define GMUX_INTERRUPT_STATUS_HOTPLUG (1 << 3)
|
|
|
|
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|
|
|
#define GMUX_BRIGHTNESS_MASK 0x00ffffff
|
|
|
|
#define GMUX_MAX_BRIGHTNESS GMUX_BRIGHTNESS_MASK
|
|
|
|
|
2012-08-10 01:45:01 +08:00
|
|
|
static u8 gmux_pio_read8(struct apple_gmux_data *gmux_data, int port)
|
2012-03-17 03:41:22 +08:00
|
|
|
{
|
|
|
|
return inb(gmux_data->iostart + port);
|
|
|
|
}
|
|
|
|
|
2012-08-10 01:45:01 +08:00
|
|
|
static void gmux_pio_write8(struct apple_gmux_data *gmux_data, int port,
|
2012-03-17 03:41:22 +08:00
|
|
|
u8 val)
|
|
|
|
{
|
|
|
|
outb(val, gmux_data->iostart + port);
|
|
|
|
}
|
|
|
|
|
2012-08-10 01:45:01 +08:00
|
|
|
static u32 gmux_pio_read32(struct apple_gmux_data *gmux_data, int port)
|
2012-03-17 03:41:22 +08:00
|
|
|
{
|
|
|
|
return inl(gmux_data->iostart + port);
|
|
|
|
}
|
|
|
|
|
2012-08-10 01:45:01 +08:00
|
|
|
static void gmux_pio_write32(struct apple_gmux_data *gmux_data, int port,
|
|
|
|
u32 val)
|
2012-08-10 00:47:00 +08:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
u8 tmpval;
|
|
|
|
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
tmpval = (val >> (i * 8)) & 0xff;
|
2012-08-22 10:56:49 +08:00
|
|
|
outb(tmpval, gmux_data->iostart + port + i);
|
2012-08-10 00:47:00 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-08-10 01:45:01 +08:00
|
|
|
static int gmux_index_wait_ready(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
int i = 200;
|
|
|
|
u8 gwr = inb(gmux_data->iostart + GMUX_PORT_WRITE);
|
|
|
|
|
|
|
|
while (i && (gwr & 0x01)) {
|
|
|
|
inb(gmux_data->iostart + GMUX_PORT_READ);
|
|
|
|
gwr = inb(gmux_data->iostart + GMUX_PORT_WRITE);
|
|
|
|
udelay(100);
|
|
|
|
i--;
|
|
|
|
}
|
|
|
|
|
|
|
|
return !!i;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int gmux_index_wait_complete(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
int i = 200;
|
|
|
|
u8 gwr = inb(gmux_data->iostart + GMUX_PORT_WRITE);
|
|
|
|
|
|
|
|
while (i && !(gwr & 0x01)) {
|
|
|
|
gwr = inb(gmux_data->iostart + GMUX_PORT_WRITE);
|
|
|
|
udelay(100);
|
|
|
|
i--;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (gwr & 0x01)
|
|
|
|
inb(gmux_data->iostart + GMUX_PORT_READ);
|
|
|
|
|
|
|
|
return !!i;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u8 gmux_index_read8(struct apple_gmux_data *gmux_data, int port)
|
|
|
|
{
|
|
|
|
u8 val;
|
|
|
|
|
|
|
|
mutex_lock(&gmux_data->index_lock);
|
|
|
|
gmux_index_wait_ready(gmux_data);
|
2012-08-25 16:30:48 +08:00
|
|
|
outb((port & 0xff), gmux_data->iostart + GMUX_PORT_READ);
|
|
|
|
gmux_index_wait_complete(gmux_data);
|
2012-08-10 01:45:01 +08:00
|
|
|
val = inb(gmux_data->iostart + GMUX_PORT_VALUE);
|
|
|
|
mutex_unlock(&gmux_data->index_lock);
|
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gmux_index_write8(struct apple_gmux_data *gmux_data, int port,
|
|
|
|
u8 val)
|
|
|
|
{
|
|
|
|
mutex_lock(&gmux_data->index_lock);
|
|
|
|
outb(val, gmux_data->iostart + GMUX_PORT_VALUE);
|
|
|
|
gmux_index_wait_ready(gmux_data);
|
|
|
|
outb(port & 0xff, gmux_data->iostart + GMUX_PORT_WRITE);
|
|
|
|
gmux_index_wait_complete(gmux_data);
|
|
|
|
mutex_unlock(&gmux_data->index_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 gmux_index_read32(struct apple_gmux_data *gmux_data, int port)
|
|
|
|
{
|
|
|
|
u32 val;
|
|
|
|
|
|
|
|
mutex_lock(&gmux_data->index_lock);
|
|
|
|
gmux_index_wait_ready(gmux_data);
|
2012-08-25 16:30:48 +08:00
|
|
|
outb((port & 0xff), gmux_data->iostart + GMUX_PORT_READ);
|
|
|
|
gmux_index_wait_complete(gmux_data);
|
2012-08-10 01:45:01 +08:00
|
|
|
val = inl(gmux_data->iostart + GMUX_PORT_VALUE);
|
|
|
|
mutex_unlock(&gmux_data->index_lock);
|
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gmux_index_write32(struct apple_gmux_data *gmux_data, int port,
|
|
|
|
u32 val)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
u8 tmpval;
|
|
|
|
|
|
|
|
mutex_lock(&gmux_data->index_lock);
|
|
|
|
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
tmpval = (val >> (i * 8)) & 0xff;
|
|
|
|
outb(tmpval, gmux_data->iostart + GMUX_PORT_VALUE + i);
|
|
|
|
}
|
|
|
|
|
|
|
|
gmux_index_wait_ready(gmux_data);
|
|
|
|
outb(port & 0xff, gmux_data->iostart + GMUX_PORT_WRITE);
|
|
|
|
gmux_index_wait_complete(gmux_data);
|
|
|
|
mutex_unlock(&gmux_data->index_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
static u8 gmux_read8(struct apple_gmux_data *gmux_data, int port)
|
|
|
|
{
|
|
|
|
if (gmux_data->indexed)
|
|
|
|
return gmux_index_read8(gmux_data, port);
|
|
|
|
else
|
|
|
|
return gmux_pio_read8(gmux_data, port);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gmux_write8(struct apple_gmux_data *gmux_data, int port, u8 val)
|
|
|
|
{
|
|
|
|
if (gmux_data->indexed)
|
|
|
|
gmux_index_write8(gmux_data, port, val);
|
|
|
|
else
|
|
|
|
gmux_pio_write8(gmux_data, port, val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 gmux_read32(struct apple_gmux_data *gmux_data, int port)
|
|
|
|
{
|
|
|
|
if (gmux_data->indexed)
|
|
|
|
return gmux_index_read32(gmux_data, port);
|
|
|
|
else
|
|
|
|
return gmux_pio_read32(gmux_data, port);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gmux_write32(struct apple_gmux_data *gmux_data, int port,
|
|
|
|
u32 val)
|
|
|
|
{
|
|
|
|
if (gmux_data->indexed)
|
|
|
|
gmux_index_write32(gmux_data, port, val);
|
|
|
|
else
|
|
|
|
gmux_pio_write32(gmux_data, port, val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool gmux_is_indexed(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
u16 val;
|
|
|
|
|
|
|
|
outb(0xaa, gmux_data->iostart + 0xcc);
|
|
|
|
outb(0x55, gmux_data->iostart + 0xcd);
|
|
|
|
outb(0x00, gmux_data->iostart + 0xce);
|
|
|
|
|
|
|
|
val = inb(gmux_data->iostart + 0xcc) |
|
|
|
|
(inb(gmux_data->iostart + 0xcd) << 8);
|
|
|
|
|
|
|
|
if (val == 0x55aa)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
/**
|
|
|
|
* DOC: Backlight control
|
|
|
|
*
|
|
|
|
* On single GPU MacBooks, the PWM signal for the backlight is generated by
|
|
|
|
* the GPU. On dual GPU MacBook Pros by contrast, either GPU may be suspended
|
|
|
|
* to conserve energy. Hence the PWM signal needs to be generated by a separate
|
|
|
|
* backlight driver which is controlled by gmux. The earliest generation
|
2016-07-04 18:40:35 +08:00
|
|
|
* MBP5 2008/09 uses a `TI LP8543`_ backlight driver. All newer models
|
|
|
|
* use a `TI LP8545`_.
|
|
|
|
*
|
|
|
|
* .. _TI LP8543: http://www.ti.com/lit/ds/symlink/lp8543.pdf
|
|
|
|
* .. _TI LP8545: http://www.ti.com/lit/ds/symlink/lp8545.pdf
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
*/
|
|
|
|
|
2012-03-17 03:41:22 +08:00
|
|
|
static int gmux_get_brightness(struct backlight_device *bd)
|
|
|
|
{
|
|
|
|
struct apple_gmux_data *gmux_data = bl_get_data(bd);
|
|
|
|
return gmux_read32(gmux_data, GMUX_PORT_BRIGHTNESS) &
|
|
|
|
GMUX_BRIGHTNESS_MASK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int gmux_update_status(struct backlight_device *bd)
|
|
|
|
{
|
|
|
|
struct apple_gmux_data *gmux_data = bl_get_data(bd);
|
|
|
|
u32 brightness = bd->props.brightness;
|
|
|
|
|
2012-04-19 23:55:35 +08:00
|
|
|
if (bd->props.state & BL_CORE_SUSPENDED)
|
2012-06-02 03:18:52 +08:00
|
|
|
return 0;
|
2012-04-19 23:55:35 +08:00
|
|
|
|
2012-08-10 00:47:00 +08:00
|
|
|
gmux_write32(gmux_data, GMUX_PORT_BRIGHTNESS, brightness);
|
2012-03-17 03:41:22 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct backlight_ops gmux_bl_ops = {
|
2012-04-19 23:55:35 +08:00
|
|
|
.options = BL_CORE_SUSPENDRESUME,
|
2012-03-17 03:41:22 +08:00
|
|
|
.get_brightness = gmux_get_brightness,
|
|
|
|
.update_status = gmux_update_status,
|
|
|
|
};
|
|
|
|
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
/**
|
|
|
|
* DOC: Graphics mux
|
|
|
|
*
|
|
|
|
* On pre-retinas, the LVDS outputs of both GPUs feed into gmux which muxes
|
|
|
|
* either of them to the panel. One of the tricks gmux has up its sleeve is
|
|
|
|
* to lengthen the blanking interval of its output during a switch to
|
|
|
|
* synchronize it with the GPU switched to. This allows for a flicker-free
|
2016-07-04 18:40:35 +08:00
|
|
|
* switch that is imperceptible by the user (`US 8,687,007 B2`_).
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
*
|
|
|
|
* On retinas, muxing is no longer done by gmux itself, but by a separate
|
|
|
|
* chip which is controlled by gmux. The chip is triple sourced, it is
|
2016-07-04 18:40:35 +08:00
|
|
|
* either an `NXP CBTL06142`_, `TI HD3SS212`_ or `Pericom PI3VDP12412`_.
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
* The panel is driven with eDP instead of LVDS since the pixel clock
|
|
|
|
* required for retina resolution exceeds LVDS' limits.
|
|
|
|
*
|
|
|
|
* Pre-retinas are able to switch the panel's DDC pins separately.
|
2016-07-04 18:40:35 +08:00
|
|
|
* This is handled by a `TI SN74LV4066A`_ which is controlled by gmux.
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
* The inactive GPU can thus probe the panel's EDID without switching over
|
|
|
|
* the entire panel. Retinas lack this functionality as the chips used for
|
|
|
|
* eDP muxing are incapable of switching the AUX channel separately (see
|
|
|
|
* the linked data sheets, Pericom would be capable but this is unused).
|
|
|
|
* However the retina panel has the NO_AUX_HANDSHAKE_LINK_TRAINING bit set
|
|
|
|
* in its DPCD, allowing the inactive GPU to skip the AUX handshake and
|
|
|
|
* set up the output with link parameters pre-calibrated by the active GPU.
|
|
|
|
*
|
|
|
|
* The external DP port is only fully switchable on the first two unibody
|
|
|
|
* MacBook Pro generations, MBP5 2008/09 and MBP6 2010. This is done by an
|
2016-07-04 18:40:35 +08:00
|
|
|
* `NXP CBTL06141`_ which is controlled by gmux. It's the predecessor of the
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
* eDP mux on retinas, the difference being support for 2.7 versus 5.4 Gbit/s.
|
|
|
|
*
|
|
|
|
* The following MacBook Pro generations replaced the external DP port with a
|
|
|
|
* combined DP/Thunderbolt port and lost the ability to switch it between GPUs,
|
|
|
|
* connecting it either to the discrete GPU or the Thunderbolt controller.
|
|
|
|
* Oddly enough, while the full port is no longer switchable, AUX and HPD
|
2016-07-04 18:40:35 +08:00
|
|
|
* are still switchable by way of an `NXP CBTL03062`_ (on pre-retinas
|
|
|
|
* MBP8 2011 and MBP9 2012) or two `TI TS3DS10224`_ (on retinas) under the
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
* control of gmux. Since the integrated GPU is missing the main link,
|
|
|
|
* external displays appear to it as phantoms which fail to link-train.
|
|
|
|
*
|
|
|
|
* gmux receives the HPD signal of all display connectors and sends an
|
|
|
|
* interrupt on hotplug. On generations which cannot switch external ports,
|
|
|
|
* the discrete GPU can then be woken to drive the newly connected display.
|
|
|
|
* The ability to switch AUX on these generations could be used to improve
|
|
|
|
* reliability of hotplug detection by having the integrated GPU poll the
|
|
|
|
* ports while the discrete GPU is asleep, but currently we do not make use
|
|
|
|
* of this feature.
|
|
|
|
*
|
|
|
|
* gmux' initial switch state on bootup is user configurable via the EFI
|
2016-07-04 18:40:35 +08:00
|
|
|
* variable ``gpu-power-prefs-fa4ce28d-b62f-4c99-9cc3-6815686e30f9`` (5th byte,
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
* 1 = IGD, 0 = DIS). Based on this setting, the EFI firmware tells gmux to
|
|
|
|
* switch the panel and the external DP connector and allocates a framebuffer
|
|
|
|
* for the selected GPU.
|
2016-07-04 18:40:35 +08:00
|
|
|
*
|
|
|
|
* .. _US 8,687,007 B2: http://pimg-fpiw.uspto.gov/fdd/07/870/086/0.pdf
|
|
|
|
* .. _NXP CBTL06141: http://www.nxp.com/documents/data_sheet/CBTL06141.pdf
|
|
|
|
* .. _NXP CBTL06142: http://www.nxp.com/documents/data_sheet/CBTL06141.pdf
|
|
|
|
* .. _TI HD3SS212: http://www.ti.com/lit/ds/symlink/hd3ss212.pdf
|
|
|
|
* .. _Pericom PI3VDP12412: https://www.pericom.com/assets/Datasheets/PI3VDP12412.pdf
|
|
|
|
* .. _TI SN74LV4066A: http://www.ti.com/lit/ds/symlink/sn74lv4066a.pdf
|
|
|
|
* .. _NXP CBTL03062: http://pdf.datasheetarchive.com/indexerfiles/Datasheets-SW16/DSASW00308511.pdf
|
|
|
|
* .. _TI TS3DS10224: http://www.ti.com/lit/ds/symlink/ts3ds10224.pdf
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
*/
|
|
|
|
|
apple-gmux: Track switch state
gmux has 3 switch registers:
* GMUX_PORT_SWITCH_DISPLAY switches the panel
* GMUX_PORT_SWITCH_DDC switches the panel's DDC lines
(only on pre-retinas; on retinas this is a no-op)
* GMUX_PORT_SWITCH_EXTERNAL switches the external DP port(s)
(only on models without Thunderbolt, i.e. introduced before 2011;
those with Thunderbolt switch only HPD/AUX, not the main link)
Currently we switch all 3 registers in unison.
gmux does not preserve the switch state during suspend, so we currently
read GMUX_PORT_SWITCH_DISPLAY before suspend and restore all 3 registers
to this value on resume.
With the upcoming ->switch_ddc callback, GMUX_PORT_SWITCH_DDC may
temporarily contain a different value than the other 2 registers.
If we happen to suspend at this moment, we'll write an incorrect
value to GMUX_PORT_SWITCH_DDC on resume.
Also, on models with Thunderbolt the integrated GPU is unable to drive
the external DP port(s), so we want to keep GMUX_PORT_SWITCH_EXTERNAL
permanently switched to the discrete GPU on those machines.
Consequently we can no longer assume that GMUX_PORT_SWITCH_DISPLAY
represents the correct value for all 3 registers on suspend.
Track the state of all 3 registers: Add gmux_read_switch_state() and
gmux_write_switch_state(). Instead of reading the switch state on
every suspend, read it once on driver initialization so that we know
the current switch state all the time. (This allows us to use some
optimizations and shortcuts, e.g. we can skip switching DDC if we
know that it's already switched to the requested GPU.) Change the
->switchto callback to use gmux_write_switch_state().
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/5679f414cb0ddf1654dcc359571f3764b275edf0.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
static void gmux_read_switch_state(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
if (gmux_read8(gmux_data, GMUX_PORT_SWITCH_DDC) == 1)
|
|
|
|
gmux_data->switch_state_ddc = VGA_SWITCHEROO_IGD;
|
|
|
|
else
|
|
|
|
gmux_data->switch_state_ddc = VGA_SWITCHEROO_DIS;
|
|
|
|
|
|
|
|
if (gmux_read8(gmux_data, GMUX_PORT_SWITCH_DISPLAY) == 2)
|
|
|
|
gmux_data->switch_state_display = VGA_SWITCHEROO_IGD;
|
|
|
|
else
|
|
|
|
gmux_data->switch_state_display = VGA_SWITCHEROO_DIS;
|
|
|
|
|
|
|
|
if (gmux_read8(gmux_data, GMUX_PORT_SWITCH_EXTERNAL) == 2)
|
|
|
|
gmux_data->switch_state_external = VGA_SWITCHEROO_IGD;
|
|
|
|
else
|
|
|
|
gmux_data->switch_state_external = VGA_SWITCHEROO_DIS;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gmux_write_switch_state(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
if (gmux_data->switch_state_ddc == VGA_SWITCHEROO_IGD)
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_SWITCH_DDC, 1);
|
|
|
|
else
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_SWITCH_DDC, 2);
|
|
|
|
|
|
|
|
if (gmux_data->switch_state_display == VGA_SWITCHEROO_IGD)
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_SWITCH_DISPLAY, 2);
|
|
|
|
else
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_SWITCH_DISPLAY, 3);
|
|
|
|
|
|
|
|
if (gmux_data->switch_state_external == VGA_SWITCHEROO_IGD)
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_SWITCH_EXTERNAL, 2);
|
|
|
|
else
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_SWITCH_EXTERNAL, 3);
|
|
|
|
}
|
|
|
|
|
2012-08-18 00:17:04 +08:00
|
|
|
static int gmux_switchto(enum vga_switcheroo_client_id id)
|
|
|
|
{
|
apple-gmux: Track switch state
gmux has 3 switch registers:
* GMUX_PORT_SWITCH_DISPLAY switches the panel
* GMUX_PORT_SWITCH_DDC switches the panel's DDC lines
(only on pre-retinas; on retinas this is a no-op)
* GMUX_PORT_SWITCH_EXTERNAL switches the external DP port(s)
(only on models without Thunderbolt, i.e. introduced before 2011;
those with Thunderbolt switch only HPD/AUX, not the main link)
Currently we switch all 3 registers in unison.
gmux does not preserve the switch state during suspend, so we currently
read GMUX_PORT_SWITCH_DISPLAY before suspend and restore all 3 registers
to this value on resume.
With the upcoming ->switch_ddc callback, GMUX_PORT_SWITCH_DDC may
temporarily contain a different value than the other 2 registers.
If we happen to suspend at this moment, we'll write an incorrect
value to GMUX_PORT_SWITCH_DDC on resume.
Also, on models with Thunderbolt the integrated GPU is unable to drive
the external DP port(s), so we want to keep GMUX_PORT_SWITCH_EXTERNAL
permanently switched to the discrete GPU on those machines.
Consequently we can no longer assume that GMUX_PORT_SWITCH_DISPLAY
represents the correct value for all 3 registers on suspend.
Track the state of all 3 registers: Add gmux_read_switch_state() and
gmux_write_switch_state(). Instead of reading the switch state on
every suspend, read it once on driver initialization so that we know
the current switch state all the time. (This allows us to use some
optimizations and shortcuts, e.g. we can skip switching DDC if we
know that it's already switched to the requested GPU.) Change the
->switchto callback to use gmux_write_switch_state().
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/5679f414cb0ddf1654dcc359571f3764b275edf0.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
apple_gmux_data->switch_state_ddc = id;
|
|
|
|
apple_gmux_data->switch_state_display = id;
|
|
|
|
apple_gmux_data->switch_state_external = id;
|
|
|
|
|
|
|
|
gmux_write_switch_state(apple_gmux_data);
|
2012-08-18 00:17:04 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
apple-gmux: Add switch_ddc support
Originally by Seth Forshee <seth.forshee@canonical.com>, 2012-10-04:
The gmux allows muxing the DDC independently from the display, so
support this functionality. This will allow reading the EDID for the
inactive GPU, fixing issues with machines that either don't have a
VBT or have invalid mode data in the VBT.
Modified by Lukas Wunner <lukas@wunner.de>, 2015-04 - 2015-12:
Change semantics of ->switch_ddc handler callback to return previous
DDC owner. Original version tried to determine previous DDC owner
with find_active_client() in vga_switcheroo but this fails if the
inactive client registers before the active client.
v2.4: Retain semantics of ->switchto handler callback to switch all
pins, including DDC (Daniel Vetter)
v4: Advertise ->switch_ddc handler callback only on the pre-retina
Macbook Pro. The retina uses eDP instead of LVDS and gmux no
longer does the muxing itself but merely controls an external
mux. That mux is incapable of switching the AUX channel
separately from the main link. It's an NXP CBTL06142
(alternate parts: TI HD3SS212, Pericom PI3VDP12412,
see datasheets below).
v5: Rebase on "apple-gmux: Track switch state".
Rebase on "vga_switcheroo: Add handler flags infrastructure".
Rebase on 5d170139eb10 ("Constify vga_switcheroo_handler"),
requires 2 structs, 1x with ->switchto for pre-retinas,
1x without for retinas).
Add error message if handler registration with vga_switcheroo
fails.
Teardowns identifying the mux:
http://www.electronicproducts.com/-whatsinside_text-145.aspx
http://slideshare.net/jjwu6266/apple-2012-wwdc-apple-macbook-pro-with-retina-display
http://www.techrepublic.com/blog/cracking-open/teardown-shows-retina-macbook-pro-is-nearly-impossible-to-upgrade-difficult-to-work-on/
Mux Datasheets:
http://www.nxp.com/documents/data_sheet/CBTL06141.pdf
http://www.ti.com/lit/ds/symlink/hd3ss212.pdf
https://www.pericom.com/assets/Datasheets/PI3VDP12412.pdf
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Cc: Seth Forshee <seth.forshee@canonical.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/17fe8bfb0415d713bb4174f84ac9aae5d7d9a5f8.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
static int gmux_switch_ddc(enum vga_switcheroo_client_id id)
|
|
|
|
{
|
|
|
|
enum vga_switcheroo_client_id old_ddc_owner =
|
|
|
|
apple_gmux_data->switch_state_ddc;
|
|
|
|
|
|
|
|
if (id == old_ddc_owner)
|
|
|
|
return id;
|
|
|
|
|
|
|
|
pr_debug("Switching DDC from %d to %d\n", old_ddc_owner, id);
|
|
|
|
apple_gmux_data->switch_state_ddc = id;
|
|
|
|
|
|
|
|
if (id == VGA_SWITCHEROO_IGD)
|
|
|
|
gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_DDC, 1);
|
|
|
|
else
|
|
|
|
gmux_write8(apple_gmux_data, GMUX_PORT_SWITCH_DDC, 2);
|
|
|
|
|
|
|
|
return old_ddc_owner;
|
|
|
|
}
|
|
|
|
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
/**
|
|
|
|
* DOC: Power control
|
|
|
|
*
|
|
|
|
* gmux is able to cut power to the discrete GPU. It automatically takes care
|
|
|
|
* of the correct sequence to tear down and bring up the power rails for
|
|
|
|
* core voltage, VRAM and PCIe.
|
|
|
|
*/
|
|
|
|
|
2012-08-18 00:17:04 +08:00
|
|
|
static int gmux_set_discrete_state(struct apple_gmux_data *gmux_data,
|
|
|
|
enum vga_switcheroo_state state)
|
|
|
|
{
|
2013-11-15 06:32:02 +08:00
|
|
|
reinit_completion(&gmux_data->powerchange_done);
|
2012-08-18 00:17:04 +08:00
|
|
|
|
|
|
|
if (state == VGA_SWITCHEROO_ON) {
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_DISCRETE_POWER, 1);
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_DISCRETE_POWER, 3);
|
|
|
|
pr_debug("Discrete card powered up\n");
|
|
|
|
} else {
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_DISCRETE_POWER, 1);
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_DISCRETE_POWER, 0);
|
|
|
|
pr_debug("Discrete card powered down\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
gmux_data->power_state = state;
|
|
|
|
|
|
|
|
if (gmux_data->gpe >= 0 &&
|
|
|
|
!wait_for_completion_interruptible_timeout(&gmux_data->powerchange_done,
|
|
|
|
msecs_to_jiffies(200)))
|
|
|
|
pr_warn("Timeout waiting for gmux switch to complete\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int gmux_set_power_state(enum vga_switcheroo_client_id id,
|
|
|
|
enum vga_switcheroo_state state)
|
|
|
|
{
|
|
|
|
if (id == VGA_SWITCHEROO_IGD)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return gmux_set_discrete_state(apple_gmux_data, state);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int gmux_get_client_id(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Early Macbook Pros with switchable graphics use nvidia
|
|
|
|
* integrated graphics. Hardcode that the 9400M is integrated.
|
|
|
|
*/
|
|
|
|
if (pdev->vendor == PCI_VENDOR_ID_INTEL)
|
|
|
|
return VGA_SWITCHEROO_IGD;
|
|
|
|
else if (pdev->vendor == PCI_VENDOR_ID_NVIDIA &&
|
|
|
|
pdev->device == 0x0863)
|
|
|
|
return VGA_SWITCHEROO_IGD;
|
|
|
|
else
|
|
|
|
return VGA_SWITCHEROO_DIS;
|
|
|
|
}
|
|
|
|
|
apple-gmux: Add switch_ddc support
Originally by Seth Forshee <seth.forshee@canonical.com>, 2012-10-04:
The gmux allows muxing the DDC independently from the display, so
support this functionality. This will allow reading the EDID for the
inactive GPU, fixing issues with machines that either don't have a
VBT or have invalid mode data in the VBT.
Modified by Lukas Wunner <lukas@wunner.de>, 2015-04 - 2015-12:
Change semantics of ->switch_ddc handler callback to return previous
DDC owner. Original version tried to determine previous DDC owner
with find_active_client() in vga_switcheroo but this fails if the
inactive client registers before the active client.
v2.4: Retain semantics of ->switchto handler callback to switch all
pins, including DDC (Daniel Vetter)
v4: Advertise ->switch_ddc handler callback only on the pre-retina
Macbook Pro. The retina uses eDP instead of LVDS and gmux no
longer does the muxing itself but merely controls an external
mux. That mux is incapable of switching the AUX channel
separately from the main link. It's an NXP CBTL06142
(alternate parts: TI HD3SS212, Pericom PI3VDP12412,
see datasheets below).
v5: Rebase on "apple-gmux: Track switch state".
Rebase on "vga_switcheroo: Add handler flags infrastructure".
Rebase on 5d170139eb10 ("Constify vga_switcheroo_handler"),
requires 2 structs, 1x with ->switchto for pre-retinas,
1x without for retinas).
Add error message if handler registration with vga_switcheroo
fails.
Teardowns identifying the mux:
http://www.electronicproducts.com/-whatsinside_text-145.aspx
http://slideshare.net/jjwu6266/apple-2012-wwdc-apple-macbook-pro-with-retina-display
http://www.techrepublic.com/blog/cracking-open/teardown-shows-retina-macbook-pro-is-nearly-impossible-to-upgrade-difficult-to-work-on/
Mux Datasheets:
http://www.nxp.com/documents/data_sheet/CBTL06141.pdf
http://www.ti.com/lit/ds/symlink/hd3ss212.pdf
https://www.pericom.com/assets/Datasheets/PI3VDP12412.pdf
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Cc: Seth Forshee <seth.forshee@canonical.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/17fe8bfb0415d713bb4174f84ac9aae5d7d9a5f8.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
static const struct vga_switcheroo_handler gmux_handler_indexed = {
|
2012-08-18 00:17:04 +08:00
|
|
|
.switchto = gmux_switchto,
|
|
|
|
.power_state = gmux_set_power_state,
|
|
|
|
.get_client_id = gmux_get_client_id,
|
|
|
|
};
|
|
|
|
|
apple-gmux: Add switch_ddc support
Originally by Seth Forshee <seth.forshee@canonical.com>, 2012-10-04:
The gmux allows muxing the DDC independently from the display, so
support this functionality. This will allow reading the EDID for the
inactive GPU, fixing issues with machines that either don't have a
VBT or have invalid mode data in the VBT.
Modified by Lukas Wunner <lukas@wunner.de>, 2015-04 - 2015-12:
Change semantics of ->switch_ddc handler callback to return previous
DDC owner. Original version tried to determine previous DDC owner
with find_active_client() in vga_switcheroo but this fails if the
inactive client registers before the active client.
v2.4: Retain semantics of ->switchto handler callback to switch all
pins, including DDC (Daniel Vetter)
v4: Advertise ->switch_ddc handler callback only on the pre-retina
Macbook Pro. The retina uses eDP instead of LVDS and gmux no
longer does the muxing itself but merely controls an external
mux. That mux is incapable of switching the AUX channel
separately from the main link. It's an NXP CBTL06142
(alternate parts: TI HD3SS212, Pericom PI3VDP12412,
see datasheets below).
v5: Rebase on "apple-gmux: Track switch state".
Rebase on "vga_switcheroo: Add handler flags infrastructure".
Rebase on 5d170139eb10 ("Constify vga_switcheroo_handler"),
requires 2 structs, 1x with ->switchto for pre-retinas,
1x without for retinas).
Add error message if handler registration with vga_switcheroo
fails.
Teardowns identifying the mux:
http://www.electronicproducts.com/-whatsinside_text-145.aspx
http://slideshare.net/jjwu6266/apple-2012-wwdc-apple-macbook-pro-with-retina-display
http://www.techrepublic.com/blog/cracking-open/teardown-shows-retina-macbook-pro-is-nearly-impossible-to-upgrade-difficult-to-work-on/
Mux Datasheets:
http://www.nxp.com/documents/data_sheet/CBTL06141.pdf
http://www.ti.com/lit/ds/symlink/hd3ss212.pdf
https://www.pericom.com/assets/Datasheets/PI3VDP12412.pdf
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Cc: Seth Forshee <seth.forshee@canonical.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/17fe8bfb0415d713bb4174f84ac9aae5d7d9a5f8.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
static const struct vga_switcheroo_handler gmux_handler_classic = {
|
|
|
|
.switchto = gmux_switchto,
|
|
|
|
.switch_ddc = gmux_switch_ddc,
|
|
|
|
.power_state = gmux_set_power_state,
|
|
|
|
.get_client_id = gmux_get_client_id,
|
|
|
|
};
|
|
|
|
|
apple-gmux: Add initial documentation
Document what I've learned so far about the gmux so that we can
collaboratively reverse-engineer its remaining unknown bits
without everyone having to start from scratch.
The DOC sections are bound together in the gpu.tmpl DocBook
under a new vga_switcheroo "Handlers" chapter. Eventually
this should be amended with documentation about the four other
handlers that exist so far (nouveau v1 DSM, nouveau Optimus DSM,
radeon ATPX, amdgpu ATPX).
Requires kernel-doc with asciidoc support.
The EFI variable was reverse-engineered by Bruno Bierbaumer
<bruno@bierbaumer.net> and Andreas Heider <andreas@meetr.de>.
Some of the remaining open questions:
* How are vblank intervals synchronized on retinas to achieve seamless
switching? Is the DP mux capable of this? It's not mentioned in the
data sheets. Or is it done at the OS level, i.e. do we have to
synchronize vblank intervals between DRM drivers? There's a signal
coming from the panel connector and going into gmux, could this be
the vblank signal as received by the panel to properly time the
switch?
* On retinas there's an I2C bus between gmux and the connector of the
right I/O board, apparently leading to the Parade PS8401A HDMI
repeater. What is this for, is it controlled via gmux registers?
Data sheet:
http://www.paradetech.com/products/jitter-cleaning-repeaters/ps8401/
* On retinas there's an I2C bus between gmux and the LED driver.
Pre-retinas connected the LED driver to SMBUS. Are there additional
gmux registers on retinas to control it?
* The MacPro6,1 2013 also has a gmux, the same Renesas R4F2113 as the
retina MacBook Pro. The Mac Pro doesn't have a built-in display,
so what is its purpose? Power control of the dual FirePro GPUs?
Switching of the external DP/Thunderbolt ports? The iFixit teardown
clearly shows one TI HD3SS212 DisplayPort mux on the logic board next
to one of the three Thunderbolt controllers. However six muxes would
be necessary to switch all six ports between GPUs. The mux is probably
necessary for one of the display configurations allowed by Apple,
but which one?
https://www.ifixit.com/Teardown/Mac+Pro+Late+2013+Teardown/20778
https://d3nevzfk7ii3be.cloudfront.net/igi/fELBTnt31QhnDsqq.huge
https://support.apple.com/en-us/HT202801
* Registers we haven't decoded yet:
0x700 32 Bit configmap?
0x708 32 Bit power sequence?
0x712 8 Bit status of clock from panel on retinas?
0x713 8 Bit dito?
0x724 16 Bit backlight, raw value?
0x760 32 Bit backlight
0x764 32 Bit backlight
0x768 8 Bit backlight
0x76a 16 Bit backlight
0x76c 16 Bit backlight
0x76e 16 Bit backlight
0x77f edp/dp/hdmi probe? retina only.
* Addition by Bruno Prémont <bonbons@linux-vserver.org>:
"Missing is also precise knowledge as to what the gmux depends on.
From behavioral reports, it is somehow sensitive to VGA IO/MEM
routing (it apparently needs the routing to go to integrated GPU,
not discrete GPU).
When the routing is inappropriate backlight control IO just reads back
as 0xFF (and eventually gmux IO in general does so)."
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Darren Hart <dvhart@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/da309e436fbeac886477d80376457b7d83ea4b2d.1452431795.git.lukas@wunner.de
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-11 07:08:35 +08:00
|
|
|
/**
|
|
|
|
* DOC: Interrupt
|
|
|
|
*
|
|
|
|
* gmux is also connected to a GPIO pin of the southbridge and thereby is able
|
|
|
|
* to trigger an ACPI GPE. On the MBP5 2008/09 it's GPIO pin 22 of the Nvidia
|
|
|
|
* MCP79, on all following generations it's GPIO pin 6 of the Intel PCH.
|
|
|
|
* The GPE merely signals that an interrupt occurred, the actual type of event
|
|
|
|
* is identified by reading a gmux register.
|
|
|
|
*/
|
|
|
|
|
2012-08-18 00:17:04 +08:00
|
|
|
static inline void gmux_disable_interrupts(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_INTERRUPT_ENABLE,
|
|
|
|
GMUX_INTERRUPT_DISABLE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void gmux_enable_interrupts(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_INTERRUPT_ENABLE,
|
|
|
|
GMUX_INTERRUPT_ENABLE);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline u8 gmux_interrupt_get_status(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
return gmux_read8(gmux_data, GMUX_PORT_INTERRUPT_STATUS);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gmux_clear_interrupts(struct apple_gmux_data *gmux_data)
|
|
|
|
{
|
|
|
|
u8 status;
|
|
|
|
|
|
|
|
/* to clear interrupts write back current status */
|
|
|
|
status = gmux_interrupt_get_status(gmux_data);
|
|
|
|
gmux_write8(gmux_data, GMUX_PORT_INTERRUPT_STATUS, status);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gmux_notify_handler(acpi_handle device, u32 value, void *context)
|
|
|
|
{
|
|
|
|
u8 status;
|
|
|
|
struct pnp_dev *pnp = (struct pnp_dev *)context;
|
|
|
|
struct apple_gmux_data *gmux_data = pnp_get_drvdata(pnp);
|
|
|
|
|
|
|
|
status = gmux_interrupt_get_status(gmux_data);
|
|
|
|
gmux_disable_interrupts(gmux_data);
|
|
|
|
pr_debug("Notify handler called: status %d\n", status);
|
|
|
|
|
|
|
|
gmux_clear_interrupts(gmux_data);
|
|
|
|
gmux_enable_interrupts(gmux_data);
|
|
|
|
|
|
|
|
if (status & GMUX_INTERRUPT_STATUS_POWER)
|
|
|
|
complete(&gmux_data->powerchange_done);
|
|
|
|
}
|
|
|
|
|
2013-09-12 05:23:15 +08:00
|
|
|
static int gmux_suspend(struct device *dev)
|
2012-08-18 00:17:04 +08:00
|
|
|
{
|
2013-09-12 05:23:15 +08:00
|
|
|
struct pnp_dev *pnp = to_pnp_dev(dev);
|
2012-08-18 00:17:04 +08:00
|
|
|
struct apple_gmux_data *gmux_data = pnp_get_drvdata(pnp);
|
2013-09-12 05:23:15 +08:00
|
|
|
|
2012-08-18 00:17:04 +08:00
|
|
|
gmux_disable_interrupts(gmux_data);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-09-12 05:23:15 +08:00
|
|
|
static int gmux_resume(struct device *dev)
|
2012-08-18 00:17:04 +08:00
|
|
|
{
|
2013-09-12 05:23:15 +08:00
|
|
|
struct pnp_dev *pnp = to_pnp_dev(dev);
|
2012-08-18 00:17:04 +08:00
|
|
|
struct apple_gmux_data *gmux_data = pnp_get_drvdata(pnp);
|
2013-09-12 05:23:15 +08:00
|
|
|
|
2012-08-18 00:17:04 +08:00
|
|
|
gmux_enable_interrupts(gmux_data);
|
apple-gmux: Track switch state
gmux has 3 switch registers:
* GMUX_PORT_SWITCH_DISPLAY switches the panel
* GMUX_PORT_SWITCH_DDC switches the panel's DDC lines
(only on pre-retinas; on retinas this is a no-op)
* GMUX_PORT_SWITCH_EXTERNAL switches the external DP port(s)
(only on models without Thunderbolt, i.e. introduced before 2011;
those with Thunderbolt switch only HPD/AUX, not the main link)
Currently we switch all 3 registers in unison.
gmux does not preserve the switch state during suspend, so we currently
read GMUX_PORT_SWITCH_DISPLAY before suspend and restore all 3 registers
to this value on resume.
With the upcoming ->switch_ddc callback, GMUX_PORT_SWITCH_DDC may
temporarily contain a different value than the other 2 registers.
If we happen to suspend at this moment, we'll write an incorrect
value to GMUX_PORT_SWITCH_DDC on resume.
Also, on models with Thunderbolt the integrated GPU is unable to drive
the external DP port(s), so we want to keep GMUX_PORT_SWITCH_EXTERNAL
permanently switched to the discrete GPU on those machines.
Consequently we can no longer assume that GMUX_PORT_SWITCH_DISPLAY
represents the correct value for all 3 registers on suspend.
Track the state of all 3 registers: Add gmux_read_switch_state() and
gmux_write_switch_state(). Instead of reading the switch state on
every suspend, read it once on driver initialization so that we know
the current switch state all the time. (This allows us to use some
optimizations and shortcuts, e.g. we can skip switching DDC if we
know that it's already switched to the requested GPU.) Change the
->switchto callback to use gmux_write_switch_state().
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/5679f414cb0ddf1654dcc359571f3764b275edf0.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
gmux_write_switch_state(gmux_data);
|
2012-08-18 00:17:04 +08:00
|
|
|
if (gmux_data->power_state == VGA_SWITCHEROO_OFF)
|
|
|
|
gmux_set_discrete_state(gmux_data, gmux_data->power_state);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-03-12 05:34:45 +08:00
|
|
|
static struct pci_dev *gmux_get_io_pdev(void)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = NULL;
|
|
|
|
|
|
|
|
while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev))) {
|
|
|
|
u16 cmd;
|
|
|
|
|
|
|
|
pci_read_config_word(pdev, PCI_COMMAND, &cmd);
|
|
|
|
if (!(cmd & PCI_COMMAND_IO))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
return pdev;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2012-12-22 05:18:33 +08:00
|
|
|
static int gmux_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
|
2012-03-17 03:41:22 +08:00
|
|
|
{
|
|
|
|
struct apple_gmux_data *gmux_data;
|
|
|
|
struct resource *res;
|
|
|
|
struct backlight_properties props;
|
|
|
|
struct backlight_device *bdev;
|
|
|
|
u8 ver_major, ver_minor, ver_release;
|
|
|
|
int ret = -ENXIO;
|
2012-08-18 00:17:04 +08:00
|
|
|
acpi_status status;
|
|
|
|
unsigned long long gpe;
|
2015-03-12 05:34:45 +08:00
|
|
|
struct pci_dev *pdev = NULL;
|
2012-08-18 00:17:04 +08:00
|
|
|
|
|
|
|
if (apple_gmux_data)
|
|
|
|
return -EBUSY;
|
2012-03-17 03:41:22 +08:00
|
|
|
|
|
|
|
gmux_data = kzalloc(sizeof(*gmux_data), GFP_KERNEL);
|
|
|
|
if (!gmux_data)
|
|
|
|
return -ENOMEM;
|
|
|
|
pnp_set_drvdata(pnp, gmux_data);
|
|
|
|
|
|
|
|
res = pnp_get_resource(pnp, IORESOURCE_IO, 0);
|
|
|
|
if (!res) {
|
|
|
|
pr_err("Failed to find gmux I/O resource\n");
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
gmux_data->iostart = res->start;
|
|
|
|
gmux_data->iolen = res->end - res->start;
|
|
|
|
|
|
|
|
if (gmux_data->iolen < GMUX_MIN_IO_LEN) {
|
|
|
|
pr_err("gmux I/O region too small (%lu < %u)\n",
|
|
|
|
gmux_data->iolen, GMUX_MIN_IO_LEN);
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!request_region(gmux_data->iostart, gmux_data->iolen,
|
|
|
|
"Apple gmux")) {
|
|
|
|
pr_err("gmux I/O already in use\n");
|
|
|
|
goto err_free;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2012-08-10 01:45:01 +08:00
|
|
|
* Invalid version information may indicate either that the gmux
|
|
|
|
* device isn't present or that it's a new one that uses indexed
|
|
|
|
* io
|
2012-03-17 03:41:22 +08:00
|
|
|
*/
|
2012-08-10 01:45:01 +08:00
|
|
|
|
2012-03-17 03:41:22 +08:00
|
|
|
ver_major = gmux_read8(gmux_data, GMUX_PORT_VERSION_MAJOR);
|
|
|
|
ver_minor = gmux_read8(gmux_data, GMUX_PORT_VERSION_MINOR);
|
|
|
|
ver_release = gmux_read8(gmux_data, GMUX_PORT_VERSION_RELEASE);
|
|
|
|
if (ver_major == 0xff && ver_minor == 0xff && ver_release == 0xff) {
|
2012-08-10 01:45:01 +08:00
|
|
|
if (gmux_is_indexed(gmux_data)) {
|
2012-08-25 16:30:49 +08:00
|
|
|
u32 version;
|
2012-08-10 01:45:01 +08:00
|
|
|
mutex_init(&gmux_data->index_lock);
|
|
|
|
gmux_data->indexed = true;
|
2012-08-25 16:30:49 +08:00
|
|
|
version = gmux_read32(gmux_data,
|
|
|
|
GMUX_PORT_VERSION_MAJOR);
|
|
|
|
ver_major = (version >> 24) & 0xff;
|
|
|
|
ver_minor = (version >> 16) & 0xff;
|
|
|
|
ver_release = (version >> 8) & 0xff;
|
2012-08-10 01:45:01 +08:00
|
|
|
} else {
|
2015-03-12 05:34:45 +08:00
|
|
|
pr_info("gmux device not present or IO disabled\n");
|
2012-08-10 01:45:01 +08:00
|
|
|
ret = -ENODEV;
|
|
|
|
goto err_release;
|
|
|
|
}
|
2012-03-17 03:41:22 +08:00
|
|
|
}
|
2012-08-25 16:30:49 +08:00
|
|
|
pr_info("Found gmux version %d.%d.%d [%s]\n", ver_major, ver_minor,
|
|
|
|
ver_release, (gmux_data->indexed ? "indexed" : "classic"));
|
2012-03-17 03:41:22 +08:00
|
|
|
|
2015-03-12 05:34:45 +08:00
|
|
|
/*
|
|
|
|
* Apple systems with gmux are EFI based and normally don't use
|
|
|
|
* VGA. In addition changing IO+MEM ownership between IGP and dGPU
|
|
|
|
* disables IO/MEM used for backlight control on some systems.
|
|
|
|
* Lock IO+MEM to GPU with active IO to prevent switch.
|
|
|
|
*/
|
|
|
|
pdev = gmux_get_io_pdev();
|
|
|
|
if (pdev && vga_tryget(pdev,
|
|
|
|
VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM)) {
|
|
|
|
pr_err("IO+MEM vgaarb-locking for PCI:%s failed\n",
|
|
|
|
pci_name(pdev));
|
|
|
|
ret = -EBUSY;
|
|
|
|
goto err_release;
|
|
|
|
} else if (pdev)
|
|
|
|
pr_info("locked IO for PCI:%s\n", pci_name(pdev));
|
|
|
|
gmux_data->pdev = pdev;
|
|
|
|
|
2012-03-17 03:41:22 +08:00
|
|
|
memset(&props, 0, sizeof(props));
|
|
|
|
props.type = BACKLIGHT_PLATFORM;
|
|
|
|
props.max_brightness = gmux_read32(gmux_data, GMUX_PORT_MAX_BRIGHTNESS);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Currently it's assumed that the maximum brightness is less than
|
|
|
|
* 2^24 for compatibility with old gmux versions. Cap the max
|
|
|
|
* brightness at this value, but print a warning if the hardware
|
|
|
|
* reports something higher so that it can be fixed.
|
|
|
|
*/
|
|
|
|
if (WARN_ON(props.max_brightness > GMUX_MAX_BRIGHTNESS))
|
|
|
|
props.max_brightness = GMUX_MAX_BRIGHTNESS;
|
|
|
|
|
|
|
|
bdev = backlight_device_register("gmux_backlight", &pnp->dev,
|
|
|
|
gmux_data, &gmux_bl_ops, &props);
|
|
|
|
if (IS_ERR(bdev)) {
|
|
|
|
ret = PTR_ERR(bdev);
|
|
|
|
goto err_release;
|
|
|
|
}
|
|
|
|
|
|
|
|
gmux_data->bdev = bdev;
|
|
|
|
bdev->props.brightness = gmux_get_brightness(bdev);
|
|
|
|
backlight_update_status(bdev);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The backlight situation on Macs is complicated. If the gmux is
|
|
|
|
* present it's the best choice, because it always works for
|
|
|
|
* backlight control and supports more levels than other options.
|
|
|
|
* Disable the other backlight choices.
|
|
|
|
*/
|
2015-06-16 22:27:56 +08:00
|
|
|
acpi_video_set_dmi_backlight_type(acpi_backlight_vendor);
|
2012-03-17 03:41:22 +08:00
|
|
|
apple_bl_unregister();
|
|
|
|
|
2012-08-18 00:17:04 +08:00
|
|
|
gmux_data->power_state = VGA_SWITCHEROO_ON;
|
|
|
|
|
2013-11-15 06:17:21 +08:00
|
|
|
gmux_data->dhandle = ACPI_HANDLE(&pnp->dev);
|
2012-08-18 00:17:04 +08:00
|
|
|
if (!gmux_data->dhandle) {
|
|
|
|
pr_err("Cannot find acpi handle for pnp device %s\n",
|
|
|
|
dev_name(&pnp->dev));
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto err_notify;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = acpi_evaluate_integer(gmux_data->dhandle, "GMGP", NULL, &gpe);
|
|
|
|
if (ACPI_SUCCESS(status)) {
|
|
|
|
gmux_data->gpe = (int)gpe;
|
|
|
|
|
|
|
|
status = acpi_install_notify_handler(gmux_data->dhandle,
|
|
|
|
ACPI_DEVICE_NOTIFY,
|
|
|
|
&gmux_notify_handler, pnp);
|
|
|
|
if (ACPI_FAILURE(status)) {
|
|
|
|
pr_err("Install notify handler failed: %s\n",
|
|
|
|
acpi_format_exception(status));
|
|
|
|
ret = -ENODEV;
|
|
|
|
goto err_notify;
|
|
|
|
}
|
|
|
|
|
|
|
|
status = acpi_enable_gpe(NULL, gmux_data->gpe);
|
|
|
|
if (ACPI_FAILURE(status)) {
|
|
|
|
pr_err("Cannot enable gpe: %s\n",
|
|
|
|
acpi_format_exception(status));
|
|
|
|
goto err_enable_gpe;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
pr_warn("No GPE found for gmux\n");
|
|
|
|
gmux_data->gpe = -1;
|
|
|
|
}
|
|
|
|
|
2015-11-17 04:38:40 +08:00
|
|
|
apple_gmux_data = gmux_data;
|
|
|
|
init_completion(&gmux_data->powerchange_done);
|
|
|
|
gmux_enable_interrupts(gmux_data);
|
apple-gmux: Track switch state
gmux has 3 switch registers:
* GMUX_PORT_SWITCH_DISPLAY switches the panel
* GMUX_PORT_SWITCH_DDC switches the panel's DDC lines
(only on pre-retinas; on retinas this is a no-op)
* GMUX_PORT_SWITCH_EXTERNAL switches the external DP port(s)
(only on models without Thunderbolt, i.e. introduced before 2011;
those with Thunderbolt switch only HPD/AUX, not the main link)
Currently we switch all 3 registers in unison.
gmux does not preserve the switch state during suspend, so we currently
read GMUX_PORT_SWITCH_DISPLAY before suspend and restore all 3 registers
to this value on resume.
With the upcoming ->switch_ddc callback, GMUX_PORT_SWITCH_DDC may
temporarily contain a different value than the other 2 registers.
If we happen to suspend at this moment, we'll write an incorrect
value to GMUX_PORT_SWITCH_DDC on resume.
Also, on models with Thunderbolt the integrated GPU is unable to drive
the external DP port(s), so we want to keep GMUX_PORT_SWITCH_EXTERNAL
permanently switched to the discrete GPU on those machines.
Consequently we can no longer assume that GMUX_PORT_SWITCH_DISPLAY
represents the correct value for all 3 registers on suspend.
Track the state of all 3 registers: Add gmux_read_switch_state() and
gmux_write_switch_state(). Instead of reading the switch state on
every suspend, read it once on driver initialization so that we know
the current switch state all the time. (This allows us to use some
optimizations and shortcuts, e.g. we can skip switching DDC if we
know that it's already switched to the requested GPU.) Change the
->switchto callback to use gmux_write_switch_state().
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/5679f414cb0ddf1654dcc359571f3764b275edf0.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
gmux_read_switch_state(gmux_data);
|
2015-11-17 04:38:40 +08:00
|
|
|
|
apple-gmux: Add switch_ddc support
Originally by Seth Forshee <seth.forshee@canonical.com>, 2012-10-04:
The gmux allows muxing the DDC independently from the display, so
support this functionality. This will allow reading the EDID for the
inactive GPU, fixing issues with machines that either don't have a
VBT or have invalid mode data in the VBT.
Modified by Lukas Wunner <lukas@wunner.de>, 2015-04 - 2015-12:
Change semantics of ->switch_ddc handler callback to return previous
DDC owner. Original version tried to determine previous DDC owner
with find_active_client() in vga_switcheroo but this fails if the
inactive client registers before the active client.
v2.4: Retain semantics of ->switchto handler callback to switch all
pins, including DDC (Daniel Vetter)
v4: Advertise ->switch_ddc handler callback only on the pre-retina
Macbook Pro. The retina uses eDP instead of LVDS and gmux no
longer does the muxing itself but merely controls an external
mux. That mux is incapable of switching the AUX channel
separately from the main link. It's an NXP CBTL06142
(alternate parts: TI HD3SS212, Pericom PI3VDP12412,
see datasheets below).
v5: Rebase on "apple-gmux: Track switch state".
Rebase on "vga_switcheroo: Add handler flags infrastructure".
Rebase on 5d170139eb10 ("Constify vga_switcheroo_handler"),
requires 2 structs, 1x with ->switchto for pre-retinas,
1x without for retinas).
Add error message if handler registration with vga_switcheroo
fails.
Teardowns identifying the mux:
http://www.electronicproducts.com/-whatsinside_text-145.aspx
http://slideshare.net/jjwu6266/apple-2012-wwdc-apple-macbook-pro-with-retina-display
http://www.techrepublic.com/blog/cracking-open/teardown-shows-retina-macbook-pro-is-nearly-impossible-to-upgrade-difficult-to-work-on/
Mux Datasheets:
http://www.nxp.com/documents/data_sheet/CBTL06141.pdf
http://www.ti.com/lit/ds/symlink/hd3ss212.pdf
https://www.pericom.com/assets/Datasheets/PI3VDP12412.pdf
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=88861
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61115
Tested-by: Lukas Wunner <lukas@wunner.de>
[MBP 9,1 2012 intel IVB + nvidia GK107 pre-retina 15"]
Cc: Seth Forshee <seth.forshee@canonical.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/17fe8bfb0415d713bb4174f84ac9aae5d7d9a5f8.1452525860.git.lukas@wunner.de
2016-01-12 03:09:20 +08:00
|
|
|
/*
|
|
|
|
* Retina MacBook Pros cannot switch the panel's AUX separately
|
|
|
|
* and need eDP pre-calibration. They are distinguishable from
|
|
|
|
* pre-retinas by having an "indexed" gmux.
|
|
|
|
*
|
|
|
|
* Pre-retina MacBook Pros can switch the panel's DDC separately.
|
|
|
|
*/
|
|
|
|
if (gmux_data->indexed)
|
|
|
|
ret = vga_switcheroo_register_handler(&gmux_handler_indexed,
|
|
|
|
VGA_SWITCHEROO_NEEDS_EDP_CONFIG);
|
|
|
|
else
|
|
|
|
ret = vga_switcheroo_register_handler(&gmux_handler_classic,
|
|
|
|
VGA_SWITCHEROO_CAN_SWITCH_DDC);
|
|
|
|
if (ret) {
|
|
|
|
pr_err("Failed to register vga_switcheroo handler\n");
|
2012-08-18 00:17:04 +08:00
|
|
|
goto err_register_handler;
|
|
|
|
}
|
|
|
|
|
2012-03-17 03:41:22 +08:00
|
|
|
return 0;
|
|
|
|
|
2012-08-18 00:17:04 +08:00
|
|
|
err_register_handler:
|
2015-11-17 04:38:40 +08:00
|
|
|
gmux_disable_interrupts(gmux_data);
|
|
|
|
apple_gmux_data = NULL;
|
2012-08-18 00:17:04 +08:00
|
|
|
if (gmux_data->gpe >= 0)
|
|
|
|
acpi_disable_gpe(NULL, gmux_data->gpe);
|
|
|
|
err_enable_gpe:
|
|
|
|
if (gmux_data->gpe >= 0)
|
|
|
|
acpi_remove_notify_handler(gmux_data->dhandle,
|
|
|
|
ACPI_DEVICE_NOTIFY,
|
|
|
|
&gmux_notify_handler);
|
|
|
|
err_notify:
|
|
|
|
backlight_device_unregister(bdev);
|
2012-03-17 03:41:22 +08:00
|
|
|
err_release:
|
2015-03-12 05:34:45 +08:00
|
|
|
if (gmux_data->pdev)
|
|
|
|
vga_put(gmux_data->pdev,
|
|
|
|
VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM);
|
|
|
|
pci_dev_put(pdev);
|
2012-03-17 03:41:22 +08:00
|
|
|
release_region(gmux_data->iostart, gmux_data->iolen);
|
|
|
|
err_free:
|
|
|
|
kfree(gmux_data);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-12-22 05:18:33 +08:00
|
|
|
static void gmux_remove(struct pnp_dev *pnp)
|
2012-03-17 03:41:22 +08:00
|
|
|
{
|
|
|
|
struct apple_gmux_data *gmux_data = pnp_get_drvdata(pnp);
|
|
|
|
|
2012-08-18 00:17:04 +08:00
|
|
|
vga_switcheroo_unregister_handler();
|
|
|
|
gmux_disable_interrupts(gmux_data);
|
|
|
|
if (gmux_data->gpe >= 0) {
|
|
|
|
acpi_disable_gpe(NULL, gmux_data->gpe);
|
|
|
|
acpi_remove_notify_handler(gmux_data->dhandle,
|
|
|
|
ACPI_DEVICE_NOTIFY,
|
|
|
|
&gmux_notify_handler);
|
|
|
|
}
|
|
|
|
|
2015-03-12 05:34:45 +08:00
|
|
|
if (gmux_data->pdev) {
|
|
|
|
vga_put(gmux_data->pdev,
|
|
|
|
VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM);
|
|
|
|
pci_dev_put(gmux_data->pdev);
|
|
|
|
}
|
2012-03-17 03:41:22 +08:00
|
|
|
backlight_device_unregister(gmux_data->bdev);
|
2012-08-18 00:17:04 +08:00
|
|
|
|
2012-03-17 03:41:22 +08:00
|
|
|
release_region(gmux_data->iostart, gmux_data->iolen);
|
2012-08-18 00:17:04 +08:00
|
|
|
apple_gmux_data = NULL;
|
2012-03-17 03:41:22 +08:00
|
|
|
kfree(gmux_data);
|
|
|
|
|
|
|
|
acpi_video_register();
|
|
|
|
apple_bl_register();
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct pnp_device_id gmux_device_ids[] = {
|
2016-01-12 03:09:20 +08:00
|
|
|
{GMUX_ACPI_HID, 0},
|
2012-03-17 03:41:22 +08:00
|
|
|
{"", 0}
|
|
|
|
};
|
|
|
|
|
2013-09-12 05:23:15 +08:00
|
|
|
static const struct dev_pm_ops gmux_dev_pm_ops = {
|
|
|
|
.suspend = gmux_suspend,
|
|
|
|
.resume = gmux_resume,
|
|
|
|
};
|
|
|
|
|
2012-03-17 03:41:22 +08:00
|
|
|
static struct pnp_driver gmux_pnp_driver = {
|
|
|
|
.name = "apple-gmux",
|
|
|
|
.probe = gmux_probe,
|
2012-12-22 05:18:33 +08:00
|
|
|
.remove = gmux_remove,
|
2012-03-17 03:41:22 +08:00
|
|
|
.id_table = gmux_device_ids,
|
2013-09-12 05:23:15 +08:00
|
|
|
.driver = {
|
|
|
|
.pm = &gmux_dev_pm_ops,
|
|
|
|
},
|
2012-03-17 03:41:22 +08:00
|
|
|
};
|
|
|
|
|
2015-03-17 04:46:36 +08:00
|
|
|
module_pnp_driver(gmux_pnp_driver);
|
2012-03-17 03:41:22 +08:00
|
|
|
MODULE_AUTHOR("Seth Forshee <seth.forshee@canonical.com>");
|
|
|
|
MODULE_DESCRIPTION("Apple Gmux Driver");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DEVICE_TABLE(pnp, gmux_device_ids);
|