2015-05-25 20:13:17 +08:00
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/*
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* Hardkernel Odroid XU3 board device tree source
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*
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* Copyright (c) 2014 Collabora Ltd.
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* Copyright (c) 2013 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/clock/samsung,s2mps11.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/sound/samsung-i2s.h>
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#include "exynos5800.dtsi"
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2015-07-30 22:11:00 +08:00
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#include "exynos5422-cpus.dtsi"
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2015-06-15 10:53:23 +08:00
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#include "exynos5422-cpu-thermal.dtsi"
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2015-05-25 20:13:17 +08:00
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/ {
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memory {
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reg = <0x40000000 0x7EA00000>;
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};
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chosen {
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linux,stdout-path = &serial_2;
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};
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firmware@02073000 {
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compatible = "samsung,secure-firmware";
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reg = <0x02073000 0x1000>;
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};
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fixed-rate-clocks {
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oscclk {
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compatible = "samsung,exynos5420-oscclk";
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clock-frequency = <24000000>;
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};
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};
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emmc_pwrseq: pwrseq {
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pinctrl-0 = <&emmc_nrst_pin>;
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pinctrl-names = "default";
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compatible = "mmc-pwrseq-emmc";
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2015-10-08 06:39:58 +08:00
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reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
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2015-05-25 20:13:17 +08:00
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};
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2015-06-15 10:53:20 +08:00
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fan0: pwm-fan {
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compatible = "pwm-fan";
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pwms = <&pwm 0 20972 0>;
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cooling-min-state = <0>;
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cooling-max-state = <3>;
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#cooling-cells = <2>;
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cooling-levels = <0 130 170 230>;
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};
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2015-05-25 20:13:17 +08:00
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};
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2016-04-15 14:32:55 +08:00
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&bus_wcore {
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devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
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<&nocp_mem1_0>, <&nocp_mem1_1>;
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vdd-supply = <&buck3_reg>;
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exynos,saturation-ratio = <100>;
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status = "okay";
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};
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&bus_noc {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_fsys_apb {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_fsys {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_fsys2 {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_mfc {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_gen {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_peri {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_g2d {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_g2d_acp {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_jpeg {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_jpeg_apb {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_disp1_fimd {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_disp1 {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_gscl_scaler {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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&bus_mscl {
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devfreq = <&bus_wcore>;
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status = "okay";
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};
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2015-05-25 20:13:17 +08:00
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&clock_audss {
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assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
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<&clock_audss EXYNOS_MOUT_I2S>,
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<&clock_audss EXYNOS_DOUT_AUD_BUS>;
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assigned-clock-parents = <&clock CLK_FIN_PLL>,
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<&clock_audss EXYNOS_MOUT_AUDSS>;
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assigned-clock-rates = <0>,
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<0>,
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<19200000>;
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};
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2015-12-16 01:33:15 +08:00
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&cpu0 {
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cpu-supply = <&buck6_reg>;
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};
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&cpu4 {
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cpu-supply = <&buck2_reg>;
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};
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2015-05-25 20:13:17 +08:00
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&hdmi {
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status = "okay";
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2015-10-08 06:39:58 +08:00
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hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
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2015-05-25 20:13:17 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_hpd_irq>;
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vdd_osc-supply = <&ldo7_reg>;
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vdd_pll-supply = <&ldo6_reg>;
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vdd-supply = <&ldo6_reg>;
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};
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&hsi2c_4 {
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status = "okay";
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s2mps11_pmic@66 {
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compatible = "samsung,s2mps11-pmic";
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reg = <0x66>;
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2015-08-17 07:55:51 +08:00
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samsung,s2mps11-acokb-ground;
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2015-05-25 20:13:17 +08:00
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interrupt-parent = <&gpx0>;
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interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&s2mps11_irq>;
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s2mps11_osc: clocks {
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#clock-cells = <1>;
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clock-output-names = "s2mps11_ap",
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"s2mps11_cp", "s2mps11_bt";
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};
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regulators {
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ldo1_reg: LDO1 {
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regulator-name = "vdd_ldo1";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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ldo3_reg: LDO3 {
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2016-04-04 17:55:13 +08:00
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regulator-name = "vddq_mmc0";
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2015-05-25 20:13:17 +08:00
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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ldo5_reg: LDO5 {
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regulator-name = "vdd_ldo5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo6_reg: LDO6 {
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regulator-name = "vdd_ldo6";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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ldo7_reg: LDO7 {
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regulator-name = "vdd_ldo7";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo8_reg: LDO8 {
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regulator-name = "vdd_ldo8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo9_reg: LDO9 {
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regulator-name = "vdd_ldo9";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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ldo10_reg: LDO10 {
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regulator-name = "vdd_ldo10";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo11_reg: LDO11 {
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regulator-name = "vdd_ldo11";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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ldo12_reg: LDO12 {
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regulator-name = "vdd_ldo12";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo13_reg: LDO13 {
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2016-04-04 17:55:13 +08:00
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regulator-name = "vddq_mmc2";
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2015-05-25 20:13:17 +08:00
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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ldo15_reg: LDO15 {
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regulator-name = "vdd_ldo15";
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regulator-min-microvolt = <3100000>;
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regulator-max-microvolt = <3100000>;
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regulator-always-on;
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};
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ldo16_reg: LDO16 {
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regulator-name = "vdd_ldo16";
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regulator-min-microvolt = <2200000>;
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regulator-max-microvolt = <2200000>;
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regulator-always-on;
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};
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ldo17_reg: LDO17 {
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regulator-name = "tsp_avdd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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2016-04-04 17:55:13 +08:00
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ldo18_reg: LDO18 {
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regulator-name = "vdd_emmc_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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2015-05-25 20:13:17 +08:00
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ldo19_reg: LDO19 {
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regulator-name = "vdd_sd";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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ldo24_reg: LDO24 {
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regulator-name = "tsp_io";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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};
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ldo26_reg: LDO26 {
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regulator-name = "vdd_ldo26";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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buck1_reg: BUCK1 {
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regulator-name = "vdd_mif";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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buck2_reg: BUCK2 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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};
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buck3_reg: BUCK3 {
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|
|
|
|
regulator-name = "vdd_int";
|
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
|
regulator-max-microvolt = <1400000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
buck4_reg: BUCK4 {
|
|
|
|
|
regulator-name = "vdd_g3d";
|
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
|
regulator-max-microvolt = <1400000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
buck5_reg: BUCK5 {
|
|
|
|
|
regulator-name = "vdd_mem";
|
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
|
regulator-max-microvolt = <1400000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
buck6_reg: BUCK6 {
|
|
|
|
|
regulator-name = "vdd_kfc";
|
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
buck7_reg: BUCK7 {
|
|
|
|
|
regulator-name = "vdd_1.0v_ldo";
|
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
buck8_reg: BUCK8 {
|
|
|
|
|
regulator-name = "vdd_1.8v_ldo";
|
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
buck9_reg: BUCK9 {
|
|
|
|
|
regulator-name = "vdd_2.8v_ldo";
|
|
|
|
|
regulator-min-microvolt = <3000000>;
|
|
|
|
|
regulator-max-microvolt = <3750000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
buck10_reg: BUCK10 {
|
|
|
|
|
regulator-name = "vdd_vmem";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&i2c_2 {
|
|
|
|
|
samsung,i2c-sda-delay = <100>;
|
|
|
|
|
samsung,i2c-max-bus-freq = <66000>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
hdmiddc@50 {
|
|
|
|
|
compatible = "samsung,exynos4210-hdmiddc";
|
|
|
|
|
reg = <0x50>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&mfc {
|
|
|
|
|
samsung,mfc-r = <0x43000000 0x800000>;
|
|
|
|
|
samsung,mfc-l = <0x51000000 0x800000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&mmc_0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
mmc-pwrseq = <&emmc_pwrseq>;
|
|
|
|
|
cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
|
|
|
|
|
card-detect-delay = <200>;
|
|
|
|
|
samsung,dw-mshc-ciu-div = <3>;
|
|
|
|
|
samsung,dw-mshc-sdr-timing = <0 4>;
|
|
|
|
|
samsung,dw-mshc-ddr-timing = <0 2>;
|
|
|
|
|
samsung,dw-mshc-hs400-timing = <0 2>;
|
|
|
|
|
samsung,read-strobe-delay = <90>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
|
|
|
|
|
bus-width = <8>;
|
|
|
|
|
cap-mmc-highspeed;
|
|
|
|
|
mmc-hs200-1_8v;
|
|
|
|
|
mmc-hs400-1_8v;
|
2016-04-04 17:55:13 +08:00
|
|
|
vmmc-supply = <&ldo18_reg>;
|
|
|
|
|
vqmmc-supply = <&ldo3_reg>;
|
2015-05-25 20:13:17 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&mmc_2 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
card-detect-delay = <200>;
|
|
|
|
|
samsung,dw-mshc-ciu-div = <3>;
|
|
|
|
|
samsung,dw-mshc-sdr-timing = <0 4>;
|
|
|
|
|
samsung,dw-mshc-ddr-timing = <0 2>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
cap-sd-highspeed;
|
2016-04-04 17:55:13 +08:00
|
|
|
vmmc-supply = <&ldo19_reg>;
|
|
|
|
|
vqmmc-supply = <&ldo13_reg>;
|
2015-05-25 20:13:17 +08:00
|
|
|
};
|
|
|
|
|
|
2016-04-15 14:32:55 +08:00
|
|
|
&nocp_mem0_0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&nocp_mem0_1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&nocp_mem1_0 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&nocp_mem1_1 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2015-05-25 20:13:17 +08:00
|
|
|
&pinctrl_0 {
|
|
|
|
|
hdmi_hpd_irq: hdmi-hpd-irq {
|
|
|
|
|
samsung,pins = "gpx3-7";
|
|
|
|
|
samsung,pin-function = <0>;
|
|
|
|
|
samsung,pin-pud = <1>;
|
|
|
|
|
samsung,pin-drv = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
s2mps11_irq: s2mps11-irq {
|
|
|
|
|
samsung,pins = "gpx0-4";
|
|
|
|
|
samsung,pin-function = <0xf>;
|
|
|
|
|
samsung,pin-pud = <0>;
|
|
|
|
|
samsung,pin-drv = <0>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&pinctrl_1 {
|
|
|
|
|
emmc_nrst_pin: emmc-nrst {
|
|
|
|
|
samsung,pins = "gpd1-0";
|
|
|
|
|
samsung,pin-function = <0>;
|
|
|
|
|
samsung,pin-pud = <0>;
|
|
|
|
|
samsung,pin-drv = <0>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2015-06-15 10:53:21 +08:00
|
|
|
&tmu_cpu0 {
|
|
|
|
|
vtmu-supply = <&ldo7_reg>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&tmu_cpu1 {
|
|
|
|
|
vtmu-supply = <&ldo7_reg>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&tmu_cpu2 {
|
|
|
|
|
vtmu-supply = <&ldo7_reg>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&tmu_cpu3 {
|
|
|
|
|
vtmu-supply = <&ldo7_reg>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&tmu_gpu {
|
|
|
|
|
vtmu-supply = <&ldo7_reg>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2015-05-25 20:13:17 +08:00
|
|
|
&rtc {
|
|
|
|
|
status = "okay";
|
|
|
|
|
clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
|
|
|
|
|
clock-names = "rtc", "rtc_src";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usbdrd_dwc3_0 {
|
|
|
|
|
dr_mode = "host";
|
|
|
|
|
};
|
|
|
|
|
|
2015-09-16 07:37:11 +08:00
|
|
|
/* usbdrd_dwc3_1 mode customized in each board */
|
2015-06-07 19:53:47 +08:00
|
|
|
|
|
|
|
|
&usbdrd3_0 {
|
|
|
|
|
vdd33-supply = <&ldo9_reg>;
|
|
|
|
|
vdd10-supply = <&ldo11_reg>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usbdrd3_1 {
|
|
|
|
|
vdd33-supply = <&ldo9_reg>;
|
|
|
|
|
vdd10-supply = <&ldo11_reg>;
|
|
|
|
|
};
|
