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linux/drivers/i2c/busses/i2c-designware-core.h

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i2c: designware: Add SPDX license tag Replace short statement in comment with proper SPDX license tag. Note, for i2c-desingware-slave.c the identifier is chosen in accordance with MODULE_LICENSE() macro since it is visible to user. Another point to this choice is that the header seems to be copy'n'paste from the other file of this very driver. Acked-by: Luis Oliveira <Luis.Oliveira@synopsys.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-08-10 18:26:49 +08:00
/* SPDX-License-Identifier: GPL-2.0-or-later */
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
/*
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
* Synopsys DesignWare I2C adapter driver.
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
*
* Based on the TI DAVINCI I2C adapter driver.
*
* Copyright (C) 2006 Texas Instruments.
* Copyright (C) 2007 MontaVista Software Inc.
* Copyright (C) 2009 Provigent Ltd.
*/
i2c: designware: Consolidate default functionality bits Use a common place for default functionality bits for both platform and pci driver. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-21 18:43:20 +08:00
#include <linux/i2c.h>
#define DW_IC_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C | \
I2C_FUNC_SMBUS_BYTE | \
I2C_FUNC_SMBUS_BYTE_DATA | \
I2C_FUNC_SMBUS_WORD_DATA | \
I2C_FUNC_SMBUS_BLOCK_DATA | \
I2C_FUNC_SMBUS_I2C_BLOCK)
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
#define DW_IC_CON_MASTER 0x1
#define DW_IC_CON_SPEED_STD 0x2
#define DW_IC_CON_SPEED_FAST 0x4
i2c: designware: Enable high speed mode This patch enabled high speed mode. High speed mode can be turn on by setting the clk_freq to 3400000. High speed HCNT and LCNT are needed as there is no default value provided. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-08-12 22:02:51 +08:00
#define DW_IC_CON_SPEED_HIGH 0x6
i2c: designware-pci: Make bus number allocation robust On some platforms, such as Intel Medfield, the I2C slave devices are enumerated through SFI tables where bus numbering is expected to be defined in the OS. Make the bus number allocation robust for such platforms. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-06-15 23:05:05 +08:00
#define DW_IC_CON_SPEED_MASK 0x6
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define DW_IC_CON_10BITADDR_SLAVE 0x8
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
#define DW_IC_CON_10BITADDR_MASTER 0x10
#define DW_IC_CON_RESTART_EN 0x20
#define DW_IC_CON_SLAVE_DISABLE 0x40
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define DW_IC_CON_STOP_DET_IFADDRESSED 0x80
#define DW_IC_CON_TX_EMPTY_CTRL 0x100
#define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL 0x200
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
/*
* Registers offset
*/
#define DW_IC_CON 0x0
#define DW_IC_TAR 0x4
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define DW_IC_SAR 0x8
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
#define DW_IC_DATA_CMD 0x10
#define DW_IC_SS_SCL_HCNT 0x14
#define DW_IC_SS_SCL_LCNT 0x18
#define DW_IC_FS_SCL_HCNT 0x1c
#define DW_IC_FS_SCL_LCNT 0x20
#define DW_IC_HS_SCL_HCNT 0x24
#define DW_IC_HS_SCL_LCNT 0x28
#define DW_IC_INTR_STAT 0x2c
#define DW_IC_INTR_MASK 0x30
#define DW_IC_RAW_INTR_STAT 0x34
#define DW_IC_RX_TL 0x38
#define DW_IC_TX_TL 0x3c
#define DW_IC_CLR_INTR 0x40
#define DW_IC_CLR_RX_UNDER 0x44
#define DW_IC_CLR_RX_OVER 0x48
#define DW_IC_CLR_TX_OVER 0x4c
#define DW_IC_CLR_RD_REQ 0x50
#define DW_IC_CLR_TX_ABRT 0x54
#define DW_IC_CLR_RX_DONE 0x58
#define DW_IC_CLR_ACTIVITY 0x5c
#define DW_IC_CLR_STOP_DET 0x60
#define DW_IC_CLR_START_DET 0x64
#define DW_IC_CLR_GEN_CALL 0x68
#define DW_IC_ENABLE 0x6c
#define DW_IC_STATUS 0x70
#define DW_IC_TXFLR 0x74
#define DW_IC_RXFLR 0x78
#define DW_IC_SDA_HOLD 0x7c
#define DW_IC_TX_ABRT_SOURCE 0x80
#define DW_IC_ENABLE_STATUS 0x9c
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define DW_IC_CLR_RESTART_DET 0xa8
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
#define DW_IC_COMP_PARAM_1 0xf4
#define DW_IC_COMP_VERSION 0xf8
#define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A
#define DW_IC_COMP_TYPE 0xfc
#define DW_IC_COMP_TYPE_VALUE 0x44570140
#define DW_IC_INTR_RX_UNDER 0x001
#define DW_IC_INTR_RX_OVER 0x002
#define DW_IC_INTR_RX_FULL 0x004
#define DW_IC_INTR_TX_OVER 0x008
#define DW_IC_INTR_TX_EMPTY 0x010
#define DW_IC_INTR_RD_REQ 0x020
#define DW_IC_INTR_TX_ABRT 0x040
#define DW_IC_INTR_RX_DONE 0x080
#define DW_IC_INTR_ACTIVITY 0x100
#define DW_IC_INTR_STOP_DET 0x200
#define DW_IC_INTR_START_DET 0x400
#define DW_IC_INTR_GEN_CALL 0x800
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define DW_IC_INTR_RESTART_DET 0x1000
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \
DW_IC_INTR_TX_ABRT | \
DW_IC_INTR_STOP_DET)
#define DW_IC_INTR_MASTER_MASK (DW_IC_INTR_DEFAULT_MASK | \
DW_IC_INTR_TX_EMPTY)
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define DW_IC_INTR_SLAVE_MASK (DW_IC_INTR_DEFAULT_MASK | \
DW_IC_INTR_RX_DONE | \
DW_IC_INTR_RX_UNDER | \
DW_IC_INTR_RD_REQ)
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
#define DW_IC_STATUS_ACTIVITY 0x1
#define DW_IC_STATUS_TFE BIT(2)
#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6)
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
#define DW_IC_SDA_HOLD_RX_SHIFT 16
#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, DW_IC_SDA_HOLD_RX_SHIFT)
#define DW_IC_ERR_TX_ABRT 0x1
#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
#define DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH (BIT(2) | BIT(3))
#define DW_IC_COMP_PARAM_1_SPEED_MODE_MASK GENMASK(3, 2)
/*
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
* status codes
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
*/
#define STATUS_IDLE 0x0
#define STATUS_WRITE_IN_PROGRESS 0x1
#define STATUS_READ_IN_PROGRESS 0x2
#define TIMEOUT 20 /* ms */
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
/*
* operation modes
*/
#define DW_IC_MASTER 0
#define DW_IC_SLAVE 1
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
/*
* Hardware abort codes from the DW_IC_TX_ABRT_SOURCE register
*
* Only expected abort codes are listed here
* refer to the datasheet for the full list
*/
#define ABRT_7B_ADDR_NOACK 0
#define ABRT_10ADDR1_NOACK 1
#define ABRT_10ADDR2_NOACK 2
#define ABRT_TXDATA_NOACK 3
#define ABRT_GCALL_NOACK 4
#define ABRT_GCALL_READ 5
#define ABRT_SBYTE_ACKDET 7
#define ABRT_SBYTE_NORSTRT 9
#define ABRT_10B_RD_NORSTRT 10
#define ABRT_MASTER_DIS 11
#define ARB_LOST 12
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define ABRT_SLAVE_FLUSH_TXFIFO 13
#define ABRT_SLAVE_ARBLOST 14
#define ABRT_SLAVE_RD_INTX 15
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK)
#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK)
#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK)
#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK)
#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK)
#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ)
#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET)
#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT)
#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT)
#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS)
#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST)
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
#define DW_IC_RX_ABRT_SLAVE_RD_INTX (1UL << ABRT_SLAVE_RD_INTX)
#define DW_IC_RX_ABRT_SLAVE_ARBLOST (1UL << ABRT_SLAVE_ARBLOST)
#define DW_IC_RX_ABRT_SLAVE_FLUSH_TXFIFO (1UL << ABRT_SLAVE_FLUSH_TXFIFO)
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \
DW_IC_TX_ABRT_10ADDR1_NOACK | \
DW_IC_TX_ABRT_10ADDR2_NOACK | \
DW_IC_TX_ABRT_TXDATA_NOACK | \
DW_IC_TX_ABRT_GCALL_NOACK)
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
/**
* struct dw_i2c_dev - private i2c-designware data
* @dev: driver model device node
* @base: IO registers pointer
* @cmd_complete: tx completion indicator
* @clk: input reference clock
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
* @slave: represent an I2C slave device
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
* @cmd_err: run time hadware error code
i2c: designware: Cleaning and comment style fixes. The purpose of this commit is to fix some comments and styling in the existing code due to the need of reuse this code. What is being made here is: - Sorted the headers files - Corrected some comments style (capital letters, lowcase i2c) - Reverse tree in the variables declaration - Add/remove empty lines and tabs where needed - Fix of misspelled word "endianness" and "transferred" - Replaced the return variable "r" with the more standard "ret" The value of this, besides the rules of coding style, is because I will use this code after and it will make my future patch a lot bigger and complicated to review. The work here won't bring any additional work to backported fixes because is just style and reordering. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:21 +08:00
* @msgs: points to an array of messages currently being transferred
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
* @msgs_num: the number of elements in msgs
* @msg_write_idx: the element index of the current tx message in the msgs
* array
* @tx_buf_len: the length of the current tx buffer
* @tx_buf: the current tx buffer
* @msg_read_idx: the element index of the current rx message in the msgs
* array
* @rx_buf_len: the length of the current rx buffer
* @rx_buf: the current rx buffer
* @msg_err: error status of the current transfer
* @status: i2c master status, one of STATUS_*
* @abort_source: copy of the TX_ABRT_SOURCE register
* @irq: interrupt number for the i2c master
* @adapter: i2c subsystem adapter node
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
* @slave_cfg: configuration for the slave device
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
* @tx_fifo_depth: depth of the hardware tx fifo
* @rx_fifo_depth: depth of the hardware rx fifo
i2c: designware: fix RX FIFO overrun i2c_dw_xfer_msg() pushes a number of bytes to transmit/receive to/from the bus into the TX FIFO. For master-rx transactions, the maximum amount of data that can be received is calculated depending solely on TX and RX FIFO load. This is racy - TX FIFO may contain master-rx data yet to be processed, which will eventually land into the RX FIFO. This data is not taken into account and the function may request more data than the controller is actually capable of storing. This patch ensures the driver takes into account the outstanding master-rx data in TX FIFO to prevent RX FIFO overrun. Signed-off-by: Josef Ahmad <josef.ahmad@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2013-04-20 00:28:10 +08:00
* @rx_outstanding: current master-rx elements in tx fifo
i2c: designware: Convert to use struct i2c_timings Instead of using custom variables and parser, convert the driver to use the ones provided by I2C core. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Tested-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-07-25 22:39:26 +08:00
* @timings: bus clock frequency, SDA hold and other timings
* @sda_hold_time: SDA hold value
i2c: designware: make HCNT/LCNT values configurable The DesignWare I2C controller has high count (HCNT) and low count (LCNT) registers for each of the I2C speed modes (standard and fast). These registers are programmed based on the input clock speed in the driver. The current code calculates these values based on the input clock speed and tries hard to meet the I2C bus timing requirements. This could result non-optimal values with regarding to the bus speed. For example on Intel BayTrail we get bus speed of 315.41kHz which is ~20% slower than we would expect (400kHz) in fast mode (even though the timing requirements are met). This patch makes it possible for the platform code to pass more optimal HCNT/LCNT values to the core driver if they are known beforehand. If these are not set we use the calculated and more conservative values. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Shinya Kuribayashi <skuribay@pobox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-08-19 20:07:53 +08:00
* @ss_hcnt: standard speed HCNT value
* @ss_lcnt: standard speed LCNT value
* @fs_hcnt: fast speed HCNT value
* @fs_lcnt: fast speed LCNT value
i2c: designware: get fast plus and high speed *CNT configuration I2C designware controller can run at fast mode plus and high speed. This patch adds the capability to get the HCNT, LCNT configuration via FPCN (fast plus) and HSCN (high speed) ACPI method. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-08-12 22:02:48 +08:00
* @fp_hcnt: fast plus HCNT value
* @fp_lcnt: fast plus LCNT value
* @hs_hcnt: high speed HCNT value
* @hs_lcnt: high speed LCNT value
i2c: designware: Add i2c bus locking support Adds support for acquiring and releasing a hardware bus lock in the i2c designware core transfer function. This is needed for i2c bus controllers that are shared with but not controlled by the kernel. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-01-15 17:12:16 +08:00
* @acquire_lock: function to acquire a hardware lock on the bus
* @release_lock: function to release a hardware lock on the bus
i2c: designware: Remove Cherry Trail PMIC I2C bus pm_disabled workaround Commit a3d411fb38c0 ("i2c: designware: Disable pm for PMIC i2c-bus even if there is no _SEM method"), always set the pm_disabled flag on the I2C7 controller, even if its bus was not shared with the PUNIT. This was a workaround for various suspend/resume issues, after the following 2 commits this workaround is no longer necessary: Commit 541527728341 ("PM: i2c-designware-platdrv: Suspend/resume at the late/early stages") Commit e6ce0ce34f65 ("ACPI / LPSS: Add device link for CHT SD card dependency on I2C") Therefor this commit removes this workaround. After this commit the pm_disabled flag is only used to indicate that the bus is shared with the PUNIT and after other recent changes we no longer call dev_pm_syscore_device(dev, true), so we are no longer actually disabling (non-runtime) pm, so this commit also renames the flag to shared_with_punit to better reflect what it is for. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-09-06 03:51:31 +08:00
* @shared_with_punit: true if this bus is shared with the SoCs PUNIT
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
* @disable: function to disable the controller
* @disable_int: function to disable all interrupts
* @init: function to initialize the I2C hardware
i2c: designware: enable SLAVE in platform module - Slave mode selected in platform module if the support is detected in the DT. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-22 18:17:33 +08:00
* @mode: operation mode - DW_IC_MASTER or DW_IC_SLAVE
i2c: designware: Do not allow i2c_dw_xfer() calls while suspended On most Intel Bay- and Cherry-Trail systems the PMIC is connected over I2C and the PMIC is accessed through various means by the _PS0 and _PS3 ACPI methods (power on / off methods) of various devices. This leads to suspend/resume ordering problems where a device may be resumed and get its _PS0 method executed before the I2C controller is resumed. On Cherry Trail this leads to errors like these: i2c_designware 808622C1:06: controller timed out ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion] ACPI Error: Method parse/execution failed \_SB.P18W._ON, AE_ERROR video LNXVIDEO:00: Failed to change power state to D0 But on Bay Trail this caused I2C reads to seem to succeed, but they end up returning wrong data, which ends up getting written back by the typical read-modify-write cycle done to turn on various power-resources. Debugging the problems caused by this silent data corruption is quite nasty. This commit adds a check which disallows i2c_dw_xfer() calls to happen until the controller's resume method has completed. Which turns the silent data corruption into getting these errors in dmesg instead: i2c_designware 80860F41:04: Error i2c_dw_xfer call while suspended ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion] ACPI Error: Method parse/execution failed \_SB.PCI0.GFX0._PS0, AE_ERROR Which is much better. Note the above errors are an example of issues which this patch will help to debug, the actual fix requires fixing the suspend order and this has been fixed by a different commit. Note the setting / clearing of the suspended flag in the suspend / resume methods is NOT protected by i2c_lock_bus(). This is intentional as these methods get called from i2c_dw_xfer() (through pm_runtime_get/put) a nd i2c_dw_xfer() is called with the i2c_bus_lock held, so otherwise we would deadlock. This means that there is a theoretical race between a non runtime suspend and the suspended check in i2c_dw_xfer(), this is not a problem since normally we should not hit the race and this check is primarily a debugging tool so hitting the check if there are suspend/resume ordering problems does not need to be 100% reliable. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-02-22 21:08:40 +08:00
* @suspended: set to true if the controller is suspended
i2c: designware: make HCNT/LCNT values configurable The DesignWare I2C controller has high count (HCNT) and low count (LCNT) registers for each of the I2C speed modes (standard and fast). These registers are programmed based on the input clock speed in the driver. The current code calculates these values based on the input clock speed and tries hard to meet the I2C bus timing requirements. This could result non-optimal values with regarding to the bus speed. For example on Intel BayTrail we get bus speed of 315.41kHz which is ~20% slower than we would expect (400kHz) in fast mode (even though the timing requirements are met). This patch makes it possible for the platform code to pass more optimal HCNT/LCNT values to the core driver if they are known beforehand. If these are not set we use the calculated and more conservative values. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Shinya Kuribayashi <skuribay@pobox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-08-19 20:07:53 +08:00
*
* HCNT and LCNT parameters can be used if the platform knows more accurate
* values than the one computed based only on the input clock frequency.
* Leave them to be %0 if not used.
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
*/
struct dw_i2c_dev {
struct device *dev;
void __iomem *base;
i2c: designware: add MSCC Ocelot support The Microsemi Ocelot I2C controller is a designware IP. It also has a second set of registers to allow tweaking SDA hold time and spike filtering. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [wsa: made one function static] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-08-31 23:11:12 +08:00
void __iomem *ext;
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
struct completion cmd_complete;
struct clk *clk;
i2c: designware: add reset interface Some platforms like hi3660 need do reset first to allow accessing registers Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Ramiro Oliveira <ramiro.oliveira@synopsys.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-12-27 22:22:40 +08:00
struct reset_control *rst;
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
struct i2c_client *slave;
i2c-designware: Move retriveving the clock speed out of core code. The clock frequecy supplied to the IP core is specific to a single instance of the driver. This patch makes it possible to have multiple Designware I2C cores in the system possibly running at different core frequencies. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-07 02:26:30 +08:00
u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev);
i2c-designware: Add support for Designware core behind PCI devices. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-07 02:26:35 +08:00
struct dw_pci_controller *controller;
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
int cmd_err;
struct i2c_msg *msgs;
int msgs_num;
int msg_write_idx;
u32 tx_buf_len;
u8 *tx_buf;
int msg_read_idx;
u32 rx_buf_len;
u8 *rx_buf;
int msg_err;
unsigned int status;
u32 abort_source;
int irq;
i2c: designware: Rename accessor_flags to flags Rename accessor_flags to flags, so that we can use the field for other flags too. This is a preparation patch for adding cherrytrail support to the punit semaphore code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Takashi Iwai <tiwai@suse.de> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-4-hdegoede@redhat.com
2017-02-10 18:27:53 +08:00
u32 flags;
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
struct i2c_adapter adapter;
i2c-designware: move i2c functionality bit field to be adapter specific The functionality of the adapter depends on the configuration of the IP block at silicon compile time and is adapter specific. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-07 02:26:31 +08:00
u32 functionality;
i2c-designware: move controller config to bus specific portion of driver With multiple I2C adapters possible in the system each running at (possibly) different speeds we need to move the controller configuration bit field to the adapter. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-07 02:26:32 +08:00
u32 master_cfg;
i2c: designware: introducing I2C_SLAVE definitions - Definitions were added to core library - A example was added to designware-core.txt Documentation that shows how the slave can be setup using DTS SLAVE related definitions were added to the core of the controller. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:24 +08:00
u32 slave_cfg;
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
unsigned int tx_fifo_depth;
unsigned int rx_fifo_depth;
i2c: designware: fix RX FIFO overrun i2c_dw_xfer_msg() pushes a number of bytes to transmit/receive to/from the bus into the TX FIFO. For master-rx transactions, the maximum amount of data that can be received is calculated depending solely on TX and RX FIFO load. This is racy - TX FIFO may contain master-rx data yet to be processed, which will eventually land into the RX FIFO. This data is not taken into account and the function may request more data than the controller is actually capable of storing. This patch ensures the driver takes into account the outstanding master-rx data in TX FIFO to prevent RX FIFO overrun. Signed-off-by: Josef Ahmad <josef.ahmad@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2013-04-20 00:28:10 +08:00
int rx_outstanding;
i2c: designware: Convert to use struct i2c_timings Instead of using custom variables and parser, convert the driver to use the ones provided by I2C core. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Tested-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-07-25 22:39:26 +08:00
struct i2c_timings timings;
i2c-designware: make SDA hold time configurable This patch makes the SDA hold time configurable through device tree. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-06-26 16:55:06 +08:00
u32 sda_hold_time;
i2c: designware: make HCNT/LCNT values configurable The DesignWare I2C controller has high count (HCNT) and low count (LCNT) registers for each of the I2C speed modes (standard and fast). These registers are programmed based on the input clock speed in the driver. The current code calculates these values based on the input clock speed and tries hard to meet the I2C bus timing requirements. This could result non-optimal values with regarding to the bus speed. For example on Intel BayTrail we get bus speed of 315.41kHz which is ~20% slower than we would expect (400kHz) in fast mode (even though the timing requirements are met). This patch makes it possible for the platform code to pass more optimal HCNT/LCNT values to the core driver if they are known beforehand. If these are not set we use the calculated and more conservative values. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Shinya Kuribayashi <skuribay@pobox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-08-19 20:07:53 +08:00
u16 ss_hcnt;
u16 ss_lcnt;
u16 fs_hcnt;
u16 fs_lcnt;
i2c: designware: get fast plus and high speed *CNT configuration I2C designware controller can run at fast mode plus and high speed. This patch adds the capability to get the HCNT, LCNT configuration via FPCN (fast plus) and HSCN (high speed) ACPI method. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-08-12 22:02:48 +08:00
u16 fp_hcnt;
u16 fp_lcnt;
u16 hs_hcnt;
u16 hs_lcnt;
i2c: designware: Cleanup bus lock handling Now that most of the special Bay- / Cherry-Trail bus lock handling has been moved to the iosf_mbi code we can simplify the remaining code a bit. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-10-11 22:29:11 +08:00
int (*acquire_lock)(void);
void (*release_lock)(void);
i2c: designware: Remove Cherry Trail PMIC I2C bus pm_disabled workaround Commit a3d411fb38c0 ("i2c: designware: Disable pm for PMIC i2c-bus even if there is no _SEM method"), always set the pm_disabled flag on the I2C7 controller, even if its bus was not shared with the PUNIT. This was a workaround for various suspend/resume issues, after the following 2 commits this workaround is no longer necessary: Commit 541527728341 ("PM: i2c-designware-platdrv: Suspend/resume at the late/early stages") Commit e6ce0ce34f65 ("ACPI / LPSS: Add device link for CHT SD card dependency on I2C") Therefor this commit removes this workaround. After this commit the pm_disabled flag is only used to indicate that the bus is shared with the PUNIT and after other recent changes we no longer call dev_pm_syscore_device(dev, true), so we are no longer actually disabling (non-runtime) pm, so this commit also renames the flag to shared_with_punit to better reflect what it is for. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-09-06 03:51:31 +08:00
bool shared_with_punit;
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
void (*disable)(struct dw_i2c_dev *dev);
void (*disable_int)(struct dw_i2c_dev *dev);
int (*init)(struct dw_i2c_dev *dev);
i2c: designware: allow IP specific sda_hold_time Because some old designware IPs were not supporting setting an SDA hold time, vendors developed their own solution. Add a way for the final driver to provide its own SDA hold time handling. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-08-31 23:11:10 +08:00
int (*set_sda_hold_time)(struct dw_i2c_dev *dev);
i2c: designware: enable SLAVE in platform module - Slave mode selected in platform module if the support is detected in the DT. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-22 18:17:33 +08:00
int mode;
i2c: designware: add i2c gpio recovery option This patch contains much input from Phil Reid and has been tested on Intel/Altera Cyclone V SOC Hardware with Altera GPIO's for the SCL and SDA GPIO's. Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Tim Sander <tim@krieglstein.org> Signed-off-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-11-02 10:40:27 +08:00
struct i2c_bus_recovery_info rinfo;
i2c: designware: Do not allow i2c_dw_xfer() calls while suspended On most Intel Bay- and Cherry-Trail systems the PMIC is connected over I2C and the PMIC is accessed through various means by the _PS0 and _PS3 ACPI methods (power on / off methods) of various devices. This leads to suspend/resume ordering problems where a device may be resumed and get its _PS0 method executed before the I2C controller is resumed. On Cherry Trail this leads to errors like these: i2c_designware 808622C1:06: controller timed out ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion] ACPI Error: Method parse/execution failed \_SB.P18W._ON, AE_ERROR video LNXVIDEO:00: Failed to change power state to D0 But on Bay Trail this caused I2C reads to seem to succeed, but they end up returning wrong data, which ends up getting written back by the typical read-modify-write cycle done to turn on various power-resources. Debugging the problems caused by this silent data corruption is quite nasty. This commit adds a check which disallows i2c_dw_xfer() calls to happen until the controller's resume method has completed. Which turns the silent data corruption into getting these errors in dmesg instead: i2c_designware 80860F41:04: Error i2c_dw_xfer call while suspended ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion] ACPI Error: Method parse/execution failed \_SB.PCI0.GFX0._PS0, AE_ERROR Which is much better. Note the above errors are an example of issues which this patch will help to debug, the actual fix requires fixing the suspend order and this has been fixed by a different commit. Note the setting / clearing of the suspended flag in the suspend / resume methods is NOT protected by i2c_lock_bus(). This is intentional as these methods get called from i2c_dw_xfer() (through pm_runtime_get/put) a nd i2c_dw_xfer() is called with the i2c_bus_lock held, so otherwise we would deadlock. This means that there is a theoretical race between a non runtime suspend and the suspended check in i2c_dw_xfer(), this is not a problem since normally we should not hit the race and this check is primarily a debugging tool so hitting the check if there are suspend/resume ordering problems does not need to be 100% reliable. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-02-22 21:08:40 +08:00
bool suspended;
i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-29 17:57:23 +08:00
};
i2c: designware: Add support for 16bit register access The STM SPEAr platform can only access the i2c controller register via 16bit read/write functions. This patch adds support to automatically detect this 16bit access mode. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-18 21:01:41 +08:00
#define ACCESS_SWAP 0x00000001
#define ACCESS_16BIT 0x00000002
i2c: designware: fix IO timeout issue for AMD controller Because of some hardware limitation, AMD I2C controller can't trigger pending interrupt if interrupt status has been changed after clearing interrupt status bits. Then, I2C will lost interrupt and IO timeout. According to hardware design, this patch implements a workaround to disable i2c controller interrupt and re-enable i2c interrupt before exiting ISR. To reduce the performance impacts on other vendors, use unlikely function to check flag in ISR. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2015-12-11 20:02:53 +08:00
#define ACCESS_INTR_MASK 0x00000004
i2c: designware: Set IRQF_NO_SUSPEND flag for all BYT and CHT controllers On some Cherry Trail systems the GPU ACPI fwnode has power-resources which point to the PMIC, which is connected over a LPSS I2C controller. The GPU is a PCI device and PCI devices are powered-on at the resume_noirq resume phase. Since the GPU power-resources need the I2C controller, recent acpi_lpss.c changes now also power-up the LPSS I2C controllers on BYT and CHT devices in the resume_noirq resume phase. But during this phase the IRQ of the controller is disabled leading to these errors: i2c_designware 808622C1:06: controller timed out ACPI Error: AE_ERROR, Returned by Handler for [UserDefinedRegion] ACPI Error: Method parse/execution failed \_SB.P18W._ON, AE_ERROR video LNXVIDEO:00: Failed to change power state to D0 This commit makes the i2c-designware controller set the IRQF_NO_SUSPEND flag when requesting the interrupt on BYT and CHT devices, so that the IRQ is left enabled during the noirq phase, fixing this. Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-10-06 16:25:39 +08:00
#define ACCESS_NO_IRQ_SUSPEND 0x00000008
i2c: designware: Add support for 16bit register access The STM SPEAr platform can only access the i2c controller register via 16bit read/write functions. This patch adds support to automatically detect this 16bit access mode. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-04-18 21:01:41 +08:00
i2c: designware-baytrail: Add support for cherrytrail The cherrytrail punit has the pmic i2c bus access semaphore at a different register address. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Tested-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-9-hdegoede@redhat.com
2017-02-10 18:27:58 +08:00
#define MODEL_CHERRYTRAIL 0x00000100
i2c: designware: add MSCC Ocelot support The Microsemi Ocelot I2C controller is a designware IP. It also has a second set of registers to allow tweaking SDA hold time and spike filtering. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [wsa: made one function static] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-08-31 23:11:12 +08:00
#define MODEL_MSCC_OCELOT 0x00000200
#define MODEL_MASK 0x00000f00
i2c: designware-baytrail: Add support for cherrytrail The cherrytrail punit has the pmic i2c bus access semaphore at a different register address. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Tested-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-9-hdegoede@redhat.com
2017-02-10 18:27:58 +08:00
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
u32 dw_readl(struct dw_i2c_dev *dev, int offset);
void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset);
i2c: designware: Move register access detection to common code Move register access detection out from master and slave HW initialization code to common code. Motivation for this is to have register access configured before HW initialization and remove duplicated code. This allows to do further separation between probe time initialization and runtime reinitialization code. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-06-19 19:23:19 +08:00
int i2c_dw_set_reg_access(struct dw_i2c_dev *dev);
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset);
u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset);
i2c: designware: Move SDA hold time configuration to common code SDA hold time configuration is common to both master and slave code. It is also something that can be done once during probe and do only register write when HW needs to be reinitialized. Remove duplication and move SDA hold time configuration to common code. It will be called from slave probe and for master code from a new i2c_dw_set_timings_master() to where we will populate more probe time timing parameter setting. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-06-19 19:23:22 +08:00
int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev);
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
unsigned long i2c_dw_clk_rate(struct dw_i2c_dev *dev);
i2c: designware: rename i2c_dw_plat_prepare_clk to i2c_dw_prepare_clk For consistency with the rest of the file rename function and parameter to be consistent with the reset of the common file. Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-11-02 10:40:26 +08:00
int i2c_dw_prepare_clk(struct dw_i2c_dev *dev, bool prepare);
i2c: designware: MASTER mode as separated driver - The functions related to I2C master mode of operation were transformed in a single driver. - Common definitions were moved to i2c-designware-core.h - The i2c-designware-core is now only a library file, the functions associated are in a source file called i2c-designware-common and are used by both i2c-designware-master and i2c-designware-slave. - To decrease noise in namespace common i2c_dw_*() functions are now using ops to keep them private. - Designware PCI driver had to be changed to match the previous ops functions implementation. Almost all of the "core" source is now part of the "master" source. The difference is the functions used by both modes and they are in the "common" source file. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-14 18:43:23 +08:00
int i2c_dw_acquire_lock(struct dw_i2c_dev *dev);
void i2c_dw_release_lock(struct dw_i2c_dev *dev);
int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev);
int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev);
u32 i2c_dw_func(struct i2c_adapter *adap);
void i2c_dw_disable(struct dw_i2c_dev *dev);
void i2c_dw_disable_int(struct dw_i2c_dev *dev);
i2c: designware: refactor low-level enable/disable Low-level controller enable function __i2c_dw_enable is overloaded to also handle disabling. What's worse, even though the documentation requires polling the IC_ENABLE_STATUS register when disabling, this is not done: polling needs to be requested specifically by calling __i2c_dw_enable_and_wait, which can also poll on enabling, but that doesn't work if the IC_ENABLE_STATUS register is not implemented. This is quite confusing if not in fact backwards. Especially since the documentation says that disabling should be followed by polling, the driver should be using a separate function where it does one-shot disables to make the optimization stand out. This refactors the two functions so that requested status is given in the name rather than in a boolean argument. Specifically: - __i2c_dw_enable: enable without polling (in accordance with docs) - __i2c_dw_disable: disable and do poll (also as suggested by docs) - __i2c_dw_disable_nowait: disable without polling (Linux-specific) No functional change. Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> [wsa: fixed blank lines in header file] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-04-28 21:56:07 +08:00
static inline void __i2c_dw_enable(struct dw_i2c_dev *dev)
{
dw_writel(dev, 1, DW_IC_ENABLE);
}
static inline void __i2c_dw_disable_nowait(struct dw_i2c_dev *dev)
{
dw_writel(dev, 0, DW_IC_ENABLE);
}
void __i2c_dw_disable(struct dw_i2c_dev *dev);
i2c-designware: Push all register reads/writes into the core code. Move all register manipulation code into the core, also move register offset definitions to i2c-designware-core.c since the bus specific portions of the driver no longer need/use them. Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2011-10-07 02:26:34 +08:00
extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev);
i2c: designware: Move common probe code into i2c_dw_probe() There is some code duplication in i2c-designware-platdrv and i2c-designware-pcidrv probe functions. What is even worse that duplication requires i2c_dw_xfer(), i2c_dw_func() and i2c_dw_isr() i2c-designware-core functions to be exported. Therefore move common code into new i2c_dw_probe() and make functions above local to i2c-designware-core. While merging the code patch does following functional changes: - I2C Adapter name will be "Synopsys DesignWare I2C adapter". Previously it was used for platform and ACPI devices but PCI device used "i2c-designware-pci". - Using device name for interrupt name. Previous it was platform device name, ACPI device name or "i2c-designware-pci". - Error code from devm_request_irq() and i2c_add_numbered_adapter() will be printed in case of error. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-12 21:55:35 +08:00
extern int i2c_dw_probe(struct dw_i2c_dev *dev);
i2c: designware: Let slave adapter support be optional Only certain system configurations may use the I2C slave mode so let the support be optional. This allow reducing module size if needed: text data bss dec hex filename 10328 1336 16 11680 2da0 drivers/i2c/busses/i2c-designware-core.ko 7222 1136 8 8366 20ae drivers/i2c/busses/i2c-designware-core.ko Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Luis Oliveira <lolivei@synopsys.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-28 22:23:29 +08:00
#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_SLAVE)
i2c: designware: add SLAVE mode functions - Changes in Kconfig to enable I2C_DESIGNWARE_SLAVE support - Slave functions added to core library file - Slave abort sources added to common source file - New driver: i2c-designware-slave added - Changes in the Makefile to compile the I2C_DESIGNWARE_SLAVE module when supported by the architecture. All the SLAVE flow is added but it is not enabled via platform driver. Signed-off-by: Luis Oliveira <lolivei@synopsys.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> [wsa: made a function static and one-lined a message] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-22 18:17:32 +08:00
extern int i2c_dw_probe_slave(struct dw_i2c_dev *dev);
i2c: designware: Let slave adapter support be optional Only certain system configurations may use the I2C slave mode so let the support be optional. This allow reducing module size if needed: text data bss dec hex filename 10328 1336 16 11680 2da0 drivers/i2c/busses/i2c-designware-core.ko 7222 1136 8 8366 20ae drivers/i2c/busses/i2c-designware-core.ko Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Luis Oliveira <lolivei@synopsys.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-28 22:23:29 +08:00
#else
static inline int i2c_dw_probe_slave(struct dw_i2c_dev *dev) { return -EINVAL; }
#endif
i2c: designware: Add Intel Baytrail PMIC I2C bus support This patch implements an I2C bus sharing mechanism between the host and platform hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC. On these platforms access to the PMIC must be shared with platform hardware. The hardware unit assumes full control of the I2C bus and the host must request access through a special semaphore. Hardware control of the bus also makes it necessary to disable runtime pm to avoid interfering with hardware transactions. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-01-15 17:12:17 +08:00
#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL)
i2c: designware-baytrail: Disallow the CPU to enter C6 or C7 while holding the punit semaphore On my cherrytrail tablet with axp288 pmic, just doing a bunch of repeated reads from the pmic, e.g. "i2cdump -y 14 0x34" would lookup the tablet in 1 - 3 runs guaranteed. This seems to be causes by the cpu trying to enter C6 or C7 while we hold the punit bus semaphore, at which point everything just hangs. Avoid this by disallowing the CPU to enter C6 or C7 before acquiring the punit bus semaphore. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=109051 Signed-off-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-7-hdegoede@redhat.com
2017-02-10 18:27:56 +08:00
extern int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev);
i2c: designware: Add Intel Baytrail PMIC I2C bus support This patch implements an I2C bus sharing mechanism between the host and platform hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC. On these platforms access to the PMIC must be shared with platform hardware. The hardware unit assumes full control of the I2C bus and the host must request access through a special semaphore. Hardware control of the bus also makes it necessary to disable runtime pm to avoid interfering with hardware transactions. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-01-15 17:12:17 +08:00
#else
i2c: designware-baytrail: Disallow the CPU to enter C6 or C7 while holding the punit semaphore On my cherrytrail tablet with axp288 pmic, just doing a bunch of repeated reads from the pmic, e.g. "i2cdump -y 14 0x34" would lookup the tablet in 1 - 3 runs guaranteed. This seems to be causes by the cpu trying to enter C6 or C7 while we hold the punit bus semaphore, at which point everything just hangs. Avoid this by disallowing the CPU to enter C6 or C7 before acquiring the punit bus semaphore. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=109051 Signed-off-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-7-hdegoede@redhat.com
2017-02-10 18:27:56 +08:00
static inline int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev) { return 0; }
i2c: designware: Add Intel Baytrail PMIC I2C bus support This patch implements an I2C bus sharing mechanism between the host and platform hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC. On these platforms access to the PMIC must be shared with platform hardware. The hardware unit assumes full control of the I2C bus and the host must request access through a special semaphore. Hardware control of the bus also makes it necessary to disable runtime pm to avoid interfering with hardware transactions. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-01-15 17:12:17 +08:00
#endif