2007-07-10 05:06:53 +08:00
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/*
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2014-01-17 11:39:05 +08:00
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* Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
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2007-07-10 05:06:53 +08:00
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_COMMON_H__
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#define __ASM_ARCH_MXC_COMMON_H__
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2013-07-09 07:01:40 +08:00
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#include <linux/reboot.h>
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2013-10-16 19:52:00 +08:00
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struct irq_data;
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2008-09-09 16:19:40 +08:00
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struct platform_device;
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2013-05-08 21:05:53 +08:00
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struct pt_regs;
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2009-02-16 21:36:49 +08:00
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struct clk;
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2014-04-05 23:57:45 +08:00
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struct device_node;
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2011-09-06 15:08:40 +08:00
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enum mxc_cpu_pwr_mode;
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2014-07-07 17:41:26 +08:00
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struct of_device_id;
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2008-09-09 16:19:40 +08:00
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2013-10-16 21:05:35 +08:00
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void mx1_map_io(void);
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void mx21_map_io(void);
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void mx27_map_io(void);
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void mx31_map_io(void);
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void mx35_map_io(void);
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void imx1_init_early(void);
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void imx21_init_early(void);
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void imx27_init_early(void);
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void imx31_init_early(void);
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void imx35_init_early(void);
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void mxc_init_irq(void __iomem *);
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void mx1_init_irq(void);
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void mx21_init_irq(void);
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void mx27_init_irq(void);
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void mx31_init_irq(void);
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void mx35_init_irq(void);
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void imx1_soc_init(void);
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void imx21_soc_init(void);
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void imx27_soc_init(void);
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void imx31_soc_init(void);
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void imx35_soc_init(void);
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void epit_timer_init(void __iomem *base, int irq);
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int mx1_clocks_init(unsigned long fref);
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int mx21_clocks_init(unsigned long lref, unsigned long fref);
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int mx27_clocks_init(unsigned long fref);
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int mx31_clocks_init(unsigned long fref);
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int mx35_clocks_init(void);
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int mx31_clocks_init_dt(void);
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struct platform_device *mxc_register_gpio(char *name, int id,
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2011-06-06 00:07:55 +08:00
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resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
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2013-10-16 21:05:35 +08:00
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void mxc_set_cpu_type(unsigned int type);
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void mxc_restart(enum reboot_mode, const char *);
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void mxc_arch_reset_init(void __iomem *);
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2016-06-24 18:49:56 +08:00
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void imx1_reset_init(void __iomem *);
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2013-10-16 21:05:35 +08:00
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void imx_set_aips(void __iomem *);
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2014-07-07 17:41:26 +08:00
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void imx_aips_allow_unprivileged_access(const char *compat);
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2013-10-16 21:05:35 +08:00
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int mxc_device_init(void);
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2013-08-13 13:54:02 +08:00
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void imx_set_soc_revision(unsigned int rev);
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2013-08-13 14:59:43 +08:00
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void imx_init_revision_from_anatop(void);
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2013-08-13 16:59:28 +08:00
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struct device *imx_soc_device_init(void);
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2014-12-17 12:24:12 +08:00
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void imx6_enable_rbc(bool enable);
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2015-03-14 00:05:37 +08:00
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void imx_gpc_check_dt(void);
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2014-12-17 12:24:12 +08:00
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void imx_gpc_set_arm_power_in_lpm(bool power_off);
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void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
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void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
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2016-02-03 05:45:38 +08:00
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void imx25_pm_init(void);
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2011-10-17 08:42:16 +08:00
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2011-09-28 17:16:06 +08:00
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enum mxc_cpu_pwr_mode {
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WAIT_CLOCKED, /* wfi only */
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WAIT_UNCLOCKED, /* WAIT */
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WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
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STOP_POWER_ON, /* just STOP */
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STOP_POWER_OFF, /* STOP + SRPG */
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};
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2012-02-03 06:02:32 +08:00
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enum mx3_cpu_pwr_mode {
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MX3_RUN,
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MX3_WAIT,
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MX3_DOZE,
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MX3_SLEEP,
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};
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2013-10-16 21:05:35 +08:00
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void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
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2011-09-20 20:28:17 +08:00
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2013-10-16 21:05:35 +08:00
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void imx_enable_cpu(int cpu, bool enable);
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void imx_set_cpu_jump(int cpu, void *jump_addr);
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u32 imx_get_cpu_arg(int cpu);
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void imx_set_cpu_arg(int cpu, u32 arg);
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2011-09-06 14:59:40 +08:00
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#ifdef CONFIG_SMP
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2013-10-16 21:05:35 +08:00
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void v7_secondary_startup(void);
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void imx_scu_map_io(void);
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void imx_smp_prepare(void);
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2011-09-06 15:05:25 +08:00
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#else
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static inline void imx_scu_map_io(void) {}
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2011-09-06 15:08:40 +08:00
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static inline void imx_smp_prepare(void) {}
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2011-09-06 14:59:40 +08:00
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#endif
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2013-10-16 21:05:35 +08:00
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void imx_src_init(void);
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2014-06-23 16:42:44 +08:00
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void imx_gpc_pre_suspend(bool arm_power_off);
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2013-10-16 21:05:35 +08:00
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void imx_gpc_post_resume(void);
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void imx_gpc_mask_all(void);
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void imx_gpc_restore_all(void);
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2014-12-03 00:05:26 +08:00
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void imx_gpc_hwirq_mask(unsigned int hwirq);
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void imx_gpc_hwirq_unmask(unsigned int hwirq);
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2013-10-16 21:05:35 +08:00
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void imx_anatop_init(void);
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void imx_anatop_pre_suspend(void);
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void imx_anatop_post_resume(void);
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2015-04-25 22:59:19 +08:00
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int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
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2014-06-23 16:42:43 +08:00
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void imx6q_set_int_mem_clk_lpm(bool enable);
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2014-01-09 16:03:16 +08:00
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void imx6sl_set_wait_clk(bool enter);
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2014-09-17 11:11:45 +08:00
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int imx_mmdc_get_ddr_type(void);
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2013-10-16 21:05:35 +08:00
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void imx_cpu_die(unsigned int cpu);
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int imx_cpu_kill(unsigned int cpu);
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2011-09-08 20:15:22 +08:00
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2014-02-26 19:48:33 +08:00
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#ifdef CONFIG_SUSPEND
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void v7_cpu_resume(void);
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2015-05-12 21:31:03 +08:00
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void imx53_suspend(void __iomem *ocram_vbase);
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extern const u32 imx53_suspend_sz;
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2014-01-17 11:39:05 +08:00
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void imx6_suspend(void __iomem *ocram_vbase);
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2014-02-26 19:48:33 +08:00
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#else
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static inline void v7_cpu_resume(void) {}
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2015-05-12 21:31:03 +08:00
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static inline void imx53_suspend(void __iomem *ocram_vbase) {}
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static const u32 imx53_suspend_sz;
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2014-02-26 19:48:33 +08:00
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static inline void imx6_suspend(void __iomem *ocram_vbase) {}
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#endif
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2015-04-29 13:07:03 +08:00
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void imx6_pm_ccm_init(const char *ccm_compat);
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2013-10-16 21:05:35 +08:00
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void imx6q_pm_init(void);
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2014-01-17 11:39:05 +08:00
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void imx6dl_pm_init(void);
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void imx6sl_pm_init(void);
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2014-06-20 13:20:54 +08:00
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void imx6sx_pm_init(void);
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2015-08-05 01:48:37 +08:00
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void imx6ul_pm_init(void);
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2014-01-17 11:39:05 +08:00
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2014-02-18 10:35:05 +08:00
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#ifdef CONFIG_PM
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2014-05-20 14:55:15 +08:00
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void imx51_pm_init(void);
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void imx53_pm_init(void);
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2011-12-21 22:38:23 +08:00
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#else
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2014-05-20 14:55:15 +08:00
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static inline void imx51_pm_init(void) {}
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static inline void imx53_pm_init(void) {}
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2011-12-21 22:38:23 +08:00
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#endif
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2012-04-26 11:42:34 +08:00
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#ifdef CONFIG_NEON
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2013-10-16 21:05:35 +08:00
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int mx51_neon_fixup(void);
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2012-04-26 11:42:34 +08:00
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#else
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static inline int mx51_neon_fixup(void) { return 0; }
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#endif
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2013-07-08 21:45:20 +08:00
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#ifdef CONFIG_CACHE_L2X0
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2013-10-16 21:05:35 +08:00
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void imx_init_l2cache(void);
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2013-07-08 21:45:20 +08:00
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#else
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static inline void imx_init_l2cache(void) {}
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#endif
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2015-11-15 09:39:53 +08:00
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extern const struct smp_operations imx_smp_ops;
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extern const struct smp_operations ls1021a_smp_ops;
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2011-09-08 20:15:22 +08:00
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2007-07-10 05:06:53 +08:00
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#endif
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