2007-10-04 04:09:33 +08:00
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/*
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* MPC8610 HPCD board specific routines
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*
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* Initial author: Xianghua Xiao <x.xiao@freescale.com>
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* Recode: Jason Jin <jason.jin@freescale.com>
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*
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* Rewrite the interrupt routing. remove the 8259PIC support,
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* All the integrated device in ULI use sideband interrupt.
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*
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* Copyright 2007 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/of.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpc86xx.h>
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#include <asm/prom.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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2008-01-18 23:24:53 +08:00
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#include <linux/of_platform.h>
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2007-10-04 04:09:33 +08:00
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#include <sysdev/fsl_pci.h>
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#include <sysdev/fsl_soc.h>
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2008-01-18 23:24:53 +08:00
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static struct of_device_id __initdata mpc8610_ids[] = {
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{ .compatible = "fsl,mpc8610-immr", },
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{}
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};
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static int __init mpc8610_declare_of_platform_devices(void)
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{
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/* Without this call, the SSI device driver won't get probed. */
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of_platform_bus_probe(NULL, mpc8610_ids, NULL);
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return 0;
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}
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machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
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2008-04-17 01:53:06 +08:00
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static void __init
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2007-10-04 04:09:33 +08:00
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mpc86xx_hpcd_init_irq(void)
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{
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struct mpic *mpic1;
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struct device_node *np;
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struct resource res;
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/* Determine PIC address. */
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np = of_find_node_by_type(NULL, "open-pic");
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if (np == NULL)
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return;
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of_address_to_resource(np, 0, &res);
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/* Alloc mpic structure and per isu has 16 INT entries. */
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mpic1 = mpic_alloc(np, res.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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0, 256, " MPIC ");
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BUG_ON(mpic1 == NULL);
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mpic_init(mpic1);
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}
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#ifdef CONFIG_PCI
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static void __devinit quirk_uli1575(struct pci_dev *dev)
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{
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u32 temp32;
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/* Disable INTx */
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pci_read_config_dword(dev, 0x48, &temp32);
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pci_write_config_dword(dev, 0x48, (temp32 | 1<<26));
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/* Enable sideband interrupt */
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pci_read_config_dword(dev, 0x90, &temp32);
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pci_write_config_dword(dev, 0x90, (temp32 | 1<<22));
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}
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static void __devinit quirk_uli5288(struct pci_dev *dev)
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{
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unsigned char c;
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unsigned short temp;
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/* Interrupt Disable, Needed when SATA disabled */
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pci_read_config_word(dev, PCI_COMMAND, &temp);
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temp |= 1<<10;
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pci_write_config_word(dev, PCI_COMMAND, temp);
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pci_read_config_byte(dev, 0x83, &c);
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c |= 0x80;
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pci_write_config_byte(dev, 0x83, c);
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pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01);
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pci_write_config_byte(dev, PCI_CLASS_DEVICE, 0x06);
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pci_read_config_byte(dev, 0x83, &c);
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c &= 0x7f;
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pci_write_config_byte(dev, 0x83, c);
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}
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/*
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* Since 8259PIC was disabled on the board, the IDE device can not
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* use the legacy IRQ, we need to let the IDE device work under
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* native mode and use the interrupt line like other PCI devices.
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* IRQ14 is a sideband interrupt from IDE device to CPU and we use this
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* as the interrupt for IDE device.
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*/
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static void __devinit quirk_uli5229(struct pci_dev *dev)
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{
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unsigned char c;
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pci_read_config_byte(dev, 0x4b, &c);
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c |= 0x10;
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pci_write_config_byte(dev, 0x4b, c);
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}
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/*
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* SATA interrupt pin bug fix
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* There's a chip bug for 5288, The interrupt pin should be 2,
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* not the read only value 1, So it use INTB#, not INTA# which
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* actually used by the IDE device 5229.
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* As of this bug, during the PCI initialization, 5288 read the
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* irq of IDE device from the device tree, this function fix this
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* bug by re-assigning a correct irq to 5288.
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*
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*/
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static void __devinit final_uli5288(struct pci_dev *dev)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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2007-12-10 11:33:21 +08:00
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struct device_node *hosenode = hose ? hose->dn : NULL;
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2007-10-04 04:09:33 +08:00
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struct of_irq oirq;
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int virq, pin = 2;
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u32 laddr[3];
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if (!hosenode)
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return;
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laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8);
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laddr[1] = laddr[2] = 0;
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of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq);
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virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
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oirq.size);
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dev->irq = virq;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5288, final_uli5288);
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#endif /* CONFIG_PCI */
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static void __init
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mpc86xx_hpcd_setup_arch(void)
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{
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#ifdef CONFIG_PCI
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struct device_node *np;
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#endif
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if (ppc_md.progress)
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ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0);
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#ifdef CONFIG_PCI
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for_each_node_by_type(np, "pci") {
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if (of_device_is_compatible(np, "fsl,mpc8610-pci")
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|| of_device_is_compatible(np, "fsl,mpc8641-pcie")) {
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struct resource rsrc;
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of_address_to_resource(np, 0, &rsrc);
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if ((rsrc.start & 0xfffff) == 0xa000)
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fsl_add_bridge(np, 1);
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else
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fsl_add_bridge(np, 0);
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}
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}
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#endif
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printk("MPC86xx HPCD board from Freescale Semiconductor\n");
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}
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init mpc86xx_hpcd_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,MPC8610HPCD"))
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return 1; /* Looks good */
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return 0;
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}
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2008-04-17 01:53:06 +08:00
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static long __init
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2007-10-04 04:09:33 +08:00
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mpc86xx_time_init(void)
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{
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unsigned int temp;
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/* Set the time base to zero */
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mtspr(SPRN_TBWL, 0);
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mtspr(SPRN_TBWU, 0);
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temp = mfspr(SPRN_HID0);
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temp |= HID0_TBEN;
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mtspr(SPRN_HID0, temp);
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asm volatile("isync");
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return 0;
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}
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define_machine(mpc86xx_hpcd) {
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.name = "MPC86xx HPCD",
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.probe = mpc86xx_hpcd_probe,
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.setup_arch = mpc86xx_hpcd_setup_arch,
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.init_IRQ = mpc86xx_hpcd_init_irq,
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.get_irq = mpic_get_irq,
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2007-10-04 14:04:57 +08:00
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.restart = fsl_rstcr_restart,
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2007-10-04 04:09:33 +08:00
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.time_init = mpc86xx_time_init,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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};
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