2017-04-21 00:24:26 +08:00
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/*
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* Driver for Mediatek Hardware Random Number Generator
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*
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* Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define MTK_RNG_DEV KBUILD_MODNAME
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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2017-06-12 23:56:55 +08:00
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#include <linux/pm_runtime.h>
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/* Runtime PM autosuspend timeout: */
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#define RNG_AUTOSUSPEND_TIMEOUT 100
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2017-04-21 00:24:26 +08:00
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#define USEC_POLL 2
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#define TIMEOUT_POLL 20
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#define RNG_CTRL 0x00
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#define RNG_EN BIT(0)
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#define RNG_READY BIT(31)
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#define RNG_DATA 0x08
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#define to_mtk_rng(p) container_of(p, struct mtk_rng, rng)
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struct mtk_rng {
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void __iomem *base;
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struct clk *clk;
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struct hwrng rng;
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};
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static int mtk_rng_init(struct hwrng *rng)
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{
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struct mtk_rng *priv = to_mtk_rng(rng);
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u32 val;
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int err;
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err = clk_prepare_enable(priv->clk);
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if (err)
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return err;
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val = readl(priv->base + RNG_CTRL);
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val |= RNG_EN;
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writel(val, priv->base + RNG_CTRL);
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return 0;
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}
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static void mtk_rng_cleanup(struct hwrng *rng)
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{
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struct mtk_rng *priv = to_mtk_rng(rng);
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u32 val;
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val = readl(priv->base + RNG_CTRL);
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val &= ~RNG_EN;
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writel(val, priv->base + RNG_CTRL);
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clk_disable_unprepare(priv->clk);
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}
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static bool mtk_rng_wait_ready(struct hwrng *rng, bool wait)
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{
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struct mtk_rng *priv = to_mtk_rng(rng);
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int ready;
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ready = readl(priv->base + RNG_CTRL) & RNG_READY;
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if (!ready && wait)
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readl_poll_timeout_atomic(priv->base + RNG_CTRL, ready,
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ready & RNG_READY, USEC_POLL,
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TIMEOUT_POLL);
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return !!ready;
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}
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static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
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{
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struct mtk_rng *priv = to_mtk_rng(rng);
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int retval = 0;
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2017-06-12 23:56:55 +08:00
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pm_runtime_get_sync((struct device *)priv->rng.priv);
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2017-04-21 00:24:26 +08:00
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while (max >= sizeof(u32)) {
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if (!mtk_rng_wait_ready(rng, wait))
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break;
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*(u32 *)buf = readl(priv->base + RNG_DATA);
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retval += sizeof(u32);
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buf += sizeof(u32);
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max -= sizeof(u32);
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}
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2017-06-12 23:56:55 +08:00
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pm_runtime_mark_last_busy((struct device *)priv->rng.priv);
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pm_runtime_put_sync_autosuspend((struct device *)priv->rng.priv);
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2017-04-21 00:24:26 +08:00
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return retval || !wait ? retval : -EIO;
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}
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static int mtk_rng_probe(struct platform_device *pdev)
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{
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struct resource *res;
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int ret;
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struct mtk_rng *priv;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&pdev->dev, "no iomem resource\n");
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return -ENXIO;
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}
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->rng.name = pdev->name;
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2017-06-12 23:56:55 +08:00
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#ifndef CONFIG_PM
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2017-04-21 00:24:26 +08:00
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priv->rng.init = mtk_rng_init;
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priv->rng.cleanup = mtk_rng_cleanup;
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2017-06-12 23:56:55 +08:00
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#endif
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2017-04-21 00:24:26 +08:00
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priv->rng.read = mtk_rng_read;
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2017-06-12 23:56:55 +08:00
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priv->rng.priv = (unsigned long)&pdev->dev;
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2017-04-21 00:24:26 +08:00
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priv->clk = devm_clk_get(&pdev->dev, "rng");
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if (IS_ERR(priv->clk)) {
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ret = PTR_ERR(priv->clk);
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dev_err(&pdev->dev, "no clock for device: %d\n", ret);
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return ret;
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}
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priv->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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ret = devm_hwrng_register(&pdev->dev, &priv->rng);
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if (ret) {
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dev_err(&pdev->dev, "failed to register rng device: %d\n",
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ret);
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return ret;
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}
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2017-06-12 23:56:55 +08:00
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dev_set_drvdata(&pdev->dev, priv);
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pm_runtime_set_autosuspend_delay(&pdev->dev, RNG_AUTOSUSPEND_TIMEOUT);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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2017-04-21 00:24:26 +08:00
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dev_info(&pdev->dev, "registered RNG driver\n");
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return 0;
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}
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2017-06-12 23:56:55 +08:00
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#ifdef CONFIG_PM
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static int mtk_rng_runtime_suspend(struct device *dev)
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{
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struct mtk_rng *priv = dev_get_drvdata(dev);
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mtk_rng_cleanup(&priv->rng);
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return 0;
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}
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static int mtk_rng_runtime_resume(struct device *dev)
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{
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struct mtk_rng *priv = dev_get_drvdata(dev);
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return mtk_rng_init(&priv->rng);
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}
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static UNIVERSAL_DEV_PM_OPS(mtk_rng_pm_ops, mtk_rng_runtime_suspend,
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mtk_rng_runtime_resume, NULL);
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#define MTK_RNG_PM_OPS (&mtk_rng_pm_ops)
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#else /* CONFIG_PM */
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#define MTK_RNG_PM_OPS NULL
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#endif /* CONFIG_PM */
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2017-04-21 00:24:26 +08:00
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static const struct of_device_id mtk_rng_match[] = {
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{ .compatible = "mediatek,mt7623-rng" },
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_rng_match);
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static struct platform_driver mtk_rng_driver = {
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.probe = mtk_rng_probe,
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.driver = {
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.name = MTK_RNG_DEV,
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2017-06-12 23:56:55 +08:00
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.pm = MTK_RNG_PM_OPS,
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2017-04-21 00:24:26 +08:00
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.of_match_table = mtk_rng_match,
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},
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};
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module_platform_driver(mtk_rng_driver);
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MODULE_DESCRIPTION("Mediatek Random Number Generator Driver");
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MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
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MODULE_LICENSE("GPL");
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