2013-04-18 04:31:15 +08:00
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/*
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* Copyright 2012 Michael Ellerman, IBM Corporation.
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* Copyright 2012 Benjamin Herrenschmidt, IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/kvm_host.h>
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#include <linux/err.h>
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#include <asm/kvm_book3s.h>
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#include <asm/kvm_ppc.h>
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#include <asm/hvcall.h>
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#include <asm/xics.h>
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#include <asm/debug.h>
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#include <asm/synch.h>
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2015-12-18 04:59:09 +08:00
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#include <asm/cputhreads.h>
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2013-04-18 04:31:15 +08:00
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#include <asm/ppc-opcode.h>
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#include "book3s_xics.h"
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#define DEBUG_PASSUP
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2015-12-22 06:33:57 +08:00
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int h_ipi_redirect = 1;
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EXPORT_SYMBOL(h_ipi_redirect);
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2015-03-20 17:39:47 +08:00
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static void icp_rm_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
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u32 new_irq);
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/* -- ICS routines -- */
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static void ics_rm_check_resend(struct kvmppc_xics *xics,
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struct kvmppc_ics *ics, struct kvmppc_icp *icp)
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{
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int i;
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arch_spin_lock(&ics->lock);
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for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
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struct ics_irq_state *state = &ics->irq_state[i];
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if (!state->resend)
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continue;
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arch_spin_unlock(&ics->lock);
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icp_rm_deliver_irq(xics, icp, state->number);
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arch_spin_lock(&ics->lock);
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}
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arch_spin_unlock(&ics->lock);
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}
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/* -- ICP routines -- */
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2015-12-22 06:22:51 +08:00
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#ifdef CONFIG_SMP
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static inline void icp_send_hcore_msg(int hcore, struct kvm_vcpu *vcpu)
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{
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int hcpu;
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hcpu = hcore << threads_shift;
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kvmppc_host_rm_ops_hv->rm_core[hcore].rm_data = vcpu;
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smp_muxed_ipi_set_message(hcpu, PPC_MSG_RM_HOST_ACTION);
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icp_native_cause_ipi_rm(hcpu);
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}
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#else
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static inline void icp_send_hcore_msg(int hcore, struct kvm_vcpu *vcpu) { }
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#endif
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/*
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* We start the search from our current CPU Id in the core map
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* and go in a circle until we get back to our ID looking for a
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* core that is running in host context and that hasn't already
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* been targeted for another rm_host_ops.
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*
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* In the future, could consider using a fairer algorithm (one
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* that distributes the IPIs better)
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*
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* Returns -1, if no CPU could be found in the host
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* Else, returns a CPU Id which has been reserved for use
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*/
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static inline int grab_next_hostcore(int start,
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struct kvmppc_host_rm_core *rm_core, int max, int action)
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{
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bool success;
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int core;
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union kvmppc_rm_state old, new;
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for (core = start + 1; core < max; core++) {
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old = new = READ_ONCE(rm_core[core].rm_state);
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if (!old.in_host || old.rm_action)
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continue;
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/* Try to grab this host core if not taken already. */
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new.rm_action = action;
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success = cmpxchg64(&rm_core[core].rm_state.raw,
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old.raw, new.raw) == old.raw;
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if (success) {
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/*
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* Make sure that the store to the rm_action is made
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* visible before we return to caller (and the
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* subsequent store to rm_data) to synchronize with
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* the IPI handler.
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*/
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smp_wmb();
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return core;
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}
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}
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return -1;
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}
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static inline int find_available_hostcore(int action)
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{
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int core;
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int my_core = smp_processor_id() >> threads_shift;
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struct kvmppc_host_rm_core *rm_core = kvmppc_host_rm_ops_hv->rm_core;
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core = grab_next_hostcore(my_core, rm_core, cpu_nr_cores(), action);
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if (core == -1)
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core = grab_next_hostcore(core, rm_core, my_core, action);
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return core;
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}
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2013-04-18 04:31:15 +08:00
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static void icp_rm_set_vcpu_irq(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *this_vcpu)
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{
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struct kvmppc_icp *this_icp = this_vcpu->arch.icp;
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int cpu;
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2015-12-22 06:22:51 +08:00
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int hcore;
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2013-04-18 04:31:15 +08:00
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/* Mark the target VCPU as having an interrupt pending */
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vcpu->stat.queue_intr++;
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set_bit(BOOK3S_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
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/* Kick self ? Just set MER and return */
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if (vcpu == this_vcpu) {
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_MER);
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return;
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}
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2015-12-22 06:22:51 +08:00
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/*
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* Check if the core is loaded,
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* if not, find an available host core to post to wake the VCPU,
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* if we can't find one, set up state to eventually return too hard.
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*/
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KVM: PPC: Book3S HV: Make use of unused threads when running guests
When running a virtual core of a guest that is configured with fewer
threads per core than the physical cores have, the extra physical
threads are currently unused. This makes it possible to use them to
run one or more other virtual cores from the same guest when certain
conditions are met. This applies on POWER7, and on POWER8 to guests
with one thread per virtual core. (It doesn't apply to POWER8 guests
with multiple threads per vcore because they require a 1-1 virtual to
physical thread mapping in order to be able to use msgsndp and the
TIR.)
The idea is that we maintain a list of preempted vcores for each
physical cpu (i.e. each core, since the host runs single-threaded).
Then, when a vcore is about to run, it checks to see if there are
any vcores on the list for its physical cpu that could be
piggybacked onto this vcore's execution. If so, those additional
vcores are put into state VCORE_PIGGYBACK and their runnable VCPU
threads are started as well as the original vcore, which is called
the master vcore.
After the vcores have exited the guest, the extra ones are put back
onto the preempted list if any of their VCPUs are still runnable and
not idle.
This means that vcpu->arch.ptid is no longer necessarily the same as
the physical thread that the vcpu runs on. In order to make it easier
for code that wants to send an IPI to know which CPU to target, we
now store that in a new field in struct vcpu_arch, called thread_cpu.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Tested-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-24 19:18:03 +08:00
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cpu = vcpu->arch.thread_cpu;
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2013-04-18 04:31:15 +08:00
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if (cpu < 0 || cpu >= nr_cpu_ids) {
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2015-12-22 06:22:51 +08:00
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hcore = -1;
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2015-12-22 06:33:57 +08:00
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if (kvmppc_host_rm_ops_hv && h_ipi_redirect)
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2015-12-22 06:22:51 +08:00
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hcore = find_available_hostcore(XICS_RM_KICK_VCPU);
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if (hcore != -1) {
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icp_send_hcore_msg(hcore, vcpu);
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} else {
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this_icp->rm_action |= XICS_RM_KICK_VCPU;
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this_icp->rm_kick_target = vcpu;
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}
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2013-04-18 04:31:15 +08:00
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return;
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}
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2015-03-28 11:21:11 +08:00
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smp_mb();
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kvmhv_rm_send_ipi(cpu);
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2013-04-18 04:31:15 +08:00
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}
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static void icp_rm_clr_vcpu_irq(struct kvm_vcpu *vcpu)
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{
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/* Note: Only called on self ! */
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clear_bit(BOOK3S_IRQPRIO_EXTERNAL_LEVEL,
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&vcpu->arch.pending_exceptions);
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_MER);
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}
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static inline bool icp_rm_try_update(struct kvmppc_icp *icp,
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union kvmppc_icp_state old,
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union kvmppc_icp_state new)
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{
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struct kvm_vcpu *this_vcpu = local_paca->kvm_hstate.kvm_vcpu;
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bool success;
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/* Calculate new output value */
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new.out_ee = (new.xisr && (new.pending_pri < new.cppr));
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/* Attempt atomic update */
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success = cmpxchg64(&icp->state.raw, old.raw, new.raw) == old.raw;
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if (!success)
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goto bail;
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/*
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* Check for output state update
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*
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* Note that this is racy since another processor could be updating
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* the state already. This is why we never clear the interrupt output
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* here, we only ever set it. The clear only happens prior to doing
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* an update and only by the processor itself. Currently we do it
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* in Accept (H_XIRR) and Up_Cppr (H_XPPR).
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*
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* We also do not try to figure out whether the EE state has changed,
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* we unconditionally set it if the new state calls for it. The reason
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* for that is that we opportunistically remove the pending interrupt
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* flag when raising CPPR, so we need to set it back here if an
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* interrupt is still pending.
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*/
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if (new.out_ee)
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icp_rm_set_vcpu_irq(icp->vcpu, this_vcpu);
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/* Expose the state change for debug purposes */
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this_vcpu->arch.icp->rm_dbgstate = new;
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this_vcpu->arch.icp->rm_dbgtgt = icp->vcpu;
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bail:
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return success;
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}
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static inline int check_too_hard(struct kvmppc_xics *xics,
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struct kvmppc_icp *icp)
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{
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return (xics->real_mode_dbg || icp->rm_action) ? H_TOO_HARD : H_SUCCESS;
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}
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2015-03-20 17:39:47 +08:00
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static void icp_rm_check_resend(struct kvmppc_xics *xics,
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struct kvmppc_icp *icp)
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{
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u32 icsid;
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/* Order this load with the test for need_resend in the caller */
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smp_rmb();
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for_each_set_bit(icsid, icp->resend_map, xics->max_icsid + 1) {
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struct kvmppc_ics *ics = xics->ics[icsid];
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if (!test_and_clear_bit(icsid, icp->resend_map))
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continue;
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if (!ics)
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continue;
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ics_rm_check_resend(xics, ics, icp);
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}
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}
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static bool icp_rm_try_to_deliver(struct kvmppc_icp *icp, u32 irq, u8 priority,
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u32 *reject)
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{
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union kvmppc_icp_state old_state, new_state;
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bool success;
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do {
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old_state = new_state = READ_ONCE(icp->state);
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*reject = 0;
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/* See if we can deliver */
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success = new_state.cppr > priority &&
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new_state.mfrr > priority &&
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new_state.pending_pri > priority;
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/*
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* If we can, check for a rejection and perform the
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* delivery
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*/
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if (success) {
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*reject = new_state.xisr;
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new_state.xisr = irq;
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new_state.pending_pri = priority;
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} else {
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/*
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* If we failed to deliver we set need_resend
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* so a subsequent CPPR state change causes us
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* to try a new delivery.
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*/
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new_state.need_resend = true;
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}
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} while (!icp_rm_try_update(icp, old_state, new_state));
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return success;
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}
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static void icp_rm_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
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u32 new_irq)
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{
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struct ics_irq_state *state;
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struct kvmppc_ics *ics;
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u32 reject;
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u16 src;
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/*
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* This is used both for initial delivery of an interrupt and
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* for subsequent rejection.
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*
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* Rejection can be racy vs. resends. We have evaluated the
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* rejection in an atomic ICP transaction which is now complete,
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* so potentially the ICP can already accept the interrupt again.
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*
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* So we need to retry the delivery. Essentially the reject path
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* boils down to a failed delivery. Always.
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*
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* Now the interrupt could also have moved to a different target,
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* thus we may need to re-do the ICP lookup as well
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*/
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again:
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/* Get the ICS state and lock it */
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ics = kvmppc_xics_find_ics(xics, new_irq, &src);
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if (!ics) {
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/* Unsafe increment, but this does not need to be accurate */
|
2015-03-20 17:39:48 +08:00
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xics->err_noics++;
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2015-03-20 17:39:47 +08:00
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return;
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}
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state = &ics->irq_state[src];
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/* Get a lock on the ICS */
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arch_spin_lock(&ics->lock);
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/* Get our server */
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if (!icp || state->server != icp->server_num) {
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icp = kvmppc_xics_find_server(xics->kvm, state->server);
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if (!icp) {
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/* Unsafe increment again*/
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2015-03-20 17:39:48 +08:00
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xics->err_noicp++;
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2015-03-20 17:39:47 +08:00
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goto out;
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}
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}
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/* Clear the resend bit of that interrupt */
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state->resend = 0;
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/*
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* If masked, bail out
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*
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|
|
* Note: PAPR doesn't mention anything about masked pending
|
|
|
|
* when doing a resend, only when doing a delivery.
|
|
|
|
*
|
|
|
|
* However that would have the effect of losing a masked
|
|
|
|
* interrupt that was rejected and isn't consistent with
|
|
|
|
* the whole masked_pending business which is about not
|
|
|
|
* losing interrupts that occur while masked.
|
|
|
|
*
|
|
|
|
* I don't differentiate normal deliveries and resends, this
|
|
|
|
* implementation will differ from PAPR and not lose such
|
|
|
|
* interrupts.
|
|
|
|
*/
|
|
|
|
if (state->priority == MASKED) {
|
|
|
|
state->masked_pending = 1;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Try the delivery, this will set the need_resend flag
|
|
|
|
* in the ICP as part of the atomic transaction if the
|
|
|
|
* delivery is not possible.
|
|
|
|
*
|
|
|
|
* Note that if successful, the new delivery might have itself
|
|
|
|
* rejected an interrupt that was "delivered" before we took the
|
|
|
|
* ics spin lock.
|
|
|
|
*
|
|
|
|
* In this case we do the whole sequence all over again for the
|
|
|
|
* new guy. We cannot assume that the rejected interrupt is less
|
|
|
|
* favored than the new one, and thus doesn't need to be delivered,
|
|
|
|
* because by the time we exit icp_rm_try_to_deliver() the target
|
|
|
|
* processor may well have already consumed & completed it, and thus
|
|
|
|
* the rejected interrupt might actually be already acceptable.
|
|
|
|
*/
|
|
|
|
if (icp_rm_try_to_deliver(icp, new_irq, state->priority, &reject)) {
|
|
|
|
/*
|
|
|
|
* Delivery was successful, did we reject somebody else ?
|
|
|
|
*/
|
|
|
|
if (reject && reject != XICS_IPI) {
|
|
|
|
arch_spin_unlock(&ics->lock);
|
|
|
|
new_irq = reject;
|
|
|
|
goto again;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* We failed to deliver the interrupt we need to set the
|
|
|
|
* resend map bit and mark the ICS state as needing a resend
|
|
|
|
*/
|
|
|
|
set_bit(ics->icsid, icp->resend_map);
|
|
|
|
state->resend = 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the need_resend flag got cleared in the ICP some time
|
|
|
|
* between icp_rm_try_to_deliver() atomic update and now, then
|
|
|
|
* we know it might have missed the resend_map bit. So we
|
|
|
|
* retry
|
|
|
|
*/
|
|
|
|
smp_mb();
|
|
|
|
if (!icp->state.need_resend) {
|
|
|
|
arch_spin_unlock(&ics->lock);
|
|
|
|
goto again;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
out:
|
|
|
|
arch_spin_unlock(&ics->lock);
|
|
|
|
}
|
|
|
|
|
2013-04-18 04:31:15 +08:00
|
|
|
static void icp_rm_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
|
|
|
|
u8 new_cppr)
|
|
|
|
{
|
|
|
|
union kvmppc_icp_state old_state, new_state;
|
|
|
|
bool resend;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This handles several related states in one operation:
|
|
|
|
*
|
|
|
|
* ICP State: Down_CPPR
|
|
|
|
*
|
|
|
|
* Load CPPR with new value and if the XISR is 0
|
|
|
|
* then check for resends:
|
|
|
|
*
|
|
|
|
* ICP State: Resend
|
|
|
|
*
|
|
|
|
* If MFRR is more favored than CPPR, check for IPIs
|
|
|
|
* and notify ICS of a potential resend. This is done
|
|
|
|
* asynchronously (when used in real mode, we will have
|
|
|
|
* to exit here).
|
|
|
|
*
|
|
|
|
* We do not handle the complete Check_IPI as documented
|
|
|
|
* here. In the PAPR, this state will be used for both
|
|
|
|
* Set_MFRR and Down_CPPR. However, we know that we aren't
|
|
|
|
* changing the MFRR state here so we don't need to handle
|
|
|
|
* the case of an MFRR causing a reject of a pending irq,
|
|
|
|
* this will have been handled when the MFRR was set in the
|
|
|
|
* first place.
|
|
|
|
*
|
|
|
|
* Thus we don't have to handle rejects, only resends.
|
|
|
|
*
|
|
|
|
* When implementing real mode for HV KVM, resend will lead to
|
|
|
|
* a H_TOO_HARD return and the whole transaction will be handled
|
|
|
|
* in virtual mode.
|
|
|
|
*/
|
|
|
|
do {
|
2015-01-07 05:41:46 +08:00
|
|
|
old_state = new_state = READ_ONCE(icp->state);
|
2013-04-18 04:31:15 +08:00
|
|
|
|
|
|
|
/* Down_CPPR */
|
|
|
|
new_state.cppr = new_cppr;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Cut down Resend / Check_IPI / IPI
|
|
|
|
*
|
|
|
|
* The logic is that we cannot have a pending interrupt
|
|
|
|
* trumped by an IPI at this point (see above), so we
|
|
|
|
* know that either the pending interrupt is already an
|
|
|
|
* IPI (in which case we don't care to override it) or
|
|
|
|
* it's either more favored than us or non existent
|
|
|
|
*/
|
|
|
|
if (new_state.mfrr < new_cppr &&
|
|
|
|
new_state.mfrr <= new_state.pending_pri) {
|
|
|
|
new_state.pending_pri = new_state.mfrr;
|
|
|
|
new_state.xisr = XICS_IPI;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Latch/clear resend bit */
|
|
|
|
resend = new_state.need_resend;
|
|
|
|
new_state.need_resend = 0;
|
|
|
|
|
|
|
|
} while (!icp_rm_try_update(icp, old_state, new_state));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Now handle resend checks. Those are asynchronous to the ICP
|
|
|
|
* state update in HW (ie bus transactions) so we can handle them
|
|
|
|
* separately here as well.
|
|
|
|
*/
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
if (resend) {
|
2015-03-20 17:39:48 +08:00
|
|
|
icp->n_check_resend++;
|
2015-03-20 17:39:47 +08:00
|
|
|
icp_rm_check_resend(xics, icp);
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
}
|
2013-04-18 04:31:15 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
unsigned long kvmppc_rm_h_xirr(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
union kvmppc_icp_state old_state, new_state;
|
|
|
|
struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
|
|
|
|
struct kvmppc_icp *icp = vcpu->arch.icp;
|
|
|
|
u32 xirr;
|
|
|
|
|
|
|
|
if (!xics || !xics->real_mode)
|
|
|
|
return H_TOO_HARD;
|
|
|
|
|
|
|
|
/* First clear the interrupt */
|
|
|
|
icp_rm_clr_vcpu_irq(icp->vcpu);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ICP State: Accept_Interrupt
|
|
|
|
*
|
|
|
|
* Return the pending interrupt (if any) along with the
|
|
|
|
* current CPPR, then clear the XISR & set CPPR to the
|
|
|
|
* pending priority
|
|
|
|
*/
|
|
|
|
do {
|
2015-01-07 05:41:46 +08:00
|
|
|
old_state = new_state = READ_ONCE(icp->state);
|
2013-04-18 04:31:15 +08:00
|
|
|
|
|
|
|
xirr = old_state.xisr | (((u32)old_state.cppr) << 24);
|
|
|
|
if (!old_state.xisr)
|
|
|
|
break;
|
|
|
|
new_state.cppr = new_state.pending_pri;
|
|
|
|
new_state.pending_pri = 0xff;
|
|
|
|
new_state.xisr = 0;
|
|
|
|
|
|
|
|
} while (!icp_rm_try_update(icp, old_state, new_state));
|
|
|
|
|
|
|
|
/* Return the result in GPR4 */
|
|
|
|
vcpu->arch.gpr[4] = xirr;
|
|
|
|
|
|
|
|
return check_too_hard(xics, icp);
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvmppc_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
|
|
|
|
unsigned long mfrr)
|
|
|
|
{
|
|
|
|
union kvmppc_icp_state old_state, new_state;
|
|
|
|
struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
|
|
|
|
struct kvmppc_icp *icp, *this_icp = vcpu->arch.icp;
|
|
|
|
u32 reject;
|
|
|
|
bool resend;
|
|
|
|
bool local;
|
|
|
|
|
|
|
|
if (!xics || !xics->real_mode)
|
|
|
|
return H_TOO_HARD;
|
|
|
|
|
|
|
|
local = this_icp->server_num == server;
|
|
|
|
if (local)
|
|
|
|
icp = this_icp;
|
|
|
|
else
|
|
|
|
icp = kvmppc_xics_find_server(vcpu->kvm, server);
|
|
|
|
if (!icp)
|
|
|
|
return H_PARAMETER;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ICP state: Set_MFRR
|
|
|
|
*
|
|
|
|
* If the CPPR is more favored than the new MFRR, then
|
|
|
|
* nothing needs to be done as there can be no XISR to
|
|
|
|
* reject.
|
|
|
|
*
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
* ICP state: Check_IPI
|
|
|
|
*
|
2013-04-18 04:31:15 +08:00
|
|
|
* If the CPPR is less favored, then we might be replacing
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
* an interrupt, and thus need to possibly reject it.
|
2013-04-18 04:31:15 +08:00
|
|
|
*
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
* ICP State: IPI
|
|
|
|
*
|
|
|
|
* Besides rejecting any pending interrupts, we also
|
|
|
|
* update XISR and pending_pri to mark IPI as pending.
|
|
|
|
*
|
|
|
|
* PAPR does not describe this state, but if the MFRR is being
|
|
|
|
* made less favored than its earlier value, there might be
|
|
|
|
* a previously-rejected interrupt needing to be resent.
|
|
|
|
* Ideally, we would want to resend only if
|
|
|
|
* prio(pending_interrupt) < mfrr &&
|
|
|
|
* prio(pending_interrupt) < cppr
|
|
|
|
* where pending interrupt is the one that was rejected. But
|
|
|
|
* we don't have that state, so we simply trigger a resend
|
|
|
|
* whenever the MFRR is made less favored.
|
2013-04-18 04:31:15 +08:00
|
|
|
*/
|
|
|
|
do {
|
2015-01-07 05:41:46 +08:00
|
|
|
old_state = new_state = READ_ONCE(icp->state);
|
2013-04-18 04:31:15 +08:00
|
|
|
|
|
|
|
/* Set_MFRR */
|
|
|
|
new_state.mfrr = mfrr;
|
|
|
|
|
|
|
|
/* Check_IPI */
|
|
|
|
reject = 0;
|
|
|
|
resend = false;
|
|
|
|
if (mfrr < new_state.cppr) {
|
|
|
|
/* Reject a pending interrupt if not an IPI */
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
if (mfrr <= new_state.pending_pri) {
|
2013-04-18 04:31:15 +08:00
|
|
|
reject = new_state.xisr;
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
new_state.pending_pri = mfrr;
|
|
|
|
new_state.xisr = XICS_IPI;
|
|
|
|
}
|
2013-04-18 04:31:15 +08:00
|
|
|
}
|
|
|
|
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
if (mfrr > old_state.mfrr) {
|
2013-04-18 04:31:15 +08:00
|
|
|
resend = new_state.need_resend;
|
|
|
|
new_state.need_resend = 0;
|
|
|
|
}
|
|
|
|
} while (!icp_rm_try_update(icp, old_state, new_state));
|
|
|
|
|
2015-03-20 17:39:47 +08:00
|
|
|
/* Handle reject in real mode */
|
2013-04-18 04:31:15 +08:00
|
|
|
if (reject && reject != XICS_IPI) {
|
2015-03-20 17:39:48 +08:00
|
|
|
this_icp->n_reject++;
|
2015-03-20 17:39:47 +08:00
|
|
|
icp_rm_deliver_irq(xics, icp, reject);
|
2013-04-18 04:31:15 +08:00
|
|
|
}
|
|
|
|
|
2015-03-20 17:39:47 +08:00
|
|
|
/* Handle resends in real mode */
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
if (resend) {
|
2015-03-20 17:39:48 +08:00
|
|
|
this_icp->n_check_resend++;
|
2015-03-20 17:39:47 +08:00
|
|
|
icp_rm_check_resend(xics, icp);
|
KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI
This fixes some inaccuracies in the state machine for the virtualized
ICP when implementing the H_IPI hcall (Set_MFFR and related states):
1. The old code wipes out any pending interrupts when the new MFRR is
more favored than the CPPR but less favored than a pending
interrupt (by always modifying xisr and the pending_pri). This can
cause us to lose a pending external interrupt.
The correct code here is to only modify the pending_pri and xisr in
the ICP if the MFRR is equal to or more favored than the current
pending pri (since in this case, it is guaranteed that that there
cannot be a pending external interrupt). The code changes are
required in both kvmppc_rm_h_ipi and kvmppc_h_ipi.
2. Again, in both kvmppc_rm_h_ipi and kvmppc_h_ipi, there is a check
for whether MFRR is being made less favored AND further if new MFFR
is also less favored than the current CPPR, we check for any
resends pending in the ICP. These checks look like they are
designed to cover the case where if the MFRR is being made less
favored, we opportunistically trigger a resend of any interrupts
that had been previously rejected. Although, this is not a state
described by PAPR, this is an action we actually need to do
especially if the CPPR is already at 0xFF. Because in this case,
the resend bit will stay on until another ICP state change which
may be a long time coming and the interrupt stays pending until
then. The current code which checks for MFRR < CPPR is broken when
CPPR is 0xFF since it will not get triggered in that case.
Ideally, we would want to do a resend only if
prio(pending_interrupt) < mfrr && prio(pending_interrupt) < cppr
where pending interrupt is the one that was rejected. But we don't
have the priority of the pending interrupt state saved, so we
simply trigger a resend whenever the MFRR is made less favored.
3. In kvmppc_rm_h_ipi, where we save state to pass resends to the
virtual mode, we also need to save the ICP whose need_resend we
reset since this does not need to be my ICP (vcpu->arch.icp) as is
incorrectly assumed by the current code. A new field rm_resend_icp
is added to the kvmppc_icp structure for this purpose.
Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-11-03 12:51:59 +08:00
|
|
|
}
|
2013-04-18 04:31:15 +08:00
|
|
|
|
|
|
|
return check_too_hard(xics, this_icp);
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvmppc_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr)
|
|
|
|
{
|
|
|
|
union kvmppc_icp_state old_state, new_state;
|
|
|
|
struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
|
|
|
|
struct kvmppc_icp *icp = vcpu->arch.icp;
|
|
|
|
u32 reject;
|
|
|
|
|
|
|
|
if (!xics || !xics->real_mode)
|
|
|
|
return H_TOO_HARD;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ICP State: Set_CPPR
|
|
|
|
*
|
|
|
|
* We can safely compare the new value with the current
|
|
|
|
* value outside of the transaction as the CPPR is only
|
|
|
|
* ever changed by the processor on itself
|
|
|
|
*/
|
|
|
|
if (cppr > icp->state.cppr) {
|
|
|
|
icp_rm_down_cppr(xics, icp, cppr);
|
|
|
|
goto bail;
|
|
|
|
} else if (cppr == icp->state.cppr)
|
|
|
|
return H_SUCCESS;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ICP State: Up_CPPR
|
|
|
|
*
|
|
|
|
* The processor is raising its priority, this can result
|
|
|
|
* in a rejection of a pending interrupt:
|
|
|
|
*
|
|
|
|
* ICP State: Reject_Current
|
|
|
|
*
|
|
|
|
* We can remove EE from the current processor, the update
|
|
|
|
* transaction will set it again if needed
|
|
|
|
*/
|
|
|
|
icp_rm_clr_vcpu_irq(icp->vcpu);
|
|
|
|
|
|
|
|
do {
|
2015-01-07 05:41:46 +08:00
|
|
|
old_state = new_state = READ_ONCE(icp->state);
|
2013-04-18 04:31:15 +08:00
|
|
|
|
|
|
|
reject = 0;
|
|
|
|
new_state.cppr = cppr;
|
|
|
|
|
|
|
|
if (cppr <= new_state.pending_pri) {
|
|
|
|
reject = new_state.xisr;
|
|
|
|
new_state.xisr = 0;
|
|
|
|
new_state.pending_pri = 0xff;
|
|
|
|
}
|
|
|
|
|
|
|
|
} while (!icp_rm_try_update(icp, old_state, new_state));
|
|
|
|
|
2015-03-20 17:39:47 +08:00
|
|
|
/*
|
|
|
|
* Check for rejects. They are handled by doing a new delivery
|
|
|
|
* attempt (see comments in icp_rm_deliver_irq).
|
|
|
|
*/
|
2013-04-18 04:31:15 +08:00
|
|
|
if (reject && reject != XICS_IPI) {
|
2015-03-20 17:39:48 +08:00
|
|
|
icp->n_reject++;
|
2015-03-20 17:39:47 +08:00
|
|
|
icp_rm_deliver_irq(xics, icp, reject);
|
2013-04-18 04:31:15 +08:00
|
|
|
}
|
|
|
|
bail:
|
|
|
|
return check_too_hard(xics, icp);
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
|
|
|
|
{
|
|
|
|
struct kvmppc_xics *xics = vcpu->kvm->arch.xics;
|
|
|
|
struct kvmppc_icp *icp = vcpu->arch.icp;
|
|
|
|
struct kvmppc_ics *ics;
|
|
|
|
struct ics_irq_state *state;
|
|
|
|
u32 irq = xirr & 0x00ffffff;
|
|
|
|
u16 src;
|
|
|
|
|
|
|
|
if (!xics || !xics->real_mode)
|
|
|
|
return H_TOO_HARD;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ICP State: EOI
|
|
|
|
*
|
|
|
|
* Note: If EOI is incorrectly used by SW to lower the CPPR
|
|
|
|
* value (ie more favored), we do not check for rejection of
|
|
|
|
* a pending interrupt, this is a SW error and PAPR sepcifies
|
|
|
|
* that we don't have to deal with it.
|
|
|
|
*
|
|
|
|
* The sending of an EOI to the ICS is handled after the
|
|
|
|
* CPPR update
|
|
|
|
*
|
|
|
|
* ICP State: Down_CPPR which we handle
|
|
|
|
* in a separate function as it's shared with H_CPPR.
|
|
|
|
*/
|
|
|
|
icp_rm_down_cppr(xics, icp, xirr >> 24);
|
|
|
|
|
|
|
|
/* IPIs have no EOI */
|
|
|
|
if (irq == XICS_IPI)
|
|
|
|
goto bail;
|
|
|
|
/*
|
|
|
|
* EOI handling: If the interrupt is still asserted, we need to
|
|
|
|
* resend it. We can take a lockless "peek" at the ICS state here.
|
|
|
|
*
|
|
|
|
* "Message" interrupts will never have "asserted" set
|
|
|
|
*/
|
|
|
|
ics = kvmppc_xics_find_ics(xics, irq, &src);
|
|
|
|
if (!ics)
|
|
|
|
goto bail;
|
|
|
|
state = &ics->irq_state[src];
|
|
|
|
|
2015-03-20 17:39:47 +08:00
|
|
|
/* Still asserted, resend it */
|
2013-04-18 04:31:15 +08:00
|
|
|
if (state->asserted) {
|
2015-03-20 17:39:48 +08:00
|
|
|
icp->n_reject++;
|
2015-03-20 17:39:47 +08:00
|
|
|
icp_rm_deliver_irq(xics, icp, irq);
|
2013-04-18 04:31:15 +08:00
|
|
|
}
|
2014-06-30 18:51:14 +08:00
|
|
|
|
|
|
|
if (!hlist_empty(&vcpu->kvm->irq_ack_notifier_list)) {
|
|
|
|
icp->rm_action |= XICS_RM_NOTIFY_EOI;
|
|
|
|
icp->rm_eoied_irq = irq;
|
|
|
|
}
|
2013-04-18 04:31:15 +08:00
|
|
|
bail:
|
|
|
|
return check_too_hard(xics, icp);
|
|
|
|
}
|
2015-12-18 04:59:09 +08:00
|
|
|
|
|
|
|
/* --- Non-real mode XICS-related built-in routines --- */
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Host Operations poked by RM KVM
|
|
|
|
*/
|
|
|
|
static void rm_host_ipi_action(int action, void *data)
|
|
|
|
{
|
|
|
|
switch (action) {
|
|
|
|
case XICS_RM_KICK_VCPU:
|
|
|
|
kvmppc_host_rm_ops_hv->vcpu_kick(data);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
WARN(1, "Unexpected rm_action=%d data=%p\n", action, data);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
void kvmppc_xics_ipi_action(void)
|
|
|
|
{
|
|
|
|
int core;
|
|
|
|
unsigned int cpu = smp_processor_id();
|
|
|
|
struct kvmppc_host_rm_core *rm_corep;
|
|
|
|
|
|
|
|
core = cpu >> threads_shift;
|
|
|
|
rm_corep = &kvmppc_host_rm_ops_hv->rm_core[core];
|
|
|
|
|
|
|
|
if (rm_corep->rm_data) {
|
|
|
|
rm_host_ipi_action(rm_corep->rm_state.rm_action,
|
|
|
|
rm_corep->rm_data);
|
2015-12-22 06:22:51 +08:00
|
|
|
/* Order these stores against the real mode KVM */
|
2015-12-18 04:59:09 +08:00
|
|
|
rm_corep->rm_data = NULL;
|
2015-12-22 06:22:51 +08:00
|
|
|
smp_wmb();
|
2015-12-18 04:59:09 +08:00
|
|
|
rm_corep->rm_state.rm_action = 0;
|
|
|
|
}
|
|
|
|
}
|