2011-06-22 00:59:34 +08:00
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* ARM Primecell Peripherals
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ARM, Ltd. Primecell peripherals have a standard id register that can be used to
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identify the peripheral type, vendor, and revision. This value can be used for
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driver matching.
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Required properties:
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2011-10-24 17:09:14 +08:00
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- compatible : should be a specific name for the peripheral and
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"arm,primecell". The specific name will match the ARM
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engineering name for the logic block in the form: "arm,pl???"
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2011-06-22 00:59:34 +08:00
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Optional properties:
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- arm,primecell-periphid : Value to override the h/w value with
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2012-04-15 09:30:29 +08:00
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- clocks : From common clock binding. First clock is phandle to clock for apb
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pclk. Additional clocks are optional and specific to those peripherals.
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- clock-names : From common clock binding. Shall be "apb_pclk" for first clock.
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2013-01-29 00:24:37 +08:00
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- dmas : From common DMA binding. If present, refers to one or more dma channels.
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- dma-names : From common DMA binding, needs to match the 'dmas' property.
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Devices with exactly one receive and transmit channel shall name
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these "rx" and "tx", respectively.
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- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
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- pinctrl-names : Names corresponding to the numbered pinctrl states
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- interrupts : one or more interrupt specifiers
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- interrupt-names : names corresponding to the interrupts properties
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2011-06-22 00:59:34 +08:00
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Example:
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serial@fff36000 {
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compatible = "arm,pl011", "arm,primecell";
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arm,primecell-periphid = <0x00341011>;
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2013-01-29 00:24:37 +08:00
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2012-04-15 09:30:29 +08:00
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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2013-01-29 00:24:37 +08:00
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dmas = <&dma-controller 4>, <&dma-controller 5>;
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dma-names = "rx", "tx";
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pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
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pinctrl-1 = <&uart0_sleep_mode>;
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pinctrl-names = "default","sleep";
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interrupts = <0 11 0x4>;
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2011-06-22 00:59:34 +08:00
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};
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