mirror of https://gitee.com/openkylin/linux.git
744 lines
19 KiB
C
744 lines
19 KiB
C
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/*
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* ChromeOS EC multi-function device (SPI)
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*
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* Copyright (C) 2012 Google, Inc
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mfd/cros_ec.h>
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#include <linux/mfd/cros_ec_commands.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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/* The header byte, which follows the preamble */
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#define EC_MSG_HEADER 0xec
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/*
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* Number of EC preamble bytes we read at a time. Since it takes
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* about 400-500us for the EC to respond there is not a lot of
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* point in tuning this. If the EC could respond faster then
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* we could increase this so that might expect the preamble and
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* message to occur in a single transaction. However, the maximum
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* SPI transfer size is 256 bytes, so at 5MHz we need a response
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* time of perhaps <320us (200 bytes / 1600 bits).
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*/
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#define EC_MSG_PREAMBLE_COUNT 32
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/*
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* Allow for a long time for the EC to respond. We support i2c
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* tunneling and support fairly long messages for the tunnel (249
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* bytes long at the moment). If we're talking to a 100 kHz device
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* on the other end and need to transfer ~256 bytes, then we need:
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* 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
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*
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* We'll wait 8 times that to handle clock stretching and other
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* paranoia. Note that some battery gas gauge ICs claim to have a
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* clock stretch of 144ms in rare situations. That's incentive for
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* not directly passing i2c through, but it's too late for that for
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* existing hardware.
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*
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* It's pretty unlikely that we'll really see a 249 byte tunnel in
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* anything other than testing. If this was more common we might
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* consider having slow commands like this require a GET_STATUS
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* wait loop. The 'flash write' command would be another candidate
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* for this, clocking in at 2-3ms.
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*/
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#define EC_MSG_DEADLINE_MS 200
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/*
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* Time between raising the SPI chip select (for the end of a
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* transaction) and dropping it again (for the next transaction).
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* If we go too fast, the EC will miss the transaction. We know that we
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* need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
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* safe.
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*/
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#define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
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/**
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* struct cros_ec_spi - information about a SPI-connected EC
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*
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* @spi: SPI device we are connected to
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* @last_transfer_ns: time that we last finished a transfer.
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* @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
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* is sent when we want to turn on CS at the start of a transaction.
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* @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
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* is sent when we want to turn off CS at the end of a transaction.
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*/
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struct cros_ec_spi {
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struct spi_device *spi;
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s64 last_transfer_ns;
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unsigned int start_of_msg_delay;
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unsigned int end_of_msg_delay;
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};
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static void debug_packet(struct device *dev, const char *name, u8 *ptr,
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int len)
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{
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#ifdef DEBUG
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int i;
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dev_dbg(dev, "%s: ", name);
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for (i = 0; i < len; i++)
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pr_cont(" %02x", ptr[i]);
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pr_cont("\n");
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#endif
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}
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static int terminate_request(struct cros_ec_device *ec_dev)
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{
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struct cros_ec_spi *ec_spi = ec_dev->priv;
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struct spi_message msg;
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struct spi_transfer trans;
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int ret;
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/*
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* Turn off CS, possibly adding a delay to ensure the rising edge
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* doesn't come too soon after the end of the data.
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*/
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spi_message_init(&msg);
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memset(&trans, 0, sizeof(trans));
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trans.delay_usecs = ec_spi->end_of_msg_delay;
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spi_message_add_tail(&trans, &msg);
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ret = spi_sync_locked(ec_spi->spi, &msg);
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/* Reset end-of-response timer */
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ec_spi->last_transfer_ns = ktime_get_ns();
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if (ret < 0) {
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dev_err(ec_dev->dev,
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"cs-deassert spi transfer failed: %d\n",
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ret);
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}
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return ret;
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}
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/**
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* receive_n_bytes - receive n bytes from the EC.
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*
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* Assumes buf is a pointer into the ec_dev->din buffer
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*/
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static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
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{
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struct cros_ec_spi *ec_spi = ec_dev->priv;
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struct spi_transfer trans;
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struct spi_message msg;
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int ret;
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BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
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memset(&trans, 0, sizeof(trans));
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trans.cs_change = 1;
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trans.rx_buf = buf;
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trans.len = n;
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spi_message_init(&msg);
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spi_message_add_tail(&trans, &msg);
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ret = spi_sync_locked(ec_spi->spi, &msg);
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if (ret < 0)
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dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
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return ret;
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}
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/**
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* cros_ec_spi_receive_packet - Receive a packet from the EC.
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*
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* This function has two phases: reading the preamble bytes (since if we read
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* data from the EC before it is ready to send, we just get preamble) and
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* reading the actual message.
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*
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* The received data is placed into ec_dev->din.
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*
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* @ec_dev: ChromeOS EC device
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* @need_len: Number of message bytes we need to read
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*/
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static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
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int need_len)
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{
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struct ec_host_response *response;
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u8 *ptr, *end;
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int ret;
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unsigned long deadline;
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int todo;
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BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
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/* Receive data until we see the header byte */
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deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
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while (true) {
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unsigned long start_jiffies = jiffies;
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ret = receive_n_bytes(ec_dev,
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ec_dev->din,
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EC_MSG_PREAMBLE_COUNT);
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if (ret < 0)
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return ret;
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ptr = ec_dev->din;
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for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
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if (*ptr == EC_SPI_FRAME_START) {
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dev_dbg(ec_dev->dev, "msg found at %zd\n",
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ptr - ec_dev->din);
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break;
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}
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}
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if (ptr != end)
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break;
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/*
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* Use the time at the start of the loop as a timeout. This
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* gives us one last shot at getting the transfer and is useful
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* in case we got context switched out for a while.
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*/
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if (time_after(start_jiffies, deadline)) {
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dev_warn(ec_dev->dev, "EC failed to respond in time\n");
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return -ETIMEDOUT;
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}
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}
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/*
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* ptr now points to the header byte. Copy any valid data to the
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* start of our buffer
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*/
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todo = end - ++ptr;
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BUG_ON(todo < 0 || todo > ec_dev->din_size);
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todo = min(todo, need_len);
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memmove(ec_dev->din, ptr, todo);
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ptr = ec_dev->din + todo;
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dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
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need_len, todo);
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need_len -= todo;
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/* If the entire response struct wasn't read, get the rest of it. */
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if (todo < sizeof(*response)) {
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ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
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if (ret < 0)
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return -EBADMSG;
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ptr += (sizeof(*response) - todo);
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todo = sizeof(*response);
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}
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response = (struct ec_host_response *)ec_dev->din;
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/* Abort if data_len is too large. */
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if (response->data_len > ec_dev->din_size)
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return -EMSGSIZE;
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/* Receive data until we have it all */
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while (need_len > 0) {
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/*
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* We can't support transfers larger than the SPI FIFO size
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* unless we have DMA. We don't have DMA on the ISP SPI ports
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* for Exynos. We need a way of asking SPI driver for
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* maximum-supported transfer size.
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*/
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todo = min(need_len, 256);
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dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
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todo, need_len, ptr - ec_dev->din);
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ret = receive_n_bytes(ec_dev, ptr, todo);
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if (ret < 0)
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return ret;
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ptr += todo;
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need_len -= todo;
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}
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dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
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return 0;
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}
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/**
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* cros_ec_spi_receive_response - Receive a response from the EC.
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*
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* This function has two phases: reading the preamble bytes (since if we read
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* data from the EC before it is ready to send, we just get preamble) and
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* reading the actual message.
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*
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* The received data is placed into ec_dev->din.
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*
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* @ec_dev: ChromeOS EC device
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* @need_len: Number of message bytes we need to read
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*/
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static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
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int need_len)
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{
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u8 *ptr, *end;
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int ret;
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unsigned long deadline;
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int todo;
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BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
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/* Receive data until we see the header byte */
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deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
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while (true) {
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unsigned long start_jiffies = jiffies;
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ret = receive_n_bytes(ec_dev,
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ec_dev->din,
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EC_MSG_PREAMBLE_COUNT);
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if (ret < 0)
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return ret;
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ptr = ec_dev->din;
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for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
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if (*ptr == EC_SPI_FRAME_START) {
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dev_dbg(ec_dev->dev, "msg found at %zd\n",
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ptr - ec_dev->din);
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break;
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}
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}
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if (ptr != end)
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break;
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/*
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* Use the time at the start of the loop as a timeout. This
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* gives us one last shot at getting the transfer and is useful
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* in case we got context switched out for a while.
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*/
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if (time_after(start_jiffies, deadline)) {
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dev_warn(ec_dev->dev, "EC failed to respond in time\n");
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return -ETIMEDOUT;
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}
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}
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/*
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* ptr now points to the header byte. Copy any valid data to the
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* start of our buffer
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*/
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todo = end - ++ptr;
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BUG_ON(todo < 0 || todo > ec_dev->din_size);
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todo = min(todo, need_len);
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memmove(ec_dev->din, ptr, todo);
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ptr = ec_dev->din + todo;
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dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
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need_len, todo);
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need_len -= todo;
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/* Receive data until we have it all */
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while (need_len > 0) {
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/*
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* We can't support transfers larger than the SPI FIFO size
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* unless we have DMA. We don't have DMA on the ISP SPI ports
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* for Exynos. We need a way of asking SPI driver for
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* maximum-supported transfer size.
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*/
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todo = min(need_len, 256);
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dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
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todo, need_len, ptr - ec_dev->din);
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ret = receive_n_bytes(ec_dev, ptr, todo);
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if (ret < 0)
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return ret;
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debug_packet(ec_dev->dev, "interim", ptr, todo);
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ptr += todo;
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need_len -= todo;
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}
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dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
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return 0;
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}
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/**
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* cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
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*
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* @ec_dev: ChromeOS EC device
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* @ec_msg: Message to transfer
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*/
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static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
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struct cros_ec_command *ec_msg)
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{
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struct ec_host_response *response;
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struct cros_ec_spi *ec_spi = ec_dev->priv;
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struct spi_transfer trans, trans_delay;
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struct spi_message msg;
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int i, len;
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u8 *ptr;
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u8 *rx_buf;
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u8 sum;
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u8 rx_byte;
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int ret = 0, final_ret;
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unsigned long delay;
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len = cros_ec_prepare_tx(ec_dev, ec_msg);
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dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
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/* If it's too soon to do another transaction, wait */
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delay = ktime_get_ns() - ec_spi->last_transfer_ns;
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if (delay < EC_SPI_RECOVERY_TIME_NS)
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ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
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rx_buf = kzalloc(len, GFP_KERNEL);
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if (!rx_buf)
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return -ENOMEM;
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spi_bus_lock(ec_spi->spi->master);
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/*
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* Leave a gap between CS assertion and clocking of data to allow the
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* EC time to wakeup.
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*/
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spi_message_init(&msg);
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if (ec_spi->start_of_msg_delay) {
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memset(&trans_delay, 0, sizeof(trans_delay));
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trans_delay.delay_usecs = ec_spi->start_of_msg_delay;
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spi_message_add_tail(&trans_delay, &msg);
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}
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/* Transmit phase - send our message */
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memset(&trans, 0, sizeof(trans));
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trans.tx_buf = ec_dev->dout;
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trans.rx_buf = rx_buf;
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trans.len = len;
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trans.cs_change = 1;
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spi_message_add_tail(&trans, &msg);
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ret = spi_sync_locked(ec_spi->spi, &msg);
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/* Get the response */
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if (!ret) {
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/* Verify that EC can process command */
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for (i = 0; i < len; i++) {
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rx_byte = rx_buf[i];
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/*
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* Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
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* markers are all signs that the EC didn't fully
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||
|
* receive our command. e.g., if the EC is flashing
|
||
|
* itself, it can't respond to any commands and instead
|
||
|
* clocks out EC_SPI_PAST_END from its SPI hardware
|
||
|
* buffer. Similar occurrences can happen if the AP is
|
||
|
* too slow to clock out data after asserting CS -- the
|
||
|
* EC will abort and fill its buffer with
|
||
|
* EC_SPI_RX_BAD_DATA.
|
||
|
*
|
||
|
* In all cases, these errors should be safe to retry.
|
||
|
* Report -EAGAIN and let the caller decide what to do
|
||
|
* about that.
|
||
|
*/
|
||
|
if (rx_byte == EC_SPI_PAST_END ||
|
||
|
rx_byte == EC_SPI_RX_BAD_DATA ||
|
||
|
rx_byte == EC_SPI_NOT_READY) {
|
||
|
ret = -EAGAIN;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
if (!ret)
|
||
|
ret = cros_ec_spi_receive_packet(ec_dev,
|
||
|
ec_msg->insize + sizeof(*response));
|
||
|
else if (ret != -EAGAIN)
|
||
|
dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
|
||
|
|
||
|
final_ret = terminate_request(ec_dev);
|
||
|
|
||
|
spi_bus_unlock(ec_spi->spi->master);
|
||
|
|
||
|
if (!ret)
|
||
|
ret = final_ret;
|
||
|
if (ret < 0)
|
||
|
goto exit;
|
||
|
|
||
|
ptr = ec_dev->din;
|
||
|
|
||
|
/* check response error code */
|
||
|
response = (struct ec_host_response *)ptr;
|
||
|
ec_msg->result = response->result;
|
||
|
|
||
|
ret = cros_ec_check_result(ec_dev, ec_msg);
|
||
|
if (ret)
|
||
|
goto exit;
|
||
|
|
||
|
len = response->data_len;
|
||
|
sum = 0;
|
||
|
if (len > ec_msg->insize) {
|
||
|
dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
|
||
|
len, ec_msg->insize);
|
||
|
ret = -EMSGSIZE;
|
||
|
goto exit;
|
||
|
}
|
||
|
|
||
|
for (i = 0; i < sizeof(*response); i++)
|
||
|
sum += ptr[i];
|
||
|
|
||
|
/* copy response packet payload and compute checksum */
|
||
|
memcpy(ec_msg->data, ptr + sizeof(*response), len);
|
||
|
for (i = 0; i < len; i++)
|
||
|
sum += ec_msg->data[i];
|
||
|
|
||
|
if (sum) {
|
||
|
dev_err(ec_dev->dev,
|
||
|
"bad packet checksum, calculated %x\n",
|
||
|
sum);
|
||
|
ret = -EBADMSG;
|
||
|
goto exit;
|
||
|
}
|
||
|
|
||
|
ret = len;
|
||
|
exit:
|
||
|
kfree(rx_buf);
|
||
|
if (ec_msg->command == EC_CMD_REBOOT_EC)
|
||
|
msleep(EC_REBOOT_DELAY_MS);
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
|
||
|
*
|
||
|
* @ec_dev: ChromeOS EC device
|
||
|
* @ec_msg: Message to transfer
|
||
|
*/
|
||
|
static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
|
||
|
struct cros_ec_command *ec_msg)
|
||
|
{
|
||
|
struct cros_ec_spi *ec_spi = ec_dev->priv;
|
||
|
struct spi_transfer trans;
|
||
|
struct spi_message msg;
|
||
|
int i, len;
|
||
|
u8 *ptr;
|
||
|
u8 *rx_buf;
|
||
|
u8 rx_byte;
|
||
|
int sum;
|
||
|
int ret = 0, final_ret;
|
||
|
unsigned long delay;
|
||
|
|
||
|
len = cros_ec_prepare_tx(ec_dev, ec_msg);
|
||
|
dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
|
||
|
|
||
|
/* If it's too soon to do another transaction, wait */
|
||
|
delay = ktime_get_ns() - ec_spi->last_transfer_ns;
|
||
|
if (delay < EC_SPI_RECOVERY_TIME_NS)
|
||
|
ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
|
||
|
|
||
|
rx_buf = kzalloc(len, GFP_KERNEL);
|
||
|
if (!rx_buf)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
spi_bus_lock(ec_spi->spi->master);
|
||
|
|
||
|
/* Transmit phase - send our message */
|
||
|
debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
|
||
|
memset(&trans, 0, sizeof(trans));
|
||
|
trans.tx_buf = ec_dev->dout;
|
||
|
trans.rx_buf = rx_buf;
|
||
|
trans.len = len;
|
||
|
trans.cs_change = 1;
|
||
|
spi_message_init(&msg);
|
||
|
spi_message_add_tail(&trans, &msg);
|
||
|
ret = spi_sync_locked(ec_spi->spi, &msg);
|
||
|
|
||
|
/* Get the response */
|
||
|
if (!ret) {
|
||
|
/* Verify that EC can process command */
|
||
|
for (i = 0; i < len; i++) {
|
||
|
rx_byte = rx_buf[i];
|
||
|
/* See comments in cros_ec_pkt_xfer_spi() */
|
||
|
if (rx_byte == EC_SPI_PAST_END ||
|
||
|
rx_byte == EC_SPI_RX_BAD_DATA ||
|
||
|
rx_byte == EC_SPI_NOT_READY) {
|
||
|
ret = -EAGAIN;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
if (!ret)
|
||
|
ret = cros_ec_spi_receive_response(ec_dev,
|
||
|
ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
|
||
|
else if (ret != -EAGAIN)
|
||
|
dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
|
||
|
|
||
|
final_ret = terminate_request(ec_dev);
|
||
|
|
||
|
spi_bus_unlock(ec_spi->spi->master);
|
||
|
|
||
|
if (!ret)
|
||
|
ret = final_ret;
|
||
|
if (ret < 0)
|
||
|
goto exit;
|
||
|
|
||
|
ptr = ec_dev->din;
|
||
|
|
||
|
/* check response error code */
|
||
|
ec_msg->result = ptr[0];
|
||
|
ret = cros_ec_check_result(ec_dev, ec_msg);
|
||
|
if (ret)
|
||
|
goto exit;
|
||
|
|
||
|
len = ptr[1];
|
||
|
sum = ptr[0] + ptr[1];
|
||
|
if (len > ec_msg->insize) {
|
||
|
dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
|
||
|
len, ec_msg->insize);
|
||
|
ret = -ENOSPC;
|
||
|
goto exit;
|
||
|
}
|
||
|
|
||
|
/* copy response packet payload and compute checksum */
|
||
|
for (i = 0; i < len; i++) {
|
||
|
sum += ptr[i + 2];
|
||
|
if (ec_msg->insize)
|
||
|
ec_msg->data[i] = ptr[i + 2];
|
||
|
}
|
||
|
sum &= 0xff;
|
||
|
|
||
|
debug_packet(ec_dev->dev, "in", ptr, len + 3);
|
||
|
|
||
|
if (sum != ptr[len + 2]) {
|
||
|
dev_err(ec_dev->dev,
|
||
|
"bad packet checksum, expected %02x, got %02x\n",
|
||
|
sum, ptr[len + 2]);
|
||
|
ret = -EBADMSG;
|
||
|
goto exit;
|
||
|
}
|
||
|
|
||
|
ret = len;
|
||
|
exit:
|
||
|
kfree(rx_buf);
|
||
|
if (ec_msg->command == EC_CMD_REBOOT_EC)
|
||
|
msleep(EC_REBOOT_DELAY_MS);
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
|
||
|
{
|
||
|
struct device_node *np = dev->of_node;
|
||
|
u32 val;
|
||
|
int ret;
|
||
|
|
||
|
ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
|
||
|
if (!ret)
|
||
|
ec_spi->start_of_msg_delay = val;
|
||
|
|
||
|
ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
|
||
|
if (!ret)
|
||
|
ec_spi->end_of_msg_delay = val;
|
||
|
}
|
||
|
|
||
|
static int cros_ec_spi_probe(struct spi_device *spi)
|
||
|
{
|
||
|
struct device *dev = &spi->dev;
|
||
|
struct cros_ec_device *ec_dev;
|
||
|
struct cros_ec_spi *ec_spi;
|
||
|
int err;
|
||
|
|
||
|
spi->bits_per_word = 8;
|
||
|
spi->mode = SPI_MODE_0;
|
||
|
err = spi_setup(spi);
|
||
|
if (err < 0)
|
||
|
return err;
|
||
|
|
||
|
ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
|
||
|
if (ec_spi == NULL)
|
||
|
return -ENOMEM;
|
||
|
ec_spi->spi = spi;
|
||
|
ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
|
||
|
if (!ec_dev)
|
||
|
return -ENOMEM;
|
||
|
|
||
|
/* Check for any DT properties */
|
||
|
cros_ec_spi_dt_probe(ec_spi, dev);
|
||
|
|
||
|
spi_set_drvdata(spi, ec_dev);
|
||
|
ec_dev->dev = dev;
|
||
|
ec_dev->priv = ec_spi;
|
||
|
ec_dev->irq = spi->irq;
|
||
|
ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
|
||
|
ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
|
||
|
ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
|
||
|
ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
|
||
|
sizeof(struct ec_host_response) +
|
||
|
sizeof(struct ec_response_get_protocol_info);
|
||
|
ec_dev->dout_size = sizeof(struct ec_host_request);
|
||
|
|
||
|
ec_spi->last_transfer_ns = ktime_get_ns();
|
||
|
|
||
|
err = cros_ec_register(ec_dev);
|
||
|
if (err) {
|
||
|
dev_err(dev, "cannot register EC\n");
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
device_init_wakeup(&spi->dev, true);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static int cros_ec_spi_remove(struct spi_device *spi)
|
||
|
{
|
||
|
struct cros_ec_device *ec_dev;
|
||
|
|
||
|
ec_dev = spi_get_drvdata(spi);
|
||
|
cros_ec_remove(ec_dev);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
#ifdef CONFIG_PM_SLEEP
|
||
|
static int cros_ec_spi_suspend(struct device *dev)
|
||
|
{
|
||
|
struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
|
||
|
|
||
|
return cros_ec_suspend(ec_dev);
|
||
|
}
|
||
|
|
||
|
static int cros_ec_spi_resume(struct device *dev)
|
||
|
{
|
||
|
struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
|
||
|
|
||
|
return cros_ec_resume(ec_dev);
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
|
||
|
cros_ec_spi_resume);
|
||
|
|
||
|
static const struct of_device_id cros_ec_spi_of_match[] = {
|
||
|
{ .compatible = "google,cros-ec-spi", },
|
||
|
{ /* sentinel */ },
|
||
|
};
|
||
|
MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
|
||
|
|
||
|
static const struct spi_device_id cros_ec_spi_id[] = {
|
||
|
{ "cros-ec-spi", 0 },
|
||
|
{ }
|
||
|
};
|
||
|
MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
|
||
|
|
||
|
static struct spi_driver cros_ec_driver_spi = {
|
||
|
.driver = {
|
||
|
.name = "cros-ec-spi",
|
||
|
.of_match_table = of_match_ptr(cros_ec_spi_of_match),
|
||
|
.pm = &cros_ec_spi_pm_ops,
|
||
|
},
|
||
|
.probe = cros_ec_spi_probe,
|
||
|
.remove = cros_ec_spi_remove,
|
||
|
.id_table = cros_ec_spi_id,
|
||
|
};
|
||
|
|
||
|
module_spi_driver(cros_ec_driver_spi);
|
||
|
|
||
|
MODULE_LICENSE("GPL v2");
|
||
|
MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");
|