2020-02-03 17:25:40 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2009-05-26 22:30:14 +08:00
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/*
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* Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2008-2009 PetaLogix
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* Copyright (C) 2006 Atmark Techno, Inc.
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*/
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#ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H
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#define _ASM_MICROBLAZE_MMU_CONTEXT_H
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2011-07-27 07:09:06 +08:00
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#include <linux/atomic.h>
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2017-02-04 07:16:44 +08:00
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#include <linux/mm_types.h>
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2017-10-26 16:43:34 +08:00
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#include <linux/sched.h>
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2017-02-04 07:16:44 +08:00
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2009-05-26 22:30:14 +08:00
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#include <asm/bitops.h>
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#include <asm/mmu.h>
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#include <asm-generic/mm_hooks.h>
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# ifdef __KERNEL__
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/*
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* This function defines the mapping from contexts to VSIDs (virtual
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* segment IDs). We use a skew on both the context and the high 4 bits
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* of the 32-bit virtual address (the "effective segment ID") in order
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* to spread out the entries in the MMU hash table.
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*/
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# define CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
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& 0xffffff)
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/*
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MicroBlaze has 256 contexts, so we can just rotate through these
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as a way of "switching" contexts. If the TID of the TLB is zero,
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the PID/TID comparison is disabled, so we can use a TID of zero
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to represent all kernel pages as shared among all contexts.
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*/
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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}
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# define NO_CONTEXT 256
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# define LAST_CONTEXT 255
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# define FIRST_CONTEXT 1
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/*
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* Set the current MMU context.
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* This is done byloading up the segment registers for the user part of the
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* address space.
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*
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* Since the PGD is immediately available, it is much faster to simply
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* pass this along as a second parameter, which is required for 8xx and
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* can be used for debugging on all processors (if you happen to have
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* an Abatron).
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*/
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extern void set_context(mm_context_t context, pgd_t *pgd);
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/*
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* Bitmap of contexts in use.
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* The size of this bitmap is LAST_CONTEXT + 1 bits.
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*/
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extern unsigned long context_map[];
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/*
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* This caches the next context number that we expect to be free.
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* Its use is an optimization only, we can't rely on this context
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* number to be free, but it usually will be.
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*/
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extern mm_context_t next_mmu_context;
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/*
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* Since we don't have sufficient contexts to give one to every task
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* that could be in the system, we need to be able to steal contexts.
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* These variables support that.
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*/
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extern atomic_t nr_free_contexts;
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extern struct mm_struct *context_mm[LAST_CONTEXT+1];
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extern void steal_context(void);
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/*
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* Get a new mmu context for the address space described by `mm'.
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*/
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static inline void get_mmu_context(struct mm_struct *mm)
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{
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mm_context_t ctx;
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if (mm->context != NO_CONTEXT)
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return;
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while (atomic_dec_if_positive(&nr_free_contexts) < 0)
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steal_context();
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ctx = next_mmu_context;
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while (test_and_set_bit(ctx, context_map)) {
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ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
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if (ctx > LAST_CONTEXT)
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ctx = 0;
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}
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next_mmu_context = (ctx + 1) & LAST_CONTEXT;
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mm->context = ctx;
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context_mm[ctx] = mm;
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}
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/*
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* Set up the context for a new address space.
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*/
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# define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0)
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/*
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* We're finished using the context for an address space.
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*/
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static inline void destroy_context(struct mm_struct *mm)
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{
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if (mm->context != NO_CONTEXT) {
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clear_bit(mm->context, context_map);
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mm->context = NO_CONTEXT;
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atomic_inc(&nr_free_contexts);
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}
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}
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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tsk->thread.pgdir = next->pgd;
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get_mmu_context(next);
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set_context(next->context, next->pgd);
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}
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/*
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* After we have set current->mm to a new value, this activates
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* the context for the new mm so we see the new mappings.
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*/
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static inline void activate_mm(struct mm_struct *active_mm,
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struct mm_struct *mm)
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{
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current->thread.pgdir = mm->pgd;
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get_mmu_context(mm);
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set_context(mm->context, mm->pgd);
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}
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extern void mmu_context_init(void);
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# endif /* __KERNEL__ */
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#endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */
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