2011-10-04 18:19:01 +08:00
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/* exynos_drm_drv.h
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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* Joonyoung Shim <jy0922.shim@samsung.com>
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* Seung-Woo Kim <sw0312.kim@samsung.com>
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*
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2012-12-18 01:30:17 +08:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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2011-10-04 18:19:01 +08:00
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*/
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#ifndef _EXYNOS_DRM_DRV_H_
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#define _EXYNOS_DRM_DRV_H_
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2011-11-12 15:57:42 +08:00
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#include <linux/module.h>
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2011-10-04 18:19:01 +08:00
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2012-03-21 09:55:26 +08:00
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#define MAX_CRTC 3
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2011-12-08 16:54:07 +08:00
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#define MAX_PLANE 5
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2012-03-21 09:55:26 +08:00
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#define MAX_FB_BUFFER 4
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2011-12-08 16:54:07 +08:00
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#define DEFAULT_ZPOS -1
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2011-10-04 18:19:01 +08:00
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2012-08-20 18:55:14 +08:00
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#define _wait_for(COND, MS) ({ \
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unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \
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int ret__ = 0; \
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while (!(COND)) { \
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if (time_after(jiffies, timeout__)) { \
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ret__ = -ETIMEDOUT; \
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break; \
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} \
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} \
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ret__; \
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})
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#define wait_for(COND, MS) _wait_for(COND, MS)
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2011-10-04 18:19:01 +08:00
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struct drm_device;
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struct exynos_drm_overlay;
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struct drm_connector;
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2011-12-16 20:31:12 +08:00
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extern unsigned int drm_vblank_offdelay;
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2011-10-04 18:19:01 +08:00
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/* this enumerates display type. */
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enum exynos_drm_output_type {
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EXYNOS_DISPLAY_TYPE_NONE,
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/* RGB or CPU Interface. */
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EXYNOS_DISPLAY_TYPE_LCD,
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/* HDMI Interface. */
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EXYNOS_DISPLAY_TYPE_HDMI,
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2012-03-21 09:55:26 +08:00
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/* Virtual Display Interface. */
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EXYNOS_DISPLAY_TYPE_VIDI,
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2011-10-04 18:19:01 +08:00
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};
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/*
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* Exynos drm common overlay structure.
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*
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2011-10-14 12:29:46 +08:00
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* @fb_x: offset x on a framebuffer to be displayed.
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* - the unit is screen coordinates.
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* @fb_y: offset y on a framebuffer to be displayed.
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* - the unit is screen coordinates.
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* @fb_width: width of a framebuffer.
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* @fb_height: height of a framebuffer.
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2012-04-24 17:43:10 +08:00
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* @src_width: width of a partial image to be displayed from framebuffer.
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* @src_height: height of a partial image to be displayed from framebuffer.
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2011-10-14 12:29:46 +08:00
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* @crtc_x: offset x on hardware screen.
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* @crtc_y: offset y on hardware screen.
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* @crtc_width: window width to be displayed (hardware screen).
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* @crtc_height: window height to be displayed (hardware screen).
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* @mode_width: width of screen mode.
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* @mode_height: height of screen mode.
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* @refresh: refresh rate.
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* @scan_flag: interlace or progressive way.
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* (it could be DRM_MODE_FLAG_*)
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2011-10-04 18:19:01 +08:00
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* @bpp: pixel size.(in bit)
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2011-12-15 13:36:22 +08:00
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* @pixel_format: fourcc pixel format of this overlay
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* @dma_addr: array of bus(accessed by dma) address to the memory region
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* allocated for a overlay.
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2011-12-08 16:54:07 +08:00
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* @zpos: order of overlay layer(z position).
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2011-10-04 18:19:01 +08:00
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* @default_win: a window to be enabled.
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* @color_key: color key on or off.
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* @index_color: if using color key feature then this value would be used
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* as index color.
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* @local_path: in case of lcd type, local path mode on or off.
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* @transparency: transparency on or off.
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* @activated: activated or not.
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*
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* this structure is common to exynos SoC and its contents would be copied
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* to hardware specific overlay info.
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*/
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struct exynos_drm_overlay {
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2011-10-14 12:29:46 +08:00
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unsigned int fb_x;
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unsigned int fb_y;
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unsigned int fb_width;
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unsigned int fb_height;
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2012-04-24 17:43:10 +08:00
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unsigned int src_width;
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unsigned int src_height;
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2011-10-14 12:29:46 +08:00
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unsigned int crtc_x;
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unsigned int crtc_y;
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unsigned int crtc_width;
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unsigned int crtc_height;
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unsigned int mode_width;
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unsigned int mode_height;
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unsigned int refresh;
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unsigned int scan_flag;
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2011-10-04 18:19:01 +08:00
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unsigned int bpp;
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2011-10-14 12:29:46 +08:00
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unsigned int pitch;
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2011-12-15 13:36:22 +08:00
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uint32_t pixel_format;
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dma_addr_t dma_addr[MAX_FB_BUFFER];
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2011-12-08 16:54:07 +08:00
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int zpos;
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2011-10-04 18:19:01 +08:00
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bool default_win;
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bool color_key;
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unsigned int index_color;
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bool local_path;
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bool transparency;
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bool activated;
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};
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/*
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* Exynos DRM Display Structure.
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* - this structure is common to analog tv, digital tv and lcd panel.
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*
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2014-02-19 20:02:55 +08:00
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* @remove: cleans up the display for removal
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* @mode_fixup: fix mode data comparing to hw specific display mode.
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* @mode_set: convert drm_display_mode to hw specific display mode and
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* would be called by encoder->mode_set().
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2013-06-10 17:20:00 +08:00
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* @check_mode: check if mode is valid or not.
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2014-01-31 05:19:09 +08:00
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* @dpms: display device on or off.
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2014-02-19 20:02:55 +08:00
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* @commit: apply changes to hw
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2011-10-04 18:19:01 +08:00
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*/
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2014-02-19 20:02:55 +08:00
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struct exynos_drm_display;
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2011-10-19 16:23:07 +08:00
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struct exynos_drm_display_ops {
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2014-02-24 18:15:38 +08:00
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int (*create_connector)(struct exynos_drm_display *display,
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struct drm_encoder *encoder);
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2014-02-19 20:02:55 +08:00
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void (*remove)(struct exynos_drm_display *display);
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void (*mode_fixup)(struct exynos_drm_display *display,
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struct drm_connector *connector,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode);
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void (*mode_set)(struct exynos_drm_display *display,
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struct drm_display_mode *mode);
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int (*check_mode)(struct exynos_drm_display *display,
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struct drm_display_mode *mode);
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void (*dpms)(struct exynos_drm_display *display, int mode);
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void (*commit)(struct exynos_drm_display *display);
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};
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/*
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* Exynos drm display structure, maps 1:1 with an encoder/connector
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*
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* @list: the list entry for this manager
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* @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
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* @encoder: encoder object this display maps to
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* @connector: connector object this display maps to
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* @ops: pointer to callbacks for exynos drm specific functionality
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* @ctx: A pointer to the display's implementation specific context
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*/
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struct exynos_drm_display {
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struct list_head list;
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2011-10-04 18:19:01 +08:00
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enum exynos_drm_output_type type;
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2014-02-19 20:02:55 +08:00
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struct drm_encoder *encoder;
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struct drm_connector *connector;
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struct exynos_drm_display_ops *ops;
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void *ctx;
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2011-10-04 18:19:01 +08:00
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};
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/*
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* Exynos drm manager ops
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*
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2011-12-06 10:06:54 +08:00
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* @dpms: control device power.
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2014-01-31 05:19:19 +08:00
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* @mode_fixup: fix mode data before applying it
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2014-01-31 05:19:18 +08:00
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* @mode_set: set the given mode to the manager
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2011-10-04 18:19:01 +08:00
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* @commit: set current hw specific display mode to hw.
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* @enable_vblank: specific driver callback for enabling vblank interrupt.
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* @disable_vblank: specific driver callback for disabling vblank interrupt.
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2012-12-06 22:46:00 +08:00
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* @wait_for_vblank: wait for vblank interrupt to make sure that
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* hardware overlay is updated.
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2014-01-31 05:19:02 +08:00
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* @win_mode_set: copy drm overlay info to hw specific overlay info.
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* @win_commit: apply hardware specific overlay data to registers.
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* @win_enable: enable hardware specific overlay.
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* @win_disable: disable hardware specific overlay.
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2011-10-04 18:19:01 +08:00
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*/
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2014-01-31 05:19:06 +08:00
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struct exynos_drm_manager;
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2011-10-04 18:19:01 +08:00
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struct exynos_drm_manager_ops {
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2014-01-31 05:19:06 +08:00
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void (*dpms)(struct exynos_drm_manager *mgr, int mode);
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2014-01-31 05:19:19 +08:00
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bool (*mode_fixup)(struct exynos_drm_manager *mgr,
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2012-07-17 23:56:50 +08:00
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const struct drm_display_mode *mode,
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2012-03-16 17:47:04 +08:00
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struct drm_display_mode *adjusted_mode);
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2014-01-31 05:19:18 +08:00
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void (*mode_set)(struct exynos_drm_manager *mgr,
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const struct drm_display_mode *mode);
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2014-01-31 05:19:06 +08:00
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void (*commit)(struct exynos_drm_manager *mgr);
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int (*enable_vblank)(struct exynos_drm_manager *mgr);
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void (*disable_vblank)(struct exynos_drm_manager *mgr);
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void (*wait_for_vblank)(struct exynos_drm_manager *mgr);
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void (*win_mode_set)(struct exynos_drm_manager *mgr,
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2014-01-31 05:19:02 +08:00
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struct exynos_drm_overlay *overlay);
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2014-01-31 05:19:06 +08:00
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void (*win_commit)(struct exynos_drm_manager *mgr, int zpos);
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void (*win_enable)(struct exynos_drm_manager *mgr, int zpos);
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void (*win_disable)(struct exynos_drm_manager *mgr, int zpos);
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2011-10-04 18:19:01 +08:00
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};
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/*
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2014-02-19 20:02:55 +08:00
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* Exynos drm common manager structure, maps 1:1 with a crtc
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2011-10-04 18:19:01 +08:00
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*
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2014-02-19 20:02:55 +08:00
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* @list: the list entry for this manager
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* @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
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* @drm_dev: pointer to the drm device
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2014-05-09 13:25:20 +08:00
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* @crtc: crtc object.
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2014-02-19 20:02:55 +08:00
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* @pipe: the pipe number for this crtc/manager
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* @ops: pointer to callbacks for exynos drm specific functionality
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2014-01-31 05:19:06 +08:00
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* @ctx: A pointer to the manager's implementation specific context
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2011-10-04 18:19:01 +08:00
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*/
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struct exynos_drm_manager {
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2014-02-19 20:02:55 +08:00
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struct list_head list;
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enum exynos_drm_output_type type;
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struct drm_device *drm_dev;
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2014-05-09 13:25:20 +08:00
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struct drm_crtc *crtc;
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2011-10-04 18:19:01 +08:00
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int pipe;
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struct exynos_drm_manager_ops *ops;
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2014-01-31 05:19:06 +08:00
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void *ctx;
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2011-10-04 18:19:01 +08:00
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};
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2012-05-17 19:06:32 +08:00
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struct exynos_drm_g2d_private {
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struct device *dev;
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struct list_head inuse_cmdlist;
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struct list_head event_list;
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drm/exynos: add userptr feature for g2d module
This patch adds userptr feautre for G2D module.
The userptr means user space address allocated by malloc().
And the purpose of this feature is to make G2D's dma able
to access the user space region.
To user this feature, user should flag G2D_BUF_USRPTR to
offset variable of struct drm_exynos_g2d_cmd and fill
struct drm_exynos_g2d_userptr with user space address
and size for it and then should set a pointer to
drm_exynos_g2d_userptr object to data variable of struct
drm_exynos_g2d_cmd. The last bit of offset variable is used
to check if the cmdlist's buffer type is userptr or not.
If userptr, the g2d driver gets user space address and size
and then gets pages through get_user_pages().
(another case is counted as gem handle)
Below is sample codes:
static void set_cmd(struct drm_exynos_g2d_cmd *cmd,
unsigned long offset, unsigned long data)
{
cmd->offset = offset;
cmd->data = data;
}
static int solid_fill_test(int x, int y, unsigned long userptr)
{
struct drm_exynos_g2d_cmd cmd_gem[5];
struct drm_exynos_g2d_userptr g2d_userptr;
unsigned int gem_nr = 0;
...
g2d_userptr.userptr = userptr;
g2d_userptr.size = x * y * 4;
set_cmd(&cmd_gem[gem_nr++], DST_BASE_ADDR_REG |
G2D_BUF_USERPTR,
(unsigned long)&g2d_userptr);
...
}
int main(int argc, char **argv)
{
unsigned long addr;
...
addr = malloc(x * y * 4);
...
solid_fill_test(x, y, addr);
...
}
And next, the pages are mapped with iommu table and the device
address is set to cmdlist so that G2D's dma can access it.
As you may know, the pages from get_user_pages() are pinned.
In other words, they CAN NOT be migrated and also swapped out.
So the dma access would be safe.
But the use of userptr feature has performance overhead so
this patch also has memory pool to the userptr feature.
Please, assume that user sends cmdlist filled with userptr
and size every time to g2d driver, and the get_user_pages
funcion will be called every time.
The memory pool has maximum 64MB size and the userptr that
user had ever sent, is holded in the memory pool.
This meaning is that if the userptr from user is same as one
in the memory pool, device address to the userptr in the memory
pool is set to cmdlist.
And last, the pages from get_user_pages() will be freed once
user calls free() and the dma access is completed. Actually,
get_user_pages() takes 2 reference counts if the user process
has never accessed user region allocated by malloc(). Then, if
the user calls free(), the page reference count becomes 1 and
becomes 0 with put_page() call. And the reverse holds as well.
This means how the pages backed are used by dma and freed.
This patch is based on "drm/exynos: add iommu support for g2d",
https://patchwork.kernel.org/patch/1629481/
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-11-04 21:48:52 +08:00
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struct list_head userptr_list;
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2012-05-17 19:06:32 +08:00
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};
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drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
struct exynos_drm_ipp_private {
|
|
|
|
|
struct device *dev;
|
|
|
|
|
struct list_head event_list;
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-17 19:06:32 +08:00
|
|
|
struct drm_exynos_file_private {
|
|
|
|
|
struct exynos_drm_g2d_private *g2d_priv;
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
struct exynos_drm_ipp_private *ipp_priv;
|
2013-12-20 18:16:24 +08:00
|
|
|
struct file *anon_filp;
|
2012-05-17 19:06:32 +08:00
|
|
|
};
|
|
|
|
|
|
2011-10-04 18:19:01 +08:00
|
|
|
/*
|
|
|
|
|
* Exynos drm private structure.
|
2012-10-20 22:53:42 +08:00
|
|
|
*
|
|
|
|
|
* @da_start: start address to device address space.
|
|
|
|
|
* with iommu, device address space starts from this address
|
|
|
|
|
* otherwise default one.
|
|
|
|
|
* @da_space_size: size of device address space.
|
|
|
|
|
* if 0 then default value is used for it.
|
2014-05-09 13:25:20 +08:00
|
|
|
* @pipe: the pipe number for this crtc/manager.
|
2011-10-04 18:19:01 +08:00
|
|
|
*/
|
|
|
|
|
struct exynos_drm_private {
|
|
|
|
|
struct drm_fb_helper *fb_helper;
|
|
|
|
|
|
2011-10-14 12:29:51 +08:00
|
|
|
/* list head for new event to be added. */
|
2011-10-04 18:19:01 +08:00
|
|
|
struct list_head pageflip_event_list;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* created crtc object would be contained at this array and
|
|
|
|
|
* this array is used to be aware of which crtc did it request vblank.
|
|
|
|
|
*/
|
|
|
|
|
struct drm_crtc *crtc[MAX_CRTC];
|
2012-06-27 13:27:06 +08:00
|
|
|
struct drm_property *plane_zpos_property;
|
2012-06-27 13:27:11 +08:00
|
|
|
struct drm_property *crtc_mode_property;
|
2012-10-20 22:53:42 +08:00
|
|
|
|
|
|
|
|
unsigned long da_start;
|
|
|
|
|
unsigned long da_space_size;
|
2014-05-09 13:25:20 +08:00
|
|
|
|
|
|
|
|
unsigned int pipe;
|
2011-10-04 18:19:01 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Exynos drm sub driver structure.
|
|
|
|
|
*
|
|
|
|
|
* @list: sub driver has its own list object to register to exynos drm driver.
|
2012-04-05 19:49:27 +08:00
|
|
|
* @dev: pointer to device object for subdrv device driver.
|
2011-10-04 18:19:01 +08:00
|
|
|
* @drm_dev: pointer to drm_device and this pointer would be set
|
|
|
|
|
* when sub driver calls exynos_drm_subdrv_register().
|
2012-04-05 19:49:27 +08:00
|
|
|
* @manager: subdrv has its own manager to control a hardware appropriately
|
2014-05-09 13:25:20 +08:00
|
|
|
* and we can access a hardware drawing on this manager.
|
2011-10-04 18:19:01 +08:00
|
|
|
* @probe: this callback would be called by exynos drm driver after
|
2014-05-09 13:25:20 +08:00
|
|
|
* subdrv is registered to it.
|
2011-10-04 18:19:01 +08:00
|
|
|
* @remove: this callback is used to release resources created
|
2014-05-09 13:25:20 +08:00
|
|
|
* by probe callback.
|
2012-03-16 17:47:09 +08:00
|
|
|
* @open: this would be called with drm device file open.
|
|
|
|
|
* @close: this would be called with drm device file close.
|
2011-10-04 18:19:01 +08:00
|
|
|
*/
|
|
|
|
|
struct exynos_drm_subdrv {
|
|
|
|
|
struct list_head list;
|
2012-04-05 19:49:27 +08:00
|
|
|
struct device *dev;
|
2011-10-04 18:19:01 +08:00
|
|
|
struct drm_device *drm_dev;
|
|
|
|
|
|
2011-10-14 12:29:48 +08:00
|
|
|
int (*probe)(struct drm_device *drm_dev, struct device *dev);
|
2012-09-05 13:12:06 +08:00
|
|
|
void (*remove)(struct drm_device *drm_dev, struct device *dev);
|
2012-03-16 17:47:09 +08:00
|
|
|
int (*open)(struct drm_device *drm_dev, struct device *dev,
|
|
|
|
|
struct drm_file *file);
|
|
|
|
|
void (*close)(struct drm_device *drm_dev, struct device *dev,
|
|
|
|
|
struct drm_file *file);
|
2011-10-04 18:19:01 +08:00
|
|
|
};
|
|
|
|
|
|
2014-05-09 13:25:20 +08:00
|
|
|
/* This function would be called by non kms drivers such as g2d and ipp. */
|
2011-10-04 18:19:01 +08:00
|
|
|
int exynos_drm_subdrv_register(struct exynos_drm_subdrv *drm_subdrv);
|
|
|
|
|
|
2012-03-16 17:47:08 +08:00
|
|
|
/* this function removes subdrv list from exynos drm driver */
|
2011-10-04 18:19:01 +08:00
|
|
|
int exynos_drm_subdrv_unregister(struct exynos_drm_subdrv *drm_subdrv);
|
|
|
|
|
|
2014-05-09 13:25:20 +08:00
|
|
|
int exynos_drm_device_subdrv_probe(struct drm_device *dev);
|
|
|
|
|
int exynos_drm_device_subdrv_remove(struct drm_device *dev);
|
2012-03-16 17:47:09 +08:00
|
|
|
int exynos_drm_subdrv_open(struct drm_device *dev, struct drm_file *file);
|
|
|
|
|
void exynos_drm_subdrv_close(struct drm_device *dev, struct drm_file *file);
|
|
|
|
|
|
2012-10-16 08:20:13 +08:00
|
|
|
/*
|
|
|
|
|
* this function registers exynos drm hdmi platform device. It ensures only one
|
|
|
|
|
* instance of the device is created.
|
|
|
|
|
*/
|
2013-04-22 17:40:34 +08:00
|
|
|
int exynos_platform_device_hdmi_register(void);
|
2012-10-16 08:20:13 +08:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* this function unregisters exynos drm hdmi platform device if it exists.
|
|
|
|
|
*/
|
|
|
|
|
void exynos_platform_device_hdmi_unregister(void);
|
|
|
|
|
|
2013-04-23 13:02:53 +08:00
|
|
|
/*
|
|
|
|
|
* this function registers exynos drm ipp platform device.
|
|
|
|
|
*/
|
|
|
|
|
int exynos_platform_device_ipp_register(void);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* this function unregisters exynos drm ipp platform device if it exists.
|
|
|
|
|
*/
|
|
|
|
|
void exynos_platform_device_ipp_unregister(void);
|
|
|
|
|
|
2014-03-17 20:03:56 +08:00
|
|
|
#ifdef CONFIG_DRM_EXYNOS_DPI
|
2014-05-09 13:25:20 +08:00
|
|
|
int exynos_dpi_probe(struct drm_device *drm_dev, struct device *dev);
|
|
|
|
|
int exynos_dpi_remove(struct drm_device *drm_dev, struct device *dev);
|
|
|
|
|
struct device_node *exynos_dpi_of_find_panel_node(struct device *dev);
|
2014-03-17 20:03:56 +08:00
|
|
|
#else
|
2014-05-09 13:25:20 +08:00
|
|
|
static inline int exynos_dpi_probe(struct drm_device *drm_dev,
|
|
|
|
|
struct device *dev) { return 0; }
|
|
|
|
|
static inline int exynos_dpi_remove(struct drm_device *drm_dev,
|
|
|
|
|
struct device *dev) { return 0; }
|
|
|
|
|
static inline struct device_node
|
|
|
|
|
*exynos_dpi_of_find_panel_node(struct device *dev)
|
|
|
|
|
{ return NULL; }
|
2014-03-17 20:03:56 +08:00
|
|
|
#endif
|
|
|
|
|
|
2014-05-09 13:25:20 +08:00
|
|
|
/*
|
|
|
|
|
* this function registers exynos drm vidi platform device/driver.
|
|
|
|
|
*/
|
|
|
|
|
int exynos_drm_probe_vidi(void);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* this function unregister exynos drm vidi platform device/driver.
|
|
|
|
|
*/
|
|
|
|
|
void exynos_drm_remove_vidi(void);
|
|
|
|
|
|
|
|
|
|
/* This function creates a encoder and a connector, and initializes them. */
|
|
|
|
|
int exynos_drm_create_enc_conn(struct drm_device *dev,
|
|
|
|
|
struct exynos_drm_display *display);
|
|
|
|
|
|
|
|
|
|
struct component_ops;
|
|
|
|
|
int exynos_drm_component_add(struct device *dev,
|
|
|
|
|
const struct component_ops *ops);
|
|
|
|
|
|
|
|
|
|
void exynos_drm_component_del(struct device *dev,
|
|
|
|
|
const struct component_ops *ops);
|
|
|
|
|
|
|
|
|
|
extern struct platform_driver fimd_driver;
|
2014-01-31 05:19:23 +08:00
|
|
|
extern struct platform_driver dp_driver;
|
2014-04-04 00:19:56 +08:00
|
|
|
extern struct platform_driver dsi_driver;
|
2012-03-16 17:47:08 +08:00
|
|
|
extern struct platform_driver mixer_driver;
|
2014-05-09 13:25:20 +08:00
|
|
|
extern struct platform_driver hdmi_driver;
|
2012-03-16 17:47:08 +08:00
|
|
|
extern struct platform_driver exynos_drm_common_hdmi_driver;
|
2012-03-21 09:55:26 +08:00
|
|
|
extern struct platform_driver vidi_driver;
|
2012-05-17 19:06:32 +08:00
|
|
|
extern struct platform_driver g2d_driver;
|
2012-12-14 16:58:55 +08:00
|
|
|
extern struct platform_driver fimc_driver;
|
2012-12-14 16:58:56 +08:00
|
|
|
extern struct platform_driver rotator_driver;
|
2012-12-14 16:58:57 +08:00
|
|
|
extern struct platform_driver gsc_driver;
|
drm/exynos: add ipp subsystem
This patch adds Image Post Processing(IPP) support for exynos drm driver.
IPP supports image scaler/rotator and input/output DMA operations
using IPP subsystem framework to control FIMC, Rotator and GSC hardware
and supports some user interfaces for user side.
And each IPP-based drivers support Memory to Memory operations
with various converting. And in case of FIMC hardware, it also supports
Writeback and Display output operations through local path.
Features:
- Memory to Memory operation support.
- Various pixel formats support.
- Image scaling support.
- Color Space Conversion support.
- Image crop operation support.
- Rotate operation support to 90, 180 or 270 degree.
- Flip operation support to vertical, horizontal or both.
- Writeback operation support to display blended image of FIMD fifo on screen
A summary to IPP Subsystem operations:
First of all, user should get property capabilities from IPP subsystem
and set these properties to hardware registers for desired operations.
The properties could be pixel format, position, rotation degree and
flip operation.
And next, user should set source and destination buffer data using
DRM_EXYNOS_IPP_QUEUE_BUF ioctl command with gem handles to source and
destinition buffers.
And next, user can control user-desired hardware with desired operations
such as play, stop, pause and resume controls.
And finally, user can aware of dma operation completion and also get
destination buffer that it contains user-desried result through dequeue
command.
IOCTL commands:
- DRM_EXYNOS_IPP_GET_PROPERTY
. get ipp driver capabilitis and id.
- DRM_EXYNOS_IPP_SET_PROPERTY
. set format, position, rotation, flip to source and destination buffers
- DRM_EXYNOS_IPP_QUEUE_BUF
. enqueue/dequeue buffer and make event list.
- DRM_EXYNOS_IPP_CMD_CTRL
. play/stop/pause/resume control.
Event:
- DRM_EXYNOS_IPP_EVENT
. a event to notify dma operation completion to user side.
Basic control flow:
Open -> Get properties -> User choose desired IPP sub driver(FIMC, Rotator
or GSCALER) -> Set Property -> Create gem handle -> Enqueue to source and
destination buffers -> Command control(Play) -> Event is notified to User
-> User gets destinition buffer complated -> (Enqueue to source and
destination buffers -> Event is notified to User) * N -> Queue/Dequeue to
source and destination buffers -> Command control(Stop) -> Free gem handle
-> Close
Changelog v1 ~ v5:
- added comments, code fixups and cleanups.
Signed-off-by: Eunchul Kim <chulspro.kim@samsung.com>
Signed-off-by: Jinyoung Jeon <jy0.jeon@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-12-14 17:10:31 +08:00
|
|
|
extern struct platform_driver ipp_driver;
|
2011-10-04 18:19:01 +08:00
|
|
|
#endif
|