2017-11-03 18:28:30 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2018-05-16 16:04:24 +08:00
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/*
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2015-04-30 04:08:59 +08:00
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* debugfs.c - Designware USB2 DRD controller debugfs
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*
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* Copyright (C) 2015 Intel Corporation
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* Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
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*/
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#include <linux/spinlock.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/uaccess.h>
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#include "core.h"
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#include "debug.h"
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#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
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IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
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2018-05-16 16:04:24 +08:00
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2015-04-30 04:08:59 +08:00
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/**
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2018-05-16 16:04:24 +08:00
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* testmode_write() - change usb test mode state.
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* @file: The file to write to.
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* @ubuf: The buffer where user wrote.
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* @count: The ubuf size.
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* @ppos: Unused parameter.
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2015-04-30 04:08:59 +08:00
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*/
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static ssize_t testmode_write(struct file *file, const char __user *ubuf, size_t
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count, loff_t *ppos)
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{
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struct seq_file *s = file->private_data;
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struct dwc2_hsotg *hsotg = s->private;
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unsigned long flags;
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u32 testmode = 0;
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char buf[32];
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if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
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return -EFAULT;
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if (!strncmp(buf, "test_j", 6))
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2020-06-18 22:42:06 +08:00
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testmode = USB_TEST_J;
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2015-04-30 04:08:59 +08:00
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else if (!strncmp(buf, "test_k", 6))
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2020-06-18 22:42:06 +08:00
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testmode = USB_TEST_K;
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2015-04-30 04:08:59 +08:00
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else if (!strncmp(buf, "test_se0_nak", 12))
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2020-06-18 22:42:06 +08:00
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testmode = USB_TEST_SE0_NAK;
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2015-04-30 04:08:59 +08:00
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else if (!strncmp(buf, "test_packet", 11))
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2020-06-18 22:42:06 +08:00
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testmode = USB_TEST_PACKET;
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2015-04-30 04:08:59 +08:00
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else if (!strncmp(buf, "test_force_enable", 17))
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2020-06-18 22:42:06 +08:00
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testmode = USB_TEST_FORCE_ENABLE;
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2015-04-30 04:08:59 +08:00
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else
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testmode = 0;
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spin_lock_irqsave(&hsotg->lock, flags);
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2015-08-07 07:11:54 +08:00
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dwc2_hsotg_set_test_mode(hsotg, testmode);
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2015-04-30 04:08:59 +08:00
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spin_unlock_irqrestore(&hsotg->lock, flags);
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return count;
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}
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/**
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2018-05-16 16:04:24 +08:00
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* testmode_show() - debugfs: show usb test mode state
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* @s: The seq file to write to.
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* @unused: Unused parameter.
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2015-04-30 04:08:59 +08:00
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*
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* This debugfs entry shows which usb test mode is currently enabled.
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*/
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static int testmode_show(struct seq_file *s, void *unused)
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{
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struct dwc2_hsotg *hsotg = s->private;
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unsigned long flags;
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int dctl;
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spin_lock_irqsave(&hsotg->lock, flags);
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2018-07-26 22:00:13 +08:00
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dctl = dwc2_readl(hsotg, DCTL);
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2015-04-30 04:08:59 +08:00
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dctl &= DCTL_TSTCTL_MASK;
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dctl >>= DCTL_TSTCTL_SHIFT;
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spin_unlock_irqrestore(&hsotg->lock, flags);
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switch (dctl) {
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case 0:
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seq_puts(s, "no test\n");
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break;
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2020-06-18 22:42:06 +08:00
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case USB_TEST_J:
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2015-04-30 04:08:59 +08:00
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seq_puts(s, "test_j\n");
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break;
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2020-06-18 22:42:06 +08:00
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case USB_TEST_K:
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2015-04-30 04:08:59 +08:00
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seq_puts(s, "test_k\n");
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break;
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2020-06-18 22:42:06 +08:00
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case USB_TEST_SE0_NAK:
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2015-04-30 04:08:59 +08:00
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seq_puts(s, "test_se0_nak\n");
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break;
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2020-06-18 22:42:06 +08:00
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case USB_TEST_PACKET:
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2015-04-30 04:08:59 +08:00
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seq_puts(s, "test_packet\n");
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break;
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2020-06-18 22:42:06 +08:00
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case USB_TEST_FORCE_ENABLE:
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2015-04-30 04:08:59 +08:00
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seq_puts(s, "test_force_enable\n");
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break;
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default:
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seq_printf(s, "UNKNOWN %d\n", dctl);
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}
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return 0;
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}
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static int testmode_open(struct inode *inode, struct file *file)
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{
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return single_open(file, testmode_show, inode->i_private);
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}
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static const struct file_operations testmode_fops = {
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.owner = THIS_MODULE,
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.open = testmode_open,
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.write = testmode_write,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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/**
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* state_show - debugfs: show overall driver and device state.
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* @seq: The seq file to write to.
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* @v: Unused parameter.
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*
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* This debugfs entry shows the overall state of the hardware and
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* some general information about each of the endpoints available
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* to the system.
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*/
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static int state_show(struct seq_file *seq, void *v)
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{
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struct dwc2_hsotg *hsotg = seq->private;
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int idx;
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seq_printf(seq, "DCFG=0x%08x, DCTL=0x%08x, DSTS=0x%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, DCFG),
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dwc2_readl(hsotg, DCTL),
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dwc2_readl(hsotg, DSTS));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "DIEPMSK=0x%08x, DOEPMASK=0x%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, DIEPMSK), dwc2_readl(hsotg, DOEPMSK));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "GINTMSK=0x%08x, GINTSTS=0x%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, GINTMSK),
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dwc2_readl(hsotg, GINTSTS));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "DAINTMSK=0x%08x, DAINT=0x%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, DAINTMSK),
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dwc2_readl(hsotg, DAINT));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "GNPTXSTS=0x%08x, GRXSTSR=%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, GNPTXSTS),
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dwc2_readl(hsotg, GRXSTSR));
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2015-04-30 04:08:59 +08:00
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seq_puts(seq, "\nEndpoint status:\n");
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for (idx = 0; idx < hsotg->num_of_eps; idx++) {
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u32 in, out;
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2018-07-26 22:00:13 +08:00
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in = dwc2_readl(hsotg, DIEPCTL(idx));
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out = dwc2_readl(hsotg, DOEPCTL(idx));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "ep%d: DIEPCTL=0x%08x, DOEPCTL=0x%08x",
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idx, in, out);
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2018-07-26 22:00:13 +08:00
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in = dwc2_readl(hsotg, DIEPTSIZ(idx));
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out = dwc2_readl(hsotg, DOEPTSIZ(idx));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, ", DIEPTSIZ=0x%08x, DOEPTSIZ=0x%08x",
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in, out);
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seq_puts(seq, "\n");
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}
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return 0;
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}
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2018-02-15 00:08:18 +08:00
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DEFINE_SHOW_ATTRIBUTE(state);
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2015-04-30 04:08:59 +08:00
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/**
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* fifo_show - debugfs: show the fifo information
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* @seq: The seq_file to write data to.
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* @v: Unused parameter.
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*
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* Show the FIFO information for the overall fifo and all the
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* periodic transmission FIFOs.
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*/
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static int fifo_show(struct seq_file *seq, void *v)
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{
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struct dwc2_hsotg *hsotg = seq->private;
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2019-12-19 19:34:32 +08:00
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int fifo_count = dwc2_hsotg_tx_fifo_count(hsotg);
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2015-04-30 04:08:59 +08:00
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u32 val;
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int idx;
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seq_puts(seq, "Non-periodic FIFOs:\n");
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2018-07-26 22:00:13 +08:00
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seq_printf(seq, "RXFIFO: Size %d\n", dwc2_readl(hsotg, GRXFSIZ));
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2015-04-30 04:08:59 +08:00
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2018-07-26 22:00:13 +08:00
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val = dwc2_readl(hsotg, GNPTXFSIZ);
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "NPTXFIFO: Size %d, Start 0x%08x\n",
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val >> FIFOSIZE_DEPTH_SHIFT,
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2016-11-17 07:34:02 +08:00
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val & FIFOSIZE_STARTADDR_MASK);
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2015-04-30 04:08:59 +08:00
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seq_puts(seq, "\nPeriodic TXFIFOs:\n");
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2019-12-19 19:34:32 +08:00
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for (idx = 1; idx <= fifo_count; idx++) {
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2018-07-26 22:00:13 +08:00
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val = dwc2_readl(hsotg, DPTXFSIZN(idx));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "\tDPTXFIFO%2d: Size %d, Start 0x%08x\n", idx,
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val >> FIFOSIZE_DEPTH_SHIFT,
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val & FIFOSIZE_STARTADDR_MASK);
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}
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return 0;
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}
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2018-02-15 00:08:18 +08:00
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DEFINE_SHOW_ATTRIBUTE(fifo);
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2015-04-30 04:08:59 +08:00
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static const char *decode_direction(int is_in)
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{
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return is_in ? "in" : "out";
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}
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/**
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* ep_show - debugfs: show the state of an endpoint.
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* @seq: The seq_file to write data to.
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* @v: Unused parameter.
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*
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* This debugfs entry shows the state of the given endpoint (one is
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* registered for each available).
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*/
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static int ep_show(struct seq_file *seq, void *v)
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{
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2015-08-07 07:11:54 +08:00
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struct dwc2_hsotg_ep *ep = seq->private;
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2015-04-30 04:08:59 +08:00
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struct dwc2_hsotg *hsotg = ep->parent;
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2015-08-07 07:11:54 +08:00
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struct dwc2_hsotg_req *req;
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2015-04-30 04:08:59 +08:00
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int index = ep->index;
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int show_limit = 15;
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unsigned long flags;
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seq_printf(seq, "Endpoint index %d, named %s, dir %s:\n",
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ep->index, ep->ep.name, decode_direction(ep->dir_in));
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/* first show the register state */
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seq_printf(seq, "\tDIEPCTL=0x%08x, DOEPCTL=0x%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, DIEPCTL(index)),
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dwc2_readl(hsotg, DOEPCTL(index)));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "\tDIEPDMA=0x%08x, DOEPDMA=0x%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, DIEPDMA(index)),
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dwc2_readl(hsotg, DOEPDMA(index)));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "\tDIEPINT=0x%08x, DOEPINT=0x%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, DIEPINT(index)),
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dwc2_readl(hsotg, DOEPINT(index)));
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2015-04-30 04:08:59 +08:00
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seq_printf(seq, "\tDIEPTSIZ=0x%08x, DOEPTSIZ=0x%08x\n",
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2018-07-26 22:00:13 +08:00
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dwc2_readl(hsotg, DIEPTSIZ(index)),
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dwc2_readl(hsotg, DOEPTSIZ(index)));
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2015-04-30 04:08:59 +08:00
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seq_puts(seq, "\n");
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seq_printf(seq, "mps %d\n", ep->ep.maxpacket);
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seq_printf(seq, "total_data=%ld\n", ep->total_data);
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seq_printf(seq, "request list (%p,%p):\n",
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ep->queue.next, ep->queue.prev);
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spin_lock_irqsave(&hsotg->lock, flags);
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list_for_each_entry(req, &ep->queue, queue) {
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if (--show_limit < 0) {
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seq_puts(seq, "not showing more requests...\n");
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break;
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}
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seq_printf(seq, "%c req %p: %d bytes @%p, ",
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req == ep->req ? '*' : ' ',
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req, req->req.length, req->req.buf);
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|
|
seq_printf(seq, "%d done, res %d\n",
|
|
|
|
|
req->req.actual, req->req.status);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
spin_unlock_irqrestore(&hsotg->lock, flags);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2018-02-15 00:08:18 +08:00
|
|
|
DEFINE_SHOW_ATTRIBUTE(ep);
|
2015-04-30 04:08:59 +08:00
|
|
|
|
|
|
|
|
/**
|
2015-08-07 07:11:54 +08:00
|
|
|
* dwc2_hsotg_create_debug - create debugfs directory and files
|
2015-04-30 04:08:59 +08:00
|
|
|
* @hsotg: The driver state
|
|
|
|
|
*
|
|
|
|
|
* Create the debugfs files to allow the user to get information
|
|
|
|
|
* about the state of the system. The directory name is created
|
|
|
|
|
* with the same name as the device itself, in case we end up
|
|
|
|
|
* with multiple blocks in future systems.
|
|
|
|
|
*/
|
2015-08-07 07:11:54 +08:00
|
|
|
static void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg)
|
2015-04-30 04:08:59 +08:00
|
|
|
{
|
|
|
|
|
struct dentry *root;
|
2017-01-18 12:30:27 +08:00
|
|
|
unsigned int epidx;
|
2015-04-30 04:08:59 +08:00
|
|
|
|
|
|
|
|
root = hsotg->debug_root;
|
|
|
|
|
|
|
|
|
|
/* create general state file */
|
2018-05-29 23:31:00 +08:00
|
|
|
debugfs_create_file("state", 0444, root, hsotg, &state_fops);
|
|
|
|
|
debugfs_create_file("testmode", 0644, root, hsotg, &testmode_fops);
|
|
|
|
|
debugfs_create_file("fifo", 0444, root, hsotg, &fifo_fops);
|
2015-04-30 04:08:59 +08:00
|
|
|
|
|
|
|
|
/* Create one file for each out endpoint */
|
|
|
|
|
for (epidx = 0; epidx < hsotg->num_of_eps; epidx++) {
|
2015-08-07 07:11:54 +08:00
|
|
|
struct dwc2_hsotg_ep *ep;
|
2015-04-30 04:08:59 +08:00
|
|
|
|
|
|
|
|
ep = hsotg->eps_out[epidx];
|
2018-05-29 23:31:00 +08:00
|
|
|
if (ep)
|
|
|
|
|
debugfs_create_file(ep->name, 0444, root, ep, &ep_fops);
|
2015-04-30 04:08:59 +08:00
|
|
|
}
|
|
|
|
|
/* Create one file for each in endpoint. EP0 is handled with out eps */
|
|
|
|
|
for (epidx = 1; epidx < hsotg->num_of_eps; epidx++) {
|
2015-08-07 07:11:54 +08:00
|
|
|
struct dwc2_hsotg_ep *ep;
|
2015-04-30 04:08:59 +08:00
|
|
|
|
|
|
|
|
ep = hsotg->eps_in[epidx];
|
2018-05-29 23:31:00 +08:00
|
|
|
if (ep)
|
|
|
|
|
debugfs_create_file(ep->name, 0444, root, ep, &ep_fops);
|
2015-04-30 04:08:59 +08:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
#else
|
2015-08-07 07:11:54 +08:00
|
|
|
static inline void dwc2_hsotg_create_debug(struct dwc2_hsotg *hsotg) {}
|
2015-04-30 04:08:59 +08:00
|
|
|
#endif
|
|
|
|
|
|
2015-08-07 07:11:54 +08:00
|
|
|
/* dwc2_hsotg_delete_debug is removed as cleanup in done in dwc2_debugfs_exit */
|
2015-04-30 04:08:59 +08:00
|
|
|
|
2015-04-30 04:09:00 +08:00
|
|
|
#define dump_register(nm) \
|
|
|
|
|
{ \
|
|
|
|
|
.name = #nm, \
|
|
|
|
|
.offset = nm, \
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const struct debugfs_reg32 dwc2_regs[] = {
|
|
|
|
|
/*
|
|
|
|
|
* Accessing registers like this can trigger mode mismatch interrupt.
|
|
|
|
|
* However, according to dwc2 databook, the register access, in this
|
|
|
|
|
* case, is completed on the processor bus but is ignored by the core
|
|
|
|
|
* and does not affect its operation.
|
|
|
|
|
*/
|
|
|
|
|
dump_register(GOTGCTL),
|
|
|
|
|
dump_register(GOTGINT),
|
|
|
|
|
dump_register(GAHBCFG),
|
|
|
|
|
dump_register(GUSBCFG),
|
|
|
|
|
dump_register(GRSTCTL),
|
|
|
|
|
dump_register(GINTSTS),
|
|
|
|
|
dump_register(GINTMSK),
|
|
|
|
|
dump_register(GRXSTSR),
|
2018-05-05 02:09:05 +08:00
|
|
|
/* Omit GRXSTSP */
|
2015-04-30 04:09:00 +08:00
|
|
|
dump_register(GRXFSIZ),
|
|
|
|
|
dump_register(GNPTXFSIZ),
|
|
|
|
|
dump_register(GNPTXSTS),
|
|
|
|
|
dump_register(GI2CCTL),
|
|
|
|
|
dump_register(GPVNDCTL),
|
|
|
|
|
dump_register(GGPIO),
|
|
|
|
|
dump_register(GUID),
|
|
|
|
|
dump_register(GSNPSID),
|
|
|
|
|
dump_register(GHWCFG1),
|
|
|
|
|
dump_register(GHWCFG2),
|
|
|
|
|
dump_register(GHWCFG3),
|
|
|
|
|
dump_register(GHWCFG4),
|
|
|
|
|
dump_register(GLPMCFG),
|
|
|
|
|
dump_register(GPWRDN),
|
|
|
|
|
dump_register(GDFIFOCFG),
|
|
|
|
|
dump_register(ADPCTL),
|
|
|
|
|
dump_register(HPTXFSIZ),
|
|
|
|
|
dump_register(DPTXFSIZN(1)),
|
|
|
|
|
dump_register(DPTXFSIZN(2)),
|
|
|
|
|
dump_register(DPTXFSIZN(3)),
|
|
|
|
|
dump_register(DPTXFSIZN(4)),
|
|
|
|
|
dump_register(DPTXFSIZN(5)),
|
|
|
|
|
dump_register(DPTXFSIZN(6)),
|
|
|
|
|
dump_register(DPTXFSIZN(7)),
|
|
|
|
|
dump_register(DPTXFSIZN(8)),
|
|
|
|
|
dump_register(DPTXFSIZN(9)),
|
|
|
|
|
dump_register(DPTXFSIZN(10)),
|
|
|
|
|
dump_register(DPTXFSIZN(11)),
|
|
|
|
|
dump_register(DPTXFSIZN(12)),
|
|
|
|
|
dump_register(DPTXFSIZN(13)),
|
|
|
|
|
dump_register(DPTXFSIZN(14)),
|
|
|
|
|
dump_register(DPTXFSIZN(15)),
|
|
|
|
|
dump_register(DCFG),
|
|
|
|
|
dump_register(DCTL),
|
|
|
|
|
dump_register(DSTS),
|
|
|
|
|
dump_register(DIEPMSK),
|
|
|
|
|
dump_register(DOEPMSK),
|
|
|
|
|
dump_register(DAINT),
|
|
|
|
|
dump_register(DAINTMSK),
|
|
|
|
|
dump_register(DTKNQR1),
|
|
|
|
|
dump_register(DTKNQR2),
|
|
|
|
|
dump_register(DTKNQR3),
|
|
|
|
|
dump_register(DTKNQR4),
|
|
|
|
|
dump_register(DVBUSDIS),
|
|
|
|
|
dump_register(DVBUSPULSE),
|
|
|
|
|
dump_register(DIEPCTL(0)),
|
|
|
|
|
dump_register(DIEPCTL(1)),
|
|
|
|
|
dump_register(DIEPCTL(2)),
|
|
|
|
|
dump_register(DIEPCTL(3)),
|
|
|
|
|
dump_register(DIEPCTL(4)),
|
|
|
|
|
dump_register(DIEPCTL(5)),
|
|
|
|
|
dump_register(DIEPCTL(6)),
|
|
|
|
|
dump_register(DIEPCTL(7)),
|
|
|
|
|
dump_register(DIEPCTL(8)),
|
|
|
|
|
dump_register(DIEPCTL(9)),
|
|
|
|
|
dump_register(DIEPCTL(10)),
|
|
|
|
|
dump_register(DIEPCTL(11)),
|
|
|
|
|
dump_register(DIEPCTL(12)),
|
|
|
|
|
dump_register(DIEPCTL(13)),
|
|
|
|
|
dump_register(DIEPCTL(14)),
|
|
|
|
|
dump_register(DIEPCTL(15)),
|
|
|
|
|
dump_register(DOEPCTL(0)),
|
|
|
|
|
dump_register(DOEPCTL(1)),
|
|
|
|
|
dump_register(DOEPCTL(2)),
|
|
|
|
|
dump_register(DOEPCTL(3)),
|
|
|
|
|
dump_register(DOEPCTL(4)),
|
|
|
|
|
dump_register(DOEPCTL(5)),
|
|
|
|
|
dump_register(DOEPCTL(6)),
|
|
|
|
|
dump_register(DOEPCTL(7)),
|
|
|
|
|
dump_register(DOEPCTL(8)),
|
|
|
|
|
dump_register(DOEPCTL(9)),
|
|
|
|
|
dump_register(DOEPCTL(10)),
|
|
|
|
|
dump_register(DOEPCTL(11)),
|
|
|
|
|
dump_register(DOEPCTL(12)),
|
|
|
|
|
dump_register(DOEPCTL(13)),
|
|
|
|
|
dump_register(DOEPCTL(14)),
|
|
|
|
|
dump_register(DOEPCTL(15)),
|
|
|
|
|
dump_register(DIEPINT(0)),
|
|
|
|
|
dump_register(DIEPINT(1)),
|
|
|
|
|
dump_register(DIEPINT(2)),
|
|
|
|
|
dump_register(DIEPINT(3)),
|
|
|
|
|
dump_register(DIEPINT(4)),
|
|
|
|
|
dump_register(DIEPINT(5)),
|
|
|
|
|
dump_register(DIEPINT(6)),
|
|
|
|
|
dump_register(DIEPINT(7)),
|
|
|
|
|
dump_register(DIEPINT(8)),
|
|
|
|
|
dump_register(DIEPINT(9)),
|
|
|
|
|
dump_register(DIEPINT(10)),
|
|
|
|
|
dump_register(DIEPINT(11)),
|
|
|
|
|
dump_register(DIEPINT(12)),
|
|
|
|
|
dump_register(DIEPINT(13)),
|
|
|
|
|
dump_register(DIEPINT(14)),
|
|
|
|
|
dump_register(DIEPINT(15)),
|
|
|
|
|
dump_register(DOEPINT(0)),
|
|
|
|
|
dump_register(DOEPINT(1)),
|
|
|
|
|
dump_register(DOEPINT(2)),
|
|
|
|
|
dump_register(DOEPINT(3)),
|
|
|
|
|
dump_register(DOEPINT(4)),
|
|
|
|
|
dump_register(DOEPINT(5)),
|
|
|
|
|
dump_register(DOEPINT(6)),
|
|
|
|
|
dump_register(DOEPINT(7)),
|
|
|
|
|
dump_register(DOEPINT(8)),
|
|
|
|
|
dump_register(DOEPINT(9)),
|
|
|
|
|
dump_register(DOEPINT(10)),
|
|
|
|
|
dump_register(DOEPINT(11)),
|
|
|
|
|
dump_register(DOEPINT(12)),
|
|
|
|
|
dump_register(DOEPINT(13)),
|
|
|
|
|
dump_register(DOEPINT(14)),
|
|
|
|
|
dump_register(DOEPINT(15)),
|
|
|
|
|
dump_register(DIEPTSIZ(0)),
|
|
|
|
|
dump_register(DIEPTSIZ(1)),
|
|
|
|
|
dump_register(DIEPTSIZ(2)),
|
|
|
|
|
dump_register(DIEPTSIZ(3)),
|
|
|
|
|
dump_register(DIEPTSIZ(4)),
|
|
|
|
|
dump_register(DIEPTSIZ(5)),
|
|
|
|
|
dump_register(DIEPTSIZ(6)),
|
|
|
|
|
dump_register(DIEPTSIZ(7)),
|
|
|
|
|
dump_register(DIEPTSIZ(8)),
|
|
|
|
|
dump_register(DIEPTSIZ(9)),
|
|
|
|
|
dump_register(DIEPTSIZ(10)),
|
|
|
|
|
dump_register(DIEPTSIZ(11)),
|
|
|
|
|
dump_register(DIEPTSIZ(12)),
|
|
|
|
|
dump_register(DIEPTSIZ(13)),
|
|
|
|
|
dump_register(DIEPTSIZ(14)),
|
|
|
|
|
dump_register(DIEPTSIZ(15)),
|
|
|
|
|
dump_register(DOEPTSIZ(0)),
|
|
|
|
|
dump_register(DOEPTSIZ(1)),
|
|
|
|
|
dump_register(DOEPTSIZ(2)),
|
|
|
|
|
dump_register(DOEPTSIZ(3)),
|
|
|
|
|
dump_register(DOEPTSIZ(4)),
|
|
|
|
|
dump_register(DOEPTSIZ(5)),
|
|
|
|
|
dump_register(DOEPTSIZ(6)),
|
|
|
|
|
dump_register(DOEPTSIZ(7)),
|
|
|
|
|
dump_register(DOEPTSIZ(8)),
|
|
|
|
|
dump_register(DOEPTSIZ(9)),
|
|
|
|
|
dump_register(DOEPTSIZ(10)),
|
|
|
|
|
dump_register(DOEPTSIZ(11)),
|
|
|
|
|
dump_register(DOEPTSIZ(12)),
|
|
|
|
|
dump_register(DOEPTSIZ(13)),
|
|
|
|
|
dump_register(DOEPTSIZ(14)),
|
|
|
|
|
dump_register(DOEPTSIZ(15)),
|
|
|
|
|
dump_register(DIEPDMA(0)),
|
|
|
|
|
dump_register(DIEPDMA(1)),
|
|
|
|
|
dump_register(DIEPDMA(2)),
|
|
|
|
|
dump_register(DIEPDMA(3)),
|
|
|
|
|
dump_register(DIEPDMA(4)),
|
|
|
|
|
dump_register(DIEPDMA(5)),
|
|
|
|
|
dump_register(DIEPDMA(6)),
|
|
|
|
|
dump_register(DIEPDMA(7)),
|
|
|
|
|
dump_register(DIEPDMA(8)),
|
|
|
|
|
dump_register(DIEPDMA(9)),
|
|
|
|
|
dump_register(DIEPDMA(10)),
|
|
|
|
|
dump_register(DIEPDMA(11)),
|
|
|
|
|
dump_register(DIEPDMA(12)),
|
|
|
|
|
dump_register(DIEPDMA(13)),
|
|
|
|
|
dump_register(DIEPDMA(14)),
|
|
|
|
|
dump_register(DIEPDMA(15)),
|
|
|
|
|
dump_register(DOEPDMA(0)),
|
|
|
|
|
dump_register(DOEPDMA(1)),
|
|
|
|
|
dump_register(DOEPDMA(2)),
|
|
|
|
|
dump_register(DOEPDMA(3)),
|
|
|
|
|
dump_register(DOEPDMA(4)),
|
|
|
|
|
dump_register(DOEPDMA(5)),
|
|
|
|
|
dump_register(DOEPDMA(6)),
|
|
|
|
|
dump_register(DOEPDMA(7)),
|
|
|
|
|
dump_register(DOEPDMA(8)),
|
|
|
|
|
dump_register(DOEPDMA(9)),
|
|
|
|
|
dump_register(DOEPDMA(10)),
|
|
|
|
|
dump_register(DOEPDMA(11)),
|
|
|
|
|
dump_register(DOEPDMA(12)),
|
|
|
|
|
dump_register(DOEPDMA(13)),
|
|
|
|
|
dump_register(DOEPDMA(14)),
|
|
|
|
|
dump_register(DOEPDMA(15)),
|
|
|
|
|
dump_register(DTXFSTS(0)),
|
|
|
|
|
dump_register(DTXFSTS(1)),
|
|
|
|
|
dump_register(DTXFSTS(2)),
|
|
|
|
|
dump_register(DTXFSTS(3)),
|
|
|
|
|
dump_register(DTXFSTS(4)),
|
|
|
|
|
dump_register(DTXFSTS(5)),
|
|
|
|
|
dump_register(DTXFSTS(6)),
|
|
|
|
|
dump_register(DTXFSTS(7)),
|
|
|
|
|
dump_register(DTXFSTS(8)),
|
|
|
|
|
dump_register(DTXFSTS(9)),
|
|
|
|
|
dump_register(DTXFSTS(10)),
|
|
|
|
|
dump_register(DTXFSTS(11)),
|
|
|
|
|
dump_register(DTXFSTS(12)),
|
|
|
|
|
dump_register(DTXFSTS(13)),
|
|
|
|
|
dump_register(DTXFSTS(14)),
|
|
|
|
|
dump_register(DTXFSTS(15)),
|
|
|
|
|
dump_register(PCGCTL),
|
|
|
|
|
dump_register(HCFG),
|
|
|
|
|
dump_register(HFIR),
|
|
|
|
|
dump_register(HFNUM),
|
|
|
|
|
dump_register(HPTXSTS),
|
|
|
|
|
dump_register(HAINT),
|
|
|
|
|
dump_register(HAINTMSK),
|
|
|
|
|
dump_register(HFLBADDR),
|
|
|
|
|
dump_register(HPRT0),
|
|
|
|
|
dump_register(HCCHAR(0)),
|
|
|
|
|
dump_register(HCCHAR(1)),
|
|
|
|
|
dump_register(HCCHAR(2)),
|
|
|
|
|
dump_register(HCCHAR(3)),
|
|
|
|
|
dump_register(HCCHAR(4)),
|
|
|
|
|
dump_register(HCCHAR(5)),
|
|
|
|
|
dump_register(HCCHAR(6)),
|
|
|
|
|
dump_register(HCCHAR(7)),
|
|
|
|
|
dump_register(HCCHAR(8)),
|
|
|
|
|
dump_register(HCCHAR(9)),
|
|
|
|
|
dump_register(HCCHAR(10)),
|
|
|
|
|
dump_register(HCCHAR(11)),
|
|
|
|
|
dump_register(HCCHAR(12)),
|
|
|
|
|
dump_register(HCCHAR(13)),
|
|
|
|
|
dump_register(HCCHAR(14)),
|
|
|
|
|
dump_register(HCCHAR(15)),
|
|
|
|
|
dump_register(HCSPLT(0)),
|
|
|
|
|
dump_register(HCSPLT(1)),
|
|
|
|
|
dump_register(HCSPLT(2)),
|
|
|
|
|
dump_register(HCSPLT(3)),
|
|
|
|
|
dump_register(HCSPLT(4)),
|
|
|
|
|
dump_register(HCSPLT(5)),
|
|
|
|
|
dump_register(HCSPLT(6)),
|
|
|
|
|
dump_register(HCSPLT(7)),
|
|
|
|
|
dump_register(HCSPLT(8)),
|
|
|
|
|
dump_register(HCSPLT(9)),
|
|
|
|
|
dump_register(HCSPLT(10)),
|
|
|
|
|
dump_register(HCSPLT(11)),
|
|
|
|
|
dump_register(HCSPLT(12)),
|
|
|
|
|
dump_register(HCSPLT(13)),
|
|
|
|
|
dump_register(HCSPLT(14)),
|
|
|
|
|
dump_register(HCSPLT(15)),
|
|
|
|
|
dump_register(HCINT(0)),
|
|
|
|
|
dump_register(HCINT(1)),
|
|
|
|
|
dump_register(HCINT(2)),
|
|
|
|
|
dump_register(HCINT(3)),
|
|
|
|
|
dump_register(HCINT(4)),
|
|
|
|
|
dump_register(HCINT(5)),
|
|
|
|
|
dump_register(HCINT(6)),
|
|
|
|
|
dump_register(HCINT(7)),
|
|
|
|
|
dump_register(HCINT(8)),
|
|
|
|
|
dump_register(HCINT(9)),
|
|
|
|
|
dump_register(HCINT(10)),
|
|
|
|
|
dump_register(HCINT(11)),
|
|
|
|
|
dump_register(HCINT(12)),
|
|
|
|
|
dump_register(HCINT(13)),
|
|
|
|
|
dump_register(HCINT(14)),
|
|
|
|
|
dump_register(HCINT(15)),
|
|
|
|
|
dump_register(HCINTMSK(0)),
|
|
|
|
|
dump_register(HCINTMSK(1)),
|
|
|
|
|
dump_register(HCINTMSK(2)),
|
|
|
|
|
dump_register(HCINTMSK(3)),
|
|
|
|
|
dump_register(HCINTMSK(4)),
|
|
|
|
|
dump_register(HCINTMSK(5)),
|
|
|
|
|
dump_register(HCINTMSK(6)),
|
|
|
|
|
dump_register(HCINTMSK(7)),
|
|
|
|
|
dump_register(HCINTMSK(8)),
|
|
|
|
|
dump_register(HCINTMSK(9)),
|
|
|
|
|
dump_register(HCINTMSK(10)),
|
|
|
|
|
dump_register(HCINTMSK(11)),
|
|
|
|
|
dump_register(HCINTMSK(12)),
|
|
|
|
|
dump_register(HCINTMSK(13)),
|
|
|
|
|
dump_register(HCINTMSK(14)),
|
|
|
|
|
dump_register(HCINTMSK(15)),
|
|
|
|
|
dump_register(HCTSIZ(0)),
|
|
|
|
|
dump_register(HCTSIZ(1)),
|
|
|
|
|
dump_register(HCTSIZ(2)),
|
|
|
|
|
dump_register(HCTSIZ(3)),
|
|
|
|
|
dump_register(HCTSIZ(4)),
|
|
|
|
|
dump_register(HCTSIZ(5)),
|
|
|
|
|
dump_register(HCTSIZ(6)),
|
|
|
|
|
dump_register(HCTSIZ(7)),
|
|
|
|
|
dump_register(HCTSIZ(8)),
|
|
|
|
|
dump_register(HCTSIZ(9)),
|
|
|
|
|
dump_register(HCTSIZ(10)),
|
|
|
|
|
dump_register(HCTSIZ(11)),
|
|
|
|
|
dump_register(HCTSIZ(12)),
|
|
|
|
|
dump_register(HCTSIZ(13)),
|
|
|
|
|
dump_register(HCTSIZ(14)),
|
|
|
|
|
dump_register(HCTSIZ(15)),
|
|
|
|
|
dump_register(HCDMA(0)),
|
|
|
|
|
dump_register(HCDMA(1)),
|
|
|
|
|
dump_register(HCDMA(2)),
|
|
|
|
|
dump_register(HCDMA(3)),
|
|
|
|
|
dump_register(HCDMA(4)),
|
|
|
|
|
dump_register(HCDMA(5)),
|
|
|
|
|
dump_register(HCDMA(6)),
|
|
|
|
|
dump_register(HCDMA(7)),
|
|
|
|
|
dump_register(HCDMA(8)),
|
|
|
|
|
dump_register(HCDMA(9)),
|
|
|
|
|
dump_register(HCDMA(10)),
|
|
|
|
|
dump_register(HCDMA(11)),
|
|
|
|
|
dump_register(HCDMA(12)),
|
|
|
|
|
dump_register(HCDMA(13)),
|
|
|
|
|
dump_register(HCDMA(14)),
|
|
|
|
|
dump_register(HCDMA(15)),
|
|
|
|
|
dump_register(HCDMAB(0)),
|
|
|
|
|
dump_register(HCDMAB(1)),
|
|
|
|
|
dump_register(HCDMAB(2)),
|
|
|
|
|
dump_register(HCDMAB(3)),
|
|
|
|
|
dump_register(HCDMAB(4)),
|
|
|
|
|
dump_register(HCDMAB(5)),
|
|
|
|
|
dump_register(HCDMAB(6)),
|
|
|
|
|
dump_register(HCDMAB(7)),
|
|
|
|
|
dump_register(HCDMAB(8)),
|
|
|
|
|
dump_register(HCDMAB(9)),
|
|
|
|
|
dump_register(HCDMAB(10)),
|
|
|
|
|
dump_register(HCDMAB(11)),
|
|
|
|
|
dump_register(HCDMAB(12)),
|
|
|
|
|
dump_register(HCDMAB(13)),
|
|
|
|
|
dump_register(HCDMAB(14)),
|
|
|
|
|
dump_register(HCDMAB(15)),
|
|
|
|
|
};
|
|
|
|
|
|
2017-01-24 06:58:09 +08:00
|
|
|
#define print_param(_seq, _ptr, _param) \
|
|
|
|
|
seq_printf((_seq), "%-30s: %d\n", #_param, (_ptr)->_param)
|
|
|
|
|
|
|
|
|
|
#define print_param_hex(_seq, _ptr, _param) \
|
|
|
|
|
seq_printf((_seq), "%-30s: 0x%x\n", #_param, (_ptr)->_param)
|
|
|
|
|
|
|
|
|
|
static int params_show(struct seq_file *seq, void *v)
|
|
|
|
|
{
|
|
|
|
|
struct dwc2_hsotg *hsotg = seq->private;
|
|
|
|
|
struct dwc2_core_params *p = &hsotg->params;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
print_param(seq, p, otg_cap);
|
|
|
|
|
print_param(seq, p, dma_desc_enable);
|
|
|
|
|
print_param(seq, p, dma_desc_fs_enable);
|
|
|
|
|
print_param(seq, p, speed);
|
|
|
|
|
print_param(seq, p, enable_dynamic_fifo);
|
|
|
|
|
print_param(seq, p, en_multiple_tx_fifo);
|
|
|
|
|
print_param(seq, p, host_rx_fifo_size);
|
|
|
|
|
print_param(seq, p, host_nperio_tx_fifo_size);
|
|
|
|
|
print_param(seq, p, host_perio_tx_fifo_size);
|
|
|
|
|
print_param(seq, p, max_transfer_size);
|
|
|
|
|
print_param(seq, p, max_packet_count);
|
|
|
|
|
print_param(seq, p, host_channels);
|
|
|
|
|
print_param(seq, p, phy_type);
|
|
|
|
|
print_param(seq, p, phy_utmi_width);
|
|
|
|
|
print_param(seq, p, phy_ulpi_ddr);
|
|
|
|
|
print_param(seq, p, phy_ulpi_ext_vbus);
|
|
|
|
|
print_param(seq, p, i2c_enable);
|
2018-05-05 16:17:58 +08:00
|
|
|
print_param(seq, p, ipg_isoc_en);
|
2017-01-24 06:58:09 +08:00
|
|
|
print_param(seq, p, ulpi_fs_ls);
|
|
|
|
|
print_param(seq, p, host_support_fs_ls_low_power);
|
|
|
|
|
print_param(seq, p, host_ls_low_power_phy_clk);
|
|
|
|
|
print_param(seq, p, ts_dline);
|
|
|
|
|
print_param(seq, p, reload_ctl);
|
|
|
|
|
print_param_hex(seq, p, ahbcfg);
|
|
|
|
|
print_param(seq, p, uframe_sched);
|
|
|
|
|
print_param(seq, p, external_id_pin_ctl);
|
2018-02-16 18:06:36 +08:00
|
|
|
print_param(seq, p, power_down);
|
2018-01-24 21:41:48 +08:00
|
|
|
print_param(seq, p, lpm);
|
|
|
|
|
print_param(seq, p, lpm_clock_gating);
|
|
|
|
|
print_param(seq, p, besl);
|
|
|
|
|
print_param(seq, p, hird_threshold_en);
|
|
|
|
|
print_param(seq, p, hird_threshold);
|
2018-08-30 00:59:34 +08:00
|
|
|
print_param(seq, p, service_interval);
|
2017-01-24 06:58:09 +08:00
|
|
|
print_param(seq, p, host_dma);
|
|
|
|
|
print_param(seq, p, g_dma);
|
|
|
|
|
print_param(seq, p, g_dma_desc);
|
|
|
|
|
print_param(seq, p, g_rx_fifo_size);
|
|
|
|
|
print_param(seq, p, g_np_tx_fifo_size);
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < MAX_EPS_CHANNELS; i++) {
|
|
|
|
|
char str[32];
|
|
|
|
|
|
|
|
|
|
snprintf(str, 32, "g_tx_fifo_size[%d]", i);
|
|
|
|
|
seq_printf(seq, "%-30s: %d\n", str, p->g_tx_fifo_size[i]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2018-02-15 00:08:18 +08:00
|
|
|
DEFINE_SHOW_ATTRIBUTE(params);
|
2017-01-24 06:58:09 +08:00
|
|
|
|
|
|
|
|
static int hw_params_show(struct seq_file *seq, void *v)
|
|
|
|
|
{
|
|
|
|
|
struct dwc2_hsotg *hsotg = seq->private;
|
|
|
|
|
struct dwc2_hw_params *hw = &hsotg->hw_params;
|
|
|
|
|
|
|
|
|
|
print_param(seq, hw, op_mode);
|
|
|
|
|
print_param(seq, hw, arch);
|
|
|
|
|
print_param(seq, hw, dma_desc_enable);
|
|
|
|
|
print_param(seq, hw, enable_dynamic_fifo);
|
|
|
|
|
print_param(seq, hw, en_multiple_tx_fifo);
|
|
|
|
|
print_param(seq, hw, rx_fifo_size);
|
|
|
|
|
print_param(seq, hw, host_nperio_tx_fifo_size);
|
|
|
|
|
print_param(seq, hw, dev_nperio_tx_fifo_size);
|
|
|
|
|
print_param(seq, hw, host_perio_tx_fifo_size);
|
|
|
|
|
print_param(seq, hw, nperio_tx_q_depth);
|
|
|
|
|
print_param(seq, hw, host_perio_tx_q_depth);
|
|
|
|
|
print_param(seq, hw, dev_token_q_depth);
|
|
|
|
|
print_param(seq, hw, max_transfer_size);
|
|
|
|
|
print_param(seq, hw, max_packet_count);
|
|
|
|
|
print_param(seq, hw, host_channels);
|
|
|
|
|
print_param(seq, hw, hs_phy_type);
|
|
|
|
|
print_param(seq, hw, fs_phy_type);
|
|
|
|
|
print_param(seq, hw, i2c_enable);
|
|
|
|
|
print_param(seq, hw, num_dev_ep);
|
|
|
|
|
print_param(seq, hw, num_dev_perio_in_ep);
|
|
|
|
|
print_param(seq, hw, total_fifo_size);
|
|
|
|
|
print_param(seq, hw, power_optimized);
|
|
|
|
|
print_param(seq, hw, utmi_phy_data_width);
|
|
|
|
|
print_param_hex(seq, hw, snpsid);
|
|
|
|
|
print_param_hex(seq, hw, dev_ep_dirs);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2018-02-15 00:08:18 +08:00
|
|
|
DEFINE_SHOW_ATTRIBUTE(hw_params);
|
2017-01-24 06:58:09 +08:00
|
|
|
|
2017-01-24 06:58:52 +08:00
|
|
|
static int dr_mode_show(struct seq_file *seq, void *v)
|
|
|
|
|
{
|
|
|
|
|
struct dwc2_hsotg *hsotg = seq->private;
|
|
|
|
|
const char *dr_mode = "";
|
|
|
|
|
|
|
|
|
|
device_property_read_string(hsotg->dev, "dr_mode", &dr_mode);
|
|
|
|
|
seq_printf(seq, "%s\n", dr_mode);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2018-02-15 00:08:18 +08:00
|
|
|
DEFINE_SHOW_ATTRIBUTE(dr_mode);
|
2017-01-24 06:58:52 +08:00
|
|
|
|
2015-04-30 04:08:59 +08:00
|
|
|
int dwc2_debugfs_init(struct dwc2_hsotg *hsotg)
|
|
|
|
|
{
|
|
|
|
|
int ret;
|
2018-05-29 23:31:00 +08:00
|
|
|
struct dentry *root;
|
2015-04-30 04:08:59 +08:00
|
|
|
|
2019-11-12 14:51:53 +08:00
|
|
|
root = debugfs_create_dir(dev_name(hsotg->dev), usb_debug_root);
|
2018-05-29 23:31:00 +08:00
|
|
|
hsotg->debug_root = root;
|
2015-04-30 04:08:59 +08:00
|
|
|
|
2018-05-29 23:31:00 +08:00
|
|
|
debugfs_create_file("params", 0444, root, hsotg, ¶ms_fops);
|
|
|
|
|
debugfs_create_file("hw_params", 0444, root, hsotg, &hw_params_fops);
|
|
|
|
|
debugfs_create_file("dr_mode", 0444, root, hsotg, &dr_mode_fops);
|
2017-01-24 06:58:52 +08:00
|
|
|
|
2015-04-30 04:08:59 +08:00
|
|
|
/* Add gadget debugfs nodes */
|
2015-08-07 07:11:54 +08:00
|
|
|
dwc2_hsotg_create_debug(hsotg);
|
2015-04-30 04:09:00 +08:00
|
|
|
|
|
|
|
|
hsotg->regset = devm_kzalloc(hsotg->dev, sizeof(*hsotg->regset),
|
|
|
|
|
GFP_KERNEL);
|
|
|
|
|
if (!hsotg->regset) {
|
|
|
|
|
ret = -ENOMEM;
|
2018-05-29 23:31:00 +08:00
|
|
|
goto err;
|
2015-04-30 04:09:00 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
hsotg->regset->regs = dwc2_regs;
|
|
|
|
|
hsotg->regset->nregs = ARRAY_SIZE(dwc2_regs);
|
|
|
|
|
hsotg->regset->base = hsotg->regs;
|
|
|
|
|
|
2018-05-29 23:31:00 +08:00
|
|
|
debugfs_create_regset32("regdump", 0444, root, hsotg->regset);
|
2015-04-30 04:09:00 +08:00
|
|
|
|
|
|
|
|
return 0;
|
2018-05-29 23:31:00 +08:00
|
|
|
err:
|
2015-04-30 04:09:00 +08:00
|
|
|
debugfs_remove_recursive(hsotg->debug_root);
|
2015-04-30 04:08:59 +08:00
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void dwc2_debugfs_exit(struct dwc2_hsotg *hsotg)
|
|
|
|
|
{
|
|
|
|
|
debugfs_remove_recursive(hsotg->debug_root);
|
|
|
|
|
hsotg->debug_root = NULL;
|
|
|
|
|
}
|
