mirror of https://gitee.com/openkylin/linux.git
67 lines
2.3 KiB
C
67 lines
2.3 KiB
C
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/*
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* Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
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* LGS8913, LGS8GL5, LGS8G75
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* experimental support LGS8G42, LGS8G52
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*
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* Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
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* Copyright (C) 2008 Sirius International (Hong Kong) Limited
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* Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef LGS8913_PRIV_H
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#define LGS8913_PRIV_H
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struct lgs8gxx_state {
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struct i2c_adapter *i2c;
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/* configuration settings */
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const struct lgs8gxx_config *config;
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struct dvb_frontend frontend;
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u16 curr_gi; /* current guard interval */
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};
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#define SC_MASK 0x1C /* Sub-Carrier Modulation Mask */
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#define SC_QAM64 0x10 /* 64QAM modulation */
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#define SC_QAM32 0x0C /* 32QAM modulation */
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#define SC_QAM16 0x08 /* 16QAM modulation */
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#define SC_QAM4NR 0x04 /* 4QAM-NR modulation */
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#define SC_QAM4 0x00 /* 4QAM modulation */
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#define LGS_FEC_MASK 0x03 /* FEC Rate Mask */
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#define LGS_FEC_0_4 0x00 /* FEC Rate 0.4 */
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#define LGS_FEC_0_6 0x01 /* FEC Rate 0.6 */
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#define LGS_FEC_0_8 0x02 /* FEC Rate 0.8 */
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#define TIM_MASK 0x20 /* Time Interleave Length Mask */
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#define TIM_LONG 0x20 /* Time Interleave Length = 720 */
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#define TIM_MIDDLE 0x00 /* Time Interleave Length = 240 */
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#define CF_MASK 0x80 /* Control Frame Mask */
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#define CF_EN 0x80 /* Control Frame On */
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#define GI_MASK 0x03 /* Guard Interval Mask */
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#define GI_420 0x00 /* 1/9 Guard Interval */
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#define GI_595 0x01 /* */
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#define GI_945 0x02 /* 1/4 Guard Interval */
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#define TS_PARALLEL 0x00 /* Parallel TS Output a.k.a. SPI */
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#define TS_SERIAL 0x01 /* Serial TS Output a.k.a. SSI */
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#define TS_CLK_NORMAL 0x00 /* MPEG Clock Normal */
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#define TS_CLK_INVERTED 0x02 /* MPEG Clock Inverted */
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#define TS_CLK_GATED 0x00 /* MPEG clock gated */
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#define TS_CLK_FREERUN 0x04 /* MPEG clock free running*/
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#endif
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