2006-10-03 02:22:36 +08:00
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/*
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* MPC8272 ADS Device Tree Source
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*
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2008-04-17 22:40:48 +08:00
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* Copyright 2005,2008 Freescale Semiconductor Inc.
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2006-10-03 02:22:36 +08:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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2008-04-17 22:40:48 +08:00
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/dts-v1/;
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2006-10-03 02:22:36 +08:00
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/ {
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2007-08-21 00:36:19 +08:00
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model = "MPC8272ADS";
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2007-09-15 04:41:56 +08:00
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compatible = "fsl,mpc8272ads";
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2007-08-21 00:36:19 +08:00
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8272@0 {
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device_type = "cpu";
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2008-04-17 22:40:48 +08:00
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reg = <0x0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <16384>;
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i-cache-size = <16384>;
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2007-08-21 00:36:19 +08:00
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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memory {
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device_type = "memory";
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2008-04-17 22:40:48 +08:00
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reg = <0x0 0x0>;
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2007-08-21 00:36:19 +08:00
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};
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2007-09-15 04:41:56 +08:00
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localbus@f0010100 {
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compatible = "fsl,mpc8272-localbus",
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"fsl,pq2-localbus";
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#address-cells = <2>;
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2007-08-21 00:36:19 +08:00
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#size-cells = <1>;
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2008-04-17 22:40:48 +08:00
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reg = <0xf0010100 0x40>;
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2007-08-21 00:36:19 +08:00
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2008-04-17 22:40:48 +08:00
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ranges = <0x0 0x0 0xfe000000 0x2000000
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0x1 0x0 0xf4500000 0x8000
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0x3 0x0 0xf8200000 0x8000>;
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2007-08-21 00:36:19 +08:00
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2007-09-15 04:41:56 +08:00
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flash@0,0 {
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compatible = "jedec-flash";
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2008-04-17 22:40:48 +08:00
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reg = <0x0 0x0 0x2000000>;
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2007-09-15 04:41:56 +08:00
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bank-width = <4>;
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device-width = <1>;
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2007-08-21 00:36:19 +08:00
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};
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2007-09-15 04:41:56 +08:00
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board-control@1,0 {
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2008-04-17 22:40:48 +08:00
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reg = <0x1 0x0 0x20>;
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2007-09-15 04:41:56 +08:00
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compatible = "fsl,mpc8272ads-bcsr";
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2007-08-21 00:36:19 +08:00
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};
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2007-09-15 04:41:56 +08:00
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PCI_PIC: interrupt-controller@3,0 {
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compatible = "fsl,mpc8272ads-pci-pic",
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"fsl,pq2ads-pci-pic";
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#interrupt-cells = <1>;
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interrupt-controller;
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2008-04-17 22:40:48 +08:00
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reg = <0x3 0x0 0x8>;
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2007-09-15 04:41:56 +08:00
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interrupt-parent = <&PIC>;
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2008-04-17 22:40:48 +08:00
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interrupts = <20 8>;
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2007-08-21 00:36:19 +08:00
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};
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2007-09-15 04:41:56 +08:00
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};
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pci@f0010800 {
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device_type = "pci";
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2008-04-17 22:40:48 +08:00
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reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
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2007-09-15 04:41:56 +08:00
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compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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2008-04-17 22:40:48 +08:00
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clock-frequency = <66666666>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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2007-09-15 04:41:56 +08:00
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interrupt-map = <
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/* IDSEL 0x16 */
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2008-04-17 22:40:48 +08:00
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0xb000 0x0 0x0 0x1 &PCI_PIC 0
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0xb000 0x0 0x0 0x2 &PCI_PIC 1
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0xb000 0x0 0x0 0x3 &PCI_PIC 2
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0xb000 0x0 0x0 0x4 &PCI_PIC 3
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2007-09-15 04:41:56 +08:00
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/* IDSEL 0x17 */
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2008-04-17 22:40:48 +08:00
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0xb800 0x0 0x0 0x1 &PCI_PIC 4
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0xb800 0x0 0x0 0x2 &PCI_PIC 5
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0xb800 0x0 0x0 0x3 &PCI_PIC 6
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0xb800 0x0 0x0 0x4 &PCI_PIC 7
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2007-09-15 04:41:56 +08:00
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/* IDSEL 0x18 */
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2008-04-17 22:40:48 +08:00
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0xc000 0x0 0x0 0x1 &PCI_PIC 8
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0xc000 0x0 0x0 0x2 &PCI_PIC 9
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0xc000 0x0 0x0 0x3 &PCI_PIC 10
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0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
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2007-09-15 04:41:56 +08:00
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interrupt-parent = <&PIC>;
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2008-04-17 22:40:48 +08:00
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interrupts = <18 8>;
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ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
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2007-09-15 04:41:56 +08:00
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};
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soc@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,mpc8272", "fsl,pq2-soc";
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2008-04-17 22:40:48 +08:00
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ranges = <0x0 0xf0000000 0x53000>;
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2007-09-15 04:41:56 +08:00
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// Temporary -- will go away once kernel uses ranges for get_immrbase().
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2008-04-17 22:40:48 +08:00
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reg = <0xf0000000 0x53000>;
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2007-08-21 00:36:19 +08:00
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2007-09-15 04:41:56 +08:00
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cpm@119c0 {
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2007-08-21 00:36:19 +08:00
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#address-cells = <1>;
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#size-cells = <1>;
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2007-09-15 04:41:56 +08:00
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compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
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2008-04-17 22:40:48 +08:00
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reg = <0x119c0 0x30>;
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2007-09-15 04:41:56 +08:00
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ranges;
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2007-09-29 03:06:16 +08:00
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muram@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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2008-04-17 22:40:48 +08:00
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ranges = <0x0 0x0 0x10000>;
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2007-09-29 03:06:16 +08:00
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data@0 {
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compatible = "fsl,cpm-muram-data";
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2008-04-17 22:40:48 +08:00
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reg = <0x0 0x2000 0x9800 0x800>;
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2007-09-29 03:06:16 +08:00
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};
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};
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2007-09-15 04:41:56 +08:00
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brg@119f0 {
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compatible = "fsl,mpc8272-brg",
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"fsl,cpm2-brg",
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"fsl,cpm-brg";
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2008-04-17 22:40:48 +08:00
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reg = <0x119f0 0x10 0x115f0 0x10>;
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2007-09-15 04:41:56 +08:00
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};
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serial@11a00 {
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2007-08-21 00:36:19 +08:00
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device_type = "serial";
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2007-09-15 04:41:56 +08:00
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compatible = "fsl,mpc8272-scc-uart",
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"fsl,cpm2-scc-uart";
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2008-04-17 22:40:48 +08:00
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reg = <0x11a00 0x20 0x8000 0x100>;
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interrupts = <40 8>;
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2007-09-15 04:41:56 +08:00
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <1>;
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2008-04-17 22:40:48 +08:00
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fsl,cpm-command = <0x800000>;
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2007-08-21 00:36:19 +08:00
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};
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2007-09-15 04:41:56 +08:00
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serial@11a60 {
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2007-08-21 00:36:19 +08:00
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device_type = "serial";
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2007-09-15 04:41:56 +08:00
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compatible = "fsl,mpc8272-scc-uart",
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"fsl,cpm2-scc-uart";
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2008-04-17 22:40:48 +08:00
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reg = <0x11a60 0x20 0x8300 0x100>;
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interrupts = <43 8>;
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2007-09-15 04:41:56 +08:00
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <4>;
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2008-04-17 22:40:48 +08:00
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fsl,cpm-command = <0xce00000>;
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2007-09-15 04:41:56 +08:00
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};
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mdio@10d40 {
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device_type = "mdio";
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compatible = "fsl,mpc8272ads-mdio-bitbang",
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"fsl,mpc8272-mdio-bitbang",
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"fsl,cpm2-mdio-bitbang";
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2008-04-17 22:40:48 +08:00
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reg = <0x10d40 0x14>;
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2007-09-15 04:41:56 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2008-04-17 22:40:48 +08:00
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fsl,mdio-pin = <18>;
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fsl,mdc-pin = <19>;
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2007-09-15 04:41:56 +08:00
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PHY0: ethernet-phy@0 {
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interrupt-parent = <&PIC>;
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2008-04-17 22:40:48 +08:00
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interrupts = <23 8>;
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reg = <0x0>;
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2007-09-15 04:41:56 +08:00
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device_type = "ethernet-phy";
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};
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PHY1: ethernet-phy@1 {
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interrupt-parent = <&PIC>;
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2008-04-17 22:40:48 +08:00
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interrupts = <23 8>;
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reg = <0x3>;
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2007-09-15 04:41:56 +08:00
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device_type = "ethernet-phy";
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};
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};
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ethernet@11300 {
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device_type = "network";
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compatible = "fsl,mpc8272-fcc-enet",
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"fsl,cpm2-fcc-enet";
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2008-04-17 22:40:48 +08:00
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reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
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2007-09-15 04:41:56 +08:00
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local-mac-address = [ 00 00 00 00 00 00 ];
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2008-04-17 22:40:48 +08:00
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interrupts = <32 8>;
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2007-09-15 04:41:56 +08:00
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY0>;
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linux,network-index = <0>;
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2008-04-17 22:40:48 +08:00
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fsl,cpm-command = <0x12000300>;
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2007-09-15 04:41:56 +08:00
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};
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ethernet@11320 {
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device_type = "network";
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compatible = "fsl,mpc8272-fcc-enet",
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"fsl,cpm2-fcc-enet";
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2008-04-17 22:40:48 +08:00
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reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
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2007-09-15 04:41:56 +08:00
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local-mac-address = [ 00 00 00 00 00 00 ];
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2008-04-17 22:40:48 +08:00
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interrupts = <33 8>;
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2007-09-15 04:41:56 +08:00
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY1>;
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linux,network-index = <1>;
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2008-04-17 22:40:48 +08:00
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fsl,cpm-command = <0x16200300>;
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2007-08-21 00:36:19 +08:00
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};
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};
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2007-09-15 04:41:56 +08:00
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PIC: interrupt-controller@10c00 {
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2007-08-21 00:36:19 +08:00
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#interrupt-cells = <2>;
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interrupt-controller;
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2008-04-17 22:40:48 +08:00
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reg = <0x10c00 0x80>;
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2007-09-15 04:41:56 +08:00
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compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
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2007-08-21 00:36:19 +08:00
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};
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2006-10-03 02:22:36 +08:00
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/* May need to remove if on a part without crypto engine */
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2007-08-21 00:36:19 +08:00
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crypto@30000 {
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device_type = "crypto";
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model = "SEC2";
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2007-09-15 04:41:56 +08:00
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compatible = "fsl,mpc8272-talitos-sec2",
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"fsl,talitos-sec2",
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"fsl,talitos",
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"talitos";
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2008-04-17 22:40:48 +08:00
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reg = <0x30000 0x10000>;
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interrupts = <11 8>;
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2007-09-15 04:41:56 +08:00
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interrupt-parent = <&PIC>;
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2007-08-21 00:36:19 +08:00
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num-channels = <4>;
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2008-04-17 22:40:48 +08:00
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channel-fifo-len = <24>;
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exec-units-mask = <0x7e>;
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2006-10-03 02:22:36 +08:00
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/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
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2008-04-17 22:40:48 +08:00
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descriptor-types-mask = <0x1010ebf>;
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2007-08-21 00:36:19 +08:00
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};
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};
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2007-09-15 04:41:56 +08:00
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chosen {
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linux,stdout-path = "/soc/cpm/serial@11a00";
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};
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2006-10-03 02:22:36 +08:00
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};
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