2010-09-27 22:50:49 +08:00
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/*
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* Driver for OMAP-UART controller.
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* Based on drivers/serial/8250.c
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*
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* Copyright (C) 2010 Texas Instruments.
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*
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* Authors:
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* Govindraj R <govindraj.raja@ti.com>
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* Thara Gopinath <thara@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __OMAP_SERIAL_H__
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#define __OMAP_SERIAL_H__
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#include <linux/serial_core.h>
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2012-09-06 20:45:20 +08:00
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#include <linux/device.h>
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2011-11-09 20:11:21 +08:00
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#include <linux/pm_qos.h>
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2010-09-27 22:50:49 +08:00
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2010-12-09 22:24:17 +08:00
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#define DRIVER_NAME "omap_uart"
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2010-09-27 22:50:49 +08:00
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/*
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* Use tty device name as ttyO, [O -> OMAP]
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* in bootargs we specify as console=ttyO0 if uart1
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* is used as console uart.
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*/
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#define OMAP_SERIAL_NAME "ttyO"
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#define OMAP_MODE13X_SPEED 230400
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2011-11-07 21:28:55 +08:00
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#define OMAP_UART_SCR_TX_EMPTY 0x08
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2010-09-27 22:50:49 +08:00
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/* WER = 0x7F
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* Enable module level wakeup in WER reg
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*/
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#define OMAP_UART_WER_MOD_WKUP 0X7F
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/* Enable XON/XOFF flow control on output */
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2012-10-16 22:09:22 +08:00
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#define OMAP_UART_SW_TX 0x04
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2010-09-27 22:50:49 +08:00
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/* Enable XON/XOFF flow control on input */
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2012-10-16 22:09:22 +08:00
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#define OMAP_UART_SW_RX 0x04
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2010-09-27 22:50:49 +08:00
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#define OMAP_UART_SYSC_RESET 0X07
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#define OMAP_UART_TCR_TRIG 0X0F
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#define OMAP_UART_SW_CLR 0XF0
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#define OMAP_UART_FIFO_CLR 0X06
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#define OMAP_UART_DMA_CH_FREE -1
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2012-06-20 16:49:29 +08:00
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#define OMAP_MAX_HSUART_PORTS 6
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2010-09-27 22:50:49 +08:00
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#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
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2011-11-07 21:30:33 +08:00
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#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
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#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
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2010-09-27 22:50:49 +08:00
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struct omap_uart_port_info {
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bool dma_enabled; /* To specify DMA Mode */
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unsigned int uartclk; /* UART clock rate */
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upf_t flags; /* UPF_* flags */
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2011-11-09 20:03:38 +08:00
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unsigned int dma_rx_buf_size;
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unsigned int dma_rx_timeout;
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unsigned int autosuspend_timeout;
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2011-11-09 20:04:49 +08:00
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unsigned int dma_rx_poll_rate;
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2012-07-30 08:30:26 +08:00
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int DTR_gpio;
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int DTR_inverted;
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int DTR_present;
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2011-10-11 21:41:27 +08:00
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int (*get_context_loss_count)(struct device *);
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2012-09-06 20:45:20 +08:00
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void (*set_forceidle)(struct device *);
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void (*set_noidle)(struct device *);
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void (*enable_wakeup)(struct device *, bool);
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2010-09-27 22:50:49 +08:00
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};
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struct uart_omap_dma {
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u8 uart_dma_tx;
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u8 uart_dma_rx;
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int rx_dma_channel;
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int tx_dma_channel;
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dma_addr_t rx_buf_dma_phys;
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dma_addr_t tx_buf_dma_phys;
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unsigned int uart_base;
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/*
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* Buffer for rx dma.It is not required for tx because the buffer
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* comes from port structure.
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*/
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unsigned char *rx_buf;
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unsigned int prev_rx_dma_pos;
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int tx_buf_size;
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int tx_dma_used;
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int rx_dma_used;
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spinlock_t tx_lock;
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spinlock_t rx_lock;
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/* timer to poll activity on rx dma */
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struct timer_list rx_timer;
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2011-11-09 20:03:38 +08:00
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unsigned int rx_buf_size;
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2011-11-09 20:04:49 +08:00
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unsigned int rx_poll_rate;
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2011-11-09 20:03:38 +08:00
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unsigned int rx_timeout;
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2010-09-27 22:50:49 +08:00
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};
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#endif /* __OMAP_SERIAL_H__ */
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