mirror of https://gitee.com/openkylin/linux.git
336 lines
8.1 KiB
ArmAsm
336 lines
8.1 KiB
ArmAsm
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/*
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* Cast6 Cipher 8-way parallel algorithm (AVX/x86_64)
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*
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* Copyright (C) 2012 Johannes Goetzfried
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* <Johannes.Goetzfried@informatik.stud.uni-erlangen.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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* USA
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*
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*/
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.file "cast6-avx-x86_64-asm_64.S"
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.text
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.extern cast6_s1
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.extern cast6_s2
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.extern cast6_s3
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.extern cast6_s4
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/* structure of crypto context */
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#define km 0
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#define kr (12*4*4)
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/* s-boxes */
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#define s1 cast6_s1
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#define s2 cast6_s2
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#define s3 cast6_s3
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#define s4 cast6_s4
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/**********************************************************************
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8-way AVX cast6
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**********************************************************************/
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#define CTX %rdi
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#define RA1 %xmm0
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#define RB1 %xmm1
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#define RC1 %xmm2
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#define RD1 %xmm3
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#define RA2 %xmm4
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#define RB2 %xmm5
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#define RC2 %xmm6
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#define RD2 %xmm7
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#define RX %xmm8
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#define RKM %xmm9
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#define RKRF %xmm10
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#define RKRR %xmm11
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#define RTMP %xmm12
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#define RMASK %xmm13
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#define R32 %xmm14
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#define RID1 %rax
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#define RID1b %al
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#define RID2 %rbx
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#define RID2b %bl
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#define RGI1 %rdx
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#define RGI1bl %dl
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#define RGI1bh %dh
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#define RGI2 %rcx
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#define RGI2bl %cl
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#define RGI2bh %ch
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#define RFS1 %r8
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#define RFS1d %r8d
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#define RFS2 %r9
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#define RFS2d %r9d
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#define RFS3 %r10
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#define RFS3d %r10d
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#define lookup_32bit(src, dst, op1, op2, op3) \
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movb src ## bl, RID1b; \
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movb src ## bh, RID2b; \
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movl s1(, RID1, 4), dst ## d; \
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op1 s2(, RID2, 4), dst ## d; \
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shrq $16, src; \
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movb src ## bl, RID1b; \
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movb src ## bh, RID2b; \
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op2 s3(, RID1, 4), dst ## d; \
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op3 s4(, RID2, 4), dst ## d;
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#define F(a, x, op0, op1, op2, op3) \
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op0 a, RKM, x; \
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vpslld RKRF, x, RTMP; \
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vpsrld RKRR, x, x; \
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vpor RTMP, x, x; \
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\
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vpshufb RMASK, x, x; \
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vmovq x, RGI1; \
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vpsrldq $8, x, x; \
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vmovq x, RGI2; \
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\
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lookup_32bit(RGI1, RFS1, op1, op2, op3); \
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shrq $16, RGI1; \
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lookup_32bit(RGI1, RFS2, op1, op2, op3); \
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shlq $32, RFS2; \
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orq RFS1, RFS2; \
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\
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lookup_32bit(RGI2, RFS1, op1, op2, op3); \
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shrq $16, RGI2; \
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lookup_32bit(RGI2, RFS3, op1, op2, op3); \
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shlq $32, RFS3; \
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orq RFS1, RFS3; \
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\
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vmovq RFS2, x; \
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vpinsrq $1, RFS3, x, x;
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#define F1(b, x) F(b, x, vpaddd, xorl, subl, addl)
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#define F2(b, x) F(b, x, vpxor, subl, addl, xorl)
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#define F3(b, x) F(b, x, vpsubd, addl, xorl, subl)
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#define qop(in, out, x, f) \
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F ## f(in ## 1, x); \
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vpxor out ## 1, x, out ## 1; \
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F ## f(in ## 2, x); \
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vpxor out ## 2, x, out ## 2; \
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#define Q(n) \
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vbroadcastss (km+(4*(4*n+0)))(CTX), RKM; \
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vpinsrb $0, (kr+(4*n+0))(CTX), RKRF, RKRF; \
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vpsubq RKRF, R32, RKRR; \
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qop(RD, RC, RX, 1); \
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\
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vbroadcastss (km+(4*(4*n+1)))(CTX), RKM; \
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vpinsrb $0, (kr+(4*n+1))(CTX), RKRF, RKRF; \
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vpsubq RKRF, R32, RKRR; \
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qop(RC, RB, RX, 2); \
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\
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vbroadcastss (km+(4*(4*n+2)))(CTX), RKM; \
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vpinsrb $0, (kr+(4*n+2))(CTX), RKRF, RKRF; \
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vpsubq RKRF, R32, RKRR; \
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qop(RB, RA, RX, 3); \
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\
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vbroadcastss (km+(4*(4*n+3)))(CTX), RKM; \
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vpinsrb $0, (kr+(4*n+3))(CTX), RKRF, RKRF; \
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vpsubq RKRF, R32, RKRR; \
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qop(RA, RD, RX, 1);
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#define QBAR(n) \
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vbroadcastss (km+(4*(4*n+3)))(CTX), RKM; \
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vpinsrb $0, (kr+(4*n+3))(CTX), RKRF, RKRF; \
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vpsubq RKRF, R32, RKRR; \
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qop(RA, RD, RX, 1); \
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\
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vbroadcastss (km+(4*(4*n+2)))(CTX), RKM; \
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vpinsrb $0, (kr+(4*n+2))(CTX), RKRF, RKRF; \
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vpsubq RKRF, R32, RKRR; \
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qop(RB, RA, RX, 3); \
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\
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vbroadcastss (km+(4*(4*n+1)))(CTX), RKM; \
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vpinsrb $0, (kr+(4*n+1))(CTX), RKRF, RKRF; \
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vpsubq RKRF, R32, RKRR; \
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qop(RC, RB, RX, 2); \
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\
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vbroadcastss (km+(4*(4*n+0)))(CTX), RKM; \
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vpinsrb $0, (kr+(4*n+0))(CTX), RKRF, RKRF; \
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vpsubq RKRF, R32, RKRR; \
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qop(RD, RC, RX, 1);
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#define transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \
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vpunpckldq x1, x0, t0; \
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vpunpckhdq x1, x0, t2; \
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vpunpckldq x3, x2, t1; \
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vpunpckhdq x3, x2, x3; \
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\
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vpunpcklqdq t1, t0, x0; \
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vpunpckhqdq t1, t0, x1; \
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vpunpcklqdq x3, t2, x2; \
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vpunpckhqdq x3, t2, x3;
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#define inpack_blocks(in, x0, x1, x2, x3, t0, t1, t2) \
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vmovdqu (0*4*4)(in), x0; \
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vmovdqu (1*4*4)(in), x1; \
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vmovdqu (2*4*4)(in), x2; \
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vmovdqu (3*4*4)(in), x3; \
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vpshufb RMASK, x0, x0; \
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vpshufb RMASK, x1, x1; \
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vpshufb RMASK, x2, x2; \
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vpshufb RMASK, x3, x3; \
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\
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transpose_4x4(x0, x1, x2, x3, t0, t1, t2)
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#define outunpack_blocks(out, x0, x1, x2, x3, t0, t1, t2) \
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transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \
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\
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vpshufb RMASK, x0, x0; \
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vpshufb RMASK, x1, x1; \
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vpshufb RMASK, x2, x2; \
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vpshufb RMASK, x3, x3; \
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vmovdqu x0, (0*4*4)(out); \
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vmovdqu x1, (1*4*4)(out); \
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vmovdqu x2, (2*4*4)(out); \
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vmovdqu x3, (3*4*4)(out);
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#define outunpack_xor_blocks(out, x0, x1, x2, x3, t0, t1, t2) \
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transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \
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\
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vpshufb RMASK, x0, x0; \
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vpshufb RMASK, x1, x1; \
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vpshufb RMASK, x2, x2; \
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vpshufb RMASK, x3, x3; \
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vpxor (0*4*4)(out), x0, x0; \
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vmovdqu x0, (0*4*4)(out); \
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vpxor (1*4*4)(out), x1, x1; \
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vmovdqu x1, (1*4*4)(out); \
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vpxor (2*4*4)(out), x2, x2; \
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vmovdqu x2, (2*4*4)(out); \
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vpxor (3*4*4)(out), x3, x3; \
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vmovdqu x3, (3*4*4)(out);
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.align 16
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.Lbswap_mask:
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.byte 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12
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.L32_mask:
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.byte 32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ,0, 0, 0, 0, 0
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.align 16
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.global __cast6_enc_blk_8way
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.type __cast6_enc_blk_8way,@function;
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__cast6_enc_blk_8way:
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst
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* %rdx: src
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* %rcx: bool, if true: xor output
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*/
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pushq %rbx;
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pushq %rcx;
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vmovdqu .Lbswap_mask, RMASK;
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vmovdqu .L32_mask, R32;
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vpxor RKRF, RKRF, RKRF;
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leaq (4*4*4)(%rdx), %rax;
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inpack_blocks(%rdx, RA1, RB1, RC1, RD1, RTMP, RX, RKM);
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inpack_blocks(%rax, RA2, RB2, RC2, RD2, RTMP, RX, RKM);
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xorq RID1, RID1;
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xorq RID2, RID2;
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Q(0);
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Q(1);
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Q(2);
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Q(3);
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Q(4);
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Q(5);
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QBAR(6);
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QBAR(7);
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QBAR(8);
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QBAR(9);
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QBAR(10);
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QBAR(11);
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popq %rcx;
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popq %rbx;
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leaq (4*4*4)(%rsi), %rax;
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testb %cl, %cl;
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jnz __enc_xor8;
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outunpack_blocks(%rsi, RA1, RB1, RC1, RD1, RTMP, RX, RKM);
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outunpack_blocks(%rax, RA2, RB2, RC2, RD2, RTMP, RX, RKM);
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ret;
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__enc_xor8:
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outunpack_xor_blocks(%rsi, RA1, RB1, RC1, RD1, RTMP, RX, RKM);
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outunpack_xor_blocks(%rax, RA2, RB2, RC2, RD2, RTMP, RX, RKM);
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ret;
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.align 16
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.global cast6_dec_blk_8way
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.type cast6_dec_blk_8way,@function;
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cast6_dec_blk_8way:
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst
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* %rdx: src
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*/
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pushq %rbx;
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vmovdqu .Lbswap_mask, RMASK;
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vmovdqu .L32_mask, R32;
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vpxor RKRF, RKRF, RKRF;
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leaq (4*4*4)(%rdx), %rax;
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inpack_blocks(%rdx, RA1, RB1, RC1, RD1, RTMP, RX, RKM);
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inpack_blocks(%rax, RA2, RB2, RC2, RD2, RTMP, RX, RKM);
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xorq RID1, RID1;
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xorq RID2, RID2;
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Q(11);
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Q(10);
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Q(9);
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Q(8);
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Q(7);
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Q(6);
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QBAR(5);
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QBAR(4);
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QBAR(3);
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QBAR(2);
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QBAR(1);
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QBAR(0);
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popq %rbx;
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leaq (4*4*4)(%rsi), %rax;
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outunpack_blocks(%rsi, RA1, RB1, RC1, RD1, RTMP, RX, RKM);
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outunpack_blocks(%rax, RA2, RB2, RC2, RD2, RTMP, RX, RKM);
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ret;
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