2012-01-26 05:43:27 +08:00
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NVIDIA Tegra Power Management Controller (PMC)
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2013-04-03 19:31:27 +08:00
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Required properties:
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2012-01-26 05:43:27 +08:00
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- name : Should be pmc
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- compatible : Should contain "nvidia,tegra<chip>-pmc".
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- reg : Offset and length of the register set for the device
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2013-04-03 19:31:27 +08:00
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- clocks : Must contain an entry for each entry in clock-names.
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- clock-names : Must include the following entries:
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"pclk" (The Tegra clock of that name),
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"clk32k_in" (The 32KHz clock input to Tegra).
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Optional properties:
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2012-01-26 05:43:27 +08:00
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- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
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The PMU is an external Power Management Unit, whose interrupt output
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signal is fed into the PMC. This signal is optionally inverted, and then
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fed into the ARM GIC. The PMC is not involved in the detection or
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handling of this interrupt signal, merely its inversion.
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Example:
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2013-04-03 19:31:27 +08:00
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/ SoC dts including file
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2012-01-26 05:43:27 +08:00
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pmc@7000f400 {
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compatible = "nvidia,tegra20-pmc";
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reg = <0x7000e400 0x400>;
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2013-04-03 19:31:27 +08:00
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clocks = <&tegra_car 110>, <&clk32k_in>;
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clock-names = "pclk", "clk32k_in";
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2012-01-26 05:43:27 +08:00
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nvidia,invert-interrupt;
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};
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2013-04-03 19:31:27 +08:00
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/ Tegra board dts file
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{
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...
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk32k_in: clock {
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compatible = "fixed-clock";
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reg=<0>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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...
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};
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