2008-08-04 15:16:41 +08:00
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/*
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2009-03-13 11:37:23 +08:00
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* Copyright (c) 2008-2009 Atheros Communications Inc.
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2008-08-04 15:16:41 +08:00
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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2009-02-09 15:56:54 +08:00
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#include "ath9k.h"
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2008-08-04 15:16:41 +08:00
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2009-03-04 01:23:28 +08:00
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static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
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struct ieee80211_hdr *hdr)
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{
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2009-03-04 01:23:29 +08:00
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struct ieee80211_hw *hw = sc->pri_wiphy->hw;
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int i;
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spin_lock_bh(&sc->wiphy_lock);
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for (i = 0; i < sc->num_sec_wiphy; i++) {
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struct ath_wiphy *aphy = sc->sec_wiphy[i];
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if (aphy == NULL)
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continue;
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if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
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== 0) {
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hw = aphy->hw;
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break;
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}
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}
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spin_unlock_bh(&sc->wiphy_lock);
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return hw;
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2009-03-04 01:23:28 +08:00
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}
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2008-08-04 15:16:41 +08:00
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/*
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* Setup and link descriptors.
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*
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* 11N: we can no longer afford to self link the last descriptor.
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* MAC acknowledges BA status as long as it copies frames to host
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* buffer (or rx fifo). This can incorrectly acknowledge packets
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* to a sender if last desc is self-linked.
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*/
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static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
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{
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2009-02-09 15:57:12 +08:00
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struct ath_hw *ah = sc->sc_ah;
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2008-08-04 15:16:41 +08:00
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struct ath_desc *ds;
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struct sk_buff *skb;
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ATH_RXBUF_RESET(bf);
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ds = bf->bf_desc;
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2008-11-18 11:35:55 +08:00
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ds->ds_link = 0; /* link to null */
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2008-08-04 15:16:41 +08:00
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ds->ds_data = bf->bf_buf_addr;
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2008-11-18 11:35:55 +08:00
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/* virtual addr of the beginning of the buffer. */
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2008-08-04 15:16:41 +08:00
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skb = bf->bf_mpdu;
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ASSERT(skb != NULL);
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ds->ds_vdata = skb->data;
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2008-12-08 00:14:03 +08:00
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/* setup rx descriptors. The rx.bufsize here tells the harware
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2008-11-21 09:15:13 +08:00
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* how much data it can DMA to us and that we are prepared
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* to process */
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2008-12-08 00:14:03 +08:00
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ath9k_hw_setuprxdesc(ah, ds,
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sc->rx.bufsize,
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2008-08-04 15:16:41 +08:00
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0);
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2008-12-08 00:14:03 +08:00
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if (sc->rx.rxlink == NULL)
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2008-08-04 15:16:41 +08:00
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ath9k_hw_putrxbuf(ah, bf->bf_daddr);
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else
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2008-12-08 00:14:03 +08:00
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*sc->rx.rxlink = bf->bf_daddr;
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2008-08-04 15:16:41 +08:00
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2008-12-08 00:14:03 +08:00
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sc->rx.rxlink = &ds->ds_link;
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2008-08-04 15:16:41 +08:00
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ath9k_hw_rxena(ah);
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}
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2008-11-24 14:37:55 +08:00
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static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
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{
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/* XXX block beacon interrupts */
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ath9k_hw_setantenna(sc->sc_ah, antenna);
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2008-12-08 00:14:03 +08:00
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sc->rx.defant = antenna;
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sc->rx.rxotherant = 0;
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2008-11-24 14:37:55 +08:00
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}
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/*
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* Extend 15-bit time stamp from rx descriptor to
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* a full 64-bit TSF using the current h/w TSF.
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*/
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static u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp)
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{
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u64 tsf;
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tsf = ath9k_hw_gettsf64(sc->sc_ah);
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if ((tsf & 0x7fff) < rstamp)
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tsf -= 0x8000;
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return (tsf & ~0x7fff) | rstamp;
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}
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2009-03-06 13:54:08 +08:00
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static struct sk_buff *ath_rxbuf_alloc(struct ath_softc *sc, u32 len, gfp_t gfp_mask)
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2008-08-04 15:16:41 +08:00
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{
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struct sk_buff *skb;
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u32 off;
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/*
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* Cache-line-align. This is important (for the
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* 5210 at least) as not doing so causes bogus data
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* in rx'd frames.
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*/
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2008-11-21 09:15:13 +08:00
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/* Note: the kernel can allocate a value greater than
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* what we ask it to give us. We really only need 4 KB as that
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* is this hardware supports and in fact we need at least 3849
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* as that is the MAX AMSDU size this hardware supports.
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* Unfortunately this means we may get 8 KB here from the
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* kernel... and that is actually what is observed on some
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* systems :( */
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2009-03-06 13:54:08 +08:00
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skb = __dev_alloc_skb(len + sc->cachelsz - 1, gfp_mask);
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2008-08-04 15:16:41 +08:00
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if (skb != NULL) {
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2009-02-09 15:57:03 +08:00
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off = ((unsigned long) skb->data) % sc->cachelsz;
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2008-08-04 15:16:41 +08:00
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if (off != 0)
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2009-02-09 15:57:03 +08:00
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skb_reserve(skb, sc->cachelsz - off);
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2008-08-04 15:16:41 +08:00
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} else {
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DPRINTF(sc, ATH_DBG_FATAL,
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2008-11-29 00:48:05 +08:00
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"skbuff alloc of size %u failed\n", len);
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2008-08-04 15:16:41 +08:00
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return NULL;
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}
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return skb;
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}
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/*
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2008-11-18 11:35:55 +08:00
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* For Decrypt or Demic errors, we only mark packet status here and always push
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* up the frame up to let mac80211 handle the actual error case, be it no
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* decryption key or real decryption error. This let us keep statistics there.
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2008-08-04 15:16:41 +08:00
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*/
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2008-11-18 11:35:55 +08:00
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static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds,
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struct ieee80211_rx_status *rx_status, bool *decrypt_error,
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struct ath_softc *sc)
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2008-08-04 15:16:41 +08:00
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{
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2008-11-18 11:35:55 +08:00
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struct ieee80211_hdr *hdr;
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u8 ratecode;
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__le16 fc;
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2009-03-04 01:23:28 +08:00
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struct ieee80211_hw *hw;
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2009-07-15 08:17:07 +08:00
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struct ieee80211_sta *sta;
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struct ath_node *an;
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int last_rssi = ATH_RSSI_DUMMY_MARKER;
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2008-11-18 11:35:55 +08:00
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hdr = (struct ieee80211_hdr *)skb->data;
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fc = hdr->frame_control;
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memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
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2009-03-04 01:23:28 +08:00
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hw = ath_get_virt_hw(sc, hdr);
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2008-11-18 11:35:55 +08:00
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if (ds->ds_rxstat.rs_more) {
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/*
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* Frame spans multiple descriptors; this cannot happen yet
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* as we don't support jumbograms. If not in monitor mode,
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* discard the frame. Enable this if you want to see
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* error frames in Monitor mode.
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*/
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2009-02-09 15:57:26 +08:00
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if (sc->sc_ah->opmode != NL80211_IFTYPE_MONITOR)
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2008-11-18 11:35:55 +08:00
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goto rx_next;
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} else if (ds->ds_rxstat.rs_status != 0) {
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if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
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rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
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if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY)
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goto rx_next;
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2008-08-04 15:16:41 +08:00
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2008-11-18 11:35:55 +08:00
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if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT) {
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*decrypt_error = true;
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} else if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC) {
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if (ieee80211_is_ctl(fc))
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/*
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* Sometimes, we get invalid
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* MIC failures on valid control frames.
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* Remove these mic errors.
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*/
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ds->ds_rxstat.rs_status &= ~ATH9K_RXERR_MIC;
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else
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rx_status->flag |= RX_FLAG_MMIC_ERROR;
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}
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/*
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* Reject error frames with the exception of
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* decryption and MIC failures. For monitor mode,
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* we also ignore the CRC error.
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*/
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2009-02-09 15:57:26 +08:00
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if (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR) {
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2008-11-18 11:35:55 +08:00
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if (ds->ds_rxstat.rs_status &
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~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
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ATH9K_RXERR_CRC))
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goto rx_next;
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} else {
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if (ds->ds_rxstat.rs_status &
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~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
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goto rx_next;
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}
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}
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2008-08-04 15:16:41 +08:00
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}
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2008-11-18 11:35:55 +08:00
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ratecode = ds->ds_rxstat.rs_rate;
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if (ratecode & 0x80) {
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2008-12-12 20:38:34 +08:00
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/* HT rate */
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rx_status->flag |= RX_FLAG_HT;
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2008-11-18 11:35:55 +08:00
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if (ds->ds_rxstat.rs_flags & ATH9K_RX_2040)
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2008-12-12 20:38:34 +08:00
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rx_status->flag |= RX_FLAG_40MHZ;
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2008-11-18 11:35:55 +08:00
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if (ds->ds_rxstat.rs_flags & ATH9K_RX_GI)
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2008-12-12 20:38:34 +08:00
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rx_status->flag |= RX_FLAG_SHORT_GI;
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rx_status->rate_idx = ratecode & 0x7f;
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} else {
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int i = 0, cur_band, n_rates;
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cur_band = hw->conf.channel->band;
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n_rates = sc->sbands[cur_band].n_bitrates;
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for (i = 0; i < n_rates; i++) {
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if (sc->sbands[cur_band].bitrates[i].hw_value ==
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ratecode) {
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rx_status->rate_idx = i;
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break;
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}
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if (sc->sbands[cur_band].bitrates[i].hw_value_short ==
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ratecode) {
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rx_status->rate_idx = i;
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rx_status->flag |= RX_FLAG_SHORTPRE;
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break;
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}
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}
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2008-11-18 11:35:55 +08:00
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}
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2009-07-15 08:17:07 +08:00
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rcu_read_lock();
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sta = ieee80211_find_sta(sc->hw, hdr->addr2);
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if (sta) {
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an = (struct ath_node *) sta->drv_priv;
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if (ds->ds_rxstat.rs_rssi != ATH9K_RSSI_BAD &&
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!ds->ds_rxstat.rs_moreaggr)
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ATH_RSSI_LPF(an->last_rssi, ds->ds_rxstat.rs_rssi);
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last_rssi = an->last_rssi;
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}
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rcu_read_unlock();
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if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
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ds->ds_rxstat.rs_rssi = ATH_EP_RND(last_rssi,
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ATH_RSSI_EP_MULTIPLIER);
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if (ds->ds_rxstat.rs_rssi < 0)
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ds->ds_rxstat.rs_rssi = 0;
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else if (ds->ds_rxstat.rs_rssi > 127)
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ds->ds_rxstat.rs_rssi = 127;
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2008-11-18 11:35:55 +08:00
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rx_status->mactime = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp);
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2009-03-04 01:23:28 +08:00
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rx_status->band = hw->conf.channel->band;
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rx_status->freq = hw->conf.channel->center_freq;
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2009-02-09 15:57:03 +08:00
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rx_status->noise = sc->ani.noise_floor;
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2009-07-15 08:17:07 +08:00
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rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + ds->ds_rxstat.rs_rssi;
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2008-11-18 11:35:55 +08:00
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rx_status->antenna = ds->ds_rxstat.rs_antenna;
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2009-06-20 02:57:59 +08:00
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/*
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* Theory for reporting quality:
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*
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* At a hardware RSSI of 45 you will be able to use MCS 7 reliably.
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* At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
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* At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
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*
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* MCS 7 is the highets MCS index usable by a 1-stream device.
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* MCS 15 is the highest MCS index usable by a 2-stream device.
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*
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* All ath9k devices are either 1-stream or 2-stream.
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*
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* How many bars you see is derived from the qual reporting.
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*
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* A more elaborate scheme can be used here but it requires tables
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* of SNR/throughput for each possible mode used. For the MCS table
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* you can refer to the wireless wiki:
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*
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* http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
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*
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*/
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if (conf_is_ht(&hw->conf))
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rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 45;
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else
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rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 35;
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2008-11-18 11:35:55 +08:00
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/* rssi can be more than 45 though, anything above that
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* should be considered at 100% */
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if (rx_status->qual > 100)
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rx_status->qual = 100;
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rx_status->flag |= RX_FLAG_TSFT;
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return 1;
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rx_next:
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return 0;
|
2008-08-04 15:16:41 +08:00
|
|
|
}
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|
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|
|
static void ath_opmode_init(struct ath_softc *sc)
|
|
|
|
{
|
2009-02-09 15:57:12 +08:00
|
|
|
struct ath_hw *ah = sc->sc_ah;
|
2008-08-04 15:16:41 +08:00
|
|
|
u32 rfilt, mfilt[2];
|
|
|
|
|
|
|
|
/* configure rx filter */
|
|
|
|
rfilt = ath_calcrxfilter(sc);
|
|
|
|
ath9k_hw_setrxfilter(ah, rfilt);
|
|
|
|
|
|
|
|
/* configure bssid mask */
|
2009-02-09 15:57:26 +08:00
|
|
|
if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
|
2009-02-09 15:57:10 +08:00
|
|
|
ath9k_hw_setbssidmask(sc);
|
2008-08-04 15:16:41 +08:00
|
|
|
|
|
|
|
/* configure operational mode */
|
|
|
|
ath9k_hw_setopmode(ah);
|
|
|
|
|
|
|
|
/* Handle any link-level address change. */
|
2009-02-09 15:57:10 +08:00
|
|
|
ath9k_hw_setmac(ah, sc->sc_ah->macaddr);
|
2008-08-04 15:16:41 +08:00
|
|
|
|
|
|
|
/* calculate and install multicast filter */
|
|
|
|
mfilt[0] = mfilt[1] = ~0;
|
|
|
|
ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
|
|
|
|
}
|
|
|
|
|
|
|
|
int ath_rx_init(struct ath_softc *sc, int nbufs)
|
|
|
|
{
|
|
|
|
struct sk_buff *skb;
|
|
|
|
struct ath_buf *bf;
|
|
|
|
int error = 0;
|
|
|
|
|
2009-03-30 17:58:45 +08:00
|
|
|
spin_lock_init(&sc->rx.rxflushlock);
|
|
|
|
sc->sc_flags &= ~SC_OP_RXFLUSH;
|
|
|
|
spin_lock_init(&sc->rx.rxbuflock);
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2009-03-30 17:58:45 +08:00
|
|
|
sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
|
|
|
|
min(sc->cachelsz, (u16)64));
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2009-03-30 17:58:45 +08:00
|
|
|
DPRINTF(sc, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
|
|
|
|
sc->cachelsz, sc->rx.bufsize);
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2009-03-30 17:58:45 +08:00
|
|
|
/* Initialize rx descriptors */
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2009-03-30 17:58:45 +08:00
|
|
|
error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
|
|
|
|
"rx", nbufs, 1);
|
|
|
|
if (error != 0) {
|
|
|
|
DPRINTF(sc, ATH_DBG_FATAL,
|
|
|
|
"failed to allocate rx descriptors: %d\n", error);
|
|
|
|
goto err;
|
|
|
|
}
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2009-03-30 17:58:45 +08:00
|
|
|
list_for_each_entry(bf, &sc->rx.rxbuf, list) {
|
|
|
|
skb = ath_rxbuf_alloc(sc, sc->rx.bufsize, GFP_KERNEL);
|
|
|
|
if (skb == NULL) {
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto err;
|
2008-08-04 15:16:41 +08:00
|
|
|
}
|
|
|
|
|
2009-03-30 17:58:45 +08:00
|
|
|
bf->bf_mpdu = skb;
|
|
|
|
bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
|
|
|
|
sc->rx.bufsize,
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
if (unlikely(dma_mapping_error(sc->dev,
|
|
|
|
bf->bf_buf_addr))) {
|
|
|
|
dev_kfree_skb_any(skb);
|
|
|
|
bf->bf_mpdu = NULL;
|
|
|
|
DPRINTF(sc, ATH_DBG_FATAL,
|
|
|
|
"dma_mapping_error() on RX init\n");
|
|
|
|
error = -ENOMEM;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
bf->bf_dmacontext = bf->bf_buf_addr;
|
|
|
|
}
|
|
|
|
sc->rx.rxlink = NULL;
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2009-03-30 17:58:45 +08:00
|
|
|
err:
|
2008-08-04 15:16:41 +08:00
|
|
|
if (error)
|
|
|
|
ath_rx_cleanup(sc);
|
|
|
|
|
|
|
|
return error;
|
|
|
|
}
|
|
|
|
|
|
|
|
void ath_rx_cleanup(struct ath_softc *sc)
|
|
|
|
{
|
|
|
|
struct sk_buff *skb;
|
|
|
|
struct ath_buf *bf;
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
list_for_each_entry(bf, &sc->rx.rxbuf, list) {
|
2008-08-04 15:16:41 +08:00
|
|
|
skb = bf->bf_mpdu;
|
2009-03-24 06:25:01 +08:00
|
|
|
if (skb) {
|
2009-03-30 17:58:45 +08:00
|
|
|
dma_unmap_single(sc->dev, bf->bf_buf_addr,
|
|
|
|
sc->rx.bufsize, DMA_FROM_DEVICE);
|
2008-08-04 15:16:41 +08:00
|
|
|
dev_kfree_skb(skb);
|
2009-03-24 06:25:01 +08:00
|
|
|
}
|
2008-08-04 15:16:41 +08:00
|
|
|
}
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
if (sc->rx.rxdma.dd_desc_len != 0)
|
|
|
|
ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
|
2008-08-04 15:16:41 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Calculate the receive filter according to the
|
|
|
|
* operating mode and state:
|
|
|
|
*
|
|
|
|
* o always accept unicast, broadcast, and multicast traffic
|
|
|
|
* o maintain current state of phy error reception (the hal
|
|
|
|
* may enable phy error frames for noise immunity work)
|
|
|
|
* o probe request frames are accepted only when operating in
|
|
|
|
* hostap, adhoc, or monitor modes
|
|
|
|
* o enable promiscuous mode according to the interface state
|
|
|
|
* o accept beacons:
|
|
|
|
* - when operating in adhoc mode so the 802.11 layer creates
|
|
|
|
* node table entries for peers,
|
|
|
|
* - when operating in station mode for collecting rssi data when
|
|
|
|
* the station is otherwise quiet, or
|
|
|
|
* - when operating as a repeater so we see repeater-sta beacons
|
|
|
|
* - when scanning
|
|
|
|
*/
|
|
|
|
|
|
|
|
u32 ath_calcrxfilter(struct ath_softc *sc)
|
|
|
|
{
|
|
|
|
#define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
|
2008-08-11 16:33:13 +08:00
|
|
|
|
2008-08-04 15:16:41 +08:00
|
|
|
u32 rfilt;
|
|
|
|
|
|
|
|
rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
|
|
|
|
| ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
|
|
|
|
| ATH9K_RX_FILTER_MCAST;
|
|
|
|
|
|
|
|
/* If not a STA, enable processing of Probe Requests */
|
2009-02-09 15:57:26 +08:00
|
|
|
if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
|
2008-08-04 15:16:41 +08:00
|
|
|
rfilt |= ATH9K_RX_FILTER_PROBEREQ;
|
|
|
|
|
2009-03-10 16:55:50 +08:00
|
|
|
/*
|
|
|
|
* Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
|
|
|
|
* mode interface or when in monitor mode. AP mode does not need this
|
|
|
|
* since it receives all in-BSS frames anyway.
|
|
|
|
*/
|
2009-02-09 15:57:26 +08:00
|
|
|
if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
|
2008-12-08 00:14:03 +08:00
|
|
|
(sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
|
2009-03-10 16:55:50 +08:00
|
|
|
(sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR))
|
2008-08-04 15:16:41 +08:00
|
|
|
rfilt |= ATH9K_RX_FILTER_PROM;
|
|
|
|
|
2009-02-04 10:40:22 +08:00
|
|
|
if (sc->rx.rxfilter & FIF_CONTROL)
|
|
|
|
rfilt |= ATH9K_RX_FILTER_CONTROL;
|
|
|
|
|
2009-02-19 18:11:52 +08:00
|
|
|
if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
|
|
|
|
!(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
|
|
|
|
rfilt |= ATH9K_RX_FILTER_MYBEACON;
|
|
|
|
else
|
2008-08-04 15:16:41 +08:00
|
|
|
rfilt |= ATH9K_RX_FILTER_BEACON;
|
|
|
|
|
2009-02-19 18:11:52 +08:00
|
|
|
/* If in HOSTAP mode, want to enable reception of PSPOLL frames */
|
2009-02-09 15:57:26 +08:00
|
|
|
if (sc->sc_ah->opmode == NL80211_IFTYPE_AP)
|
2009-02-19 18:11:52 +08:00
|
|
|
rfilt |= ATH9K_RX_FILTER_PSPOLL;
|
2008-11-18 11:35:55 +08:00
|
|
|
|
2009-03-04 01:23:30 +08:00
|
|
|
if (sc->sec_wiphy) {
|
|
|
|
/* TODO: only needed if more than one BSSID is in use in
|
|
|
|
* station/adhoc mode */
|
|
|
|
/* TODO: for older chips, may need to add ATH9K_RX_FILTER_PROM
|
|
|
|
*/
|
|
|
|
rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
|
|
|
|
}
|
|
|
|
|
2008-08-04 15:16:41 +08:00
|
|
|
return rfilt;
|
2008-08-11 16:33:13 +08:00
|
|
|
|
2008-08-04 15:16:41 +08:00
|
|
|
#undef RX_FILTER_PRESERVE
|
|
|
|
}
|
|
|
|
|
|
|
|
int ath_startrecv(struct ath_softc *sc)
|
|
|
|
{
|
2009-02-09 15:57:12 +08:00
|
|
|
struct ath_hw *ah = sc->sc_ah;
|
2008-08-04 15:16:41 +08:00
|
|
|
struct ath_buf *bf, *tbf;
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
spin_lock_bh(&sc->rx.rxbuflock);
|
|
|
|
if (list_empty(&sc->rx.rxbuf))
|
2008-08-04 15:16:41 +08:00
|
|
|
goto start_recv;
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
sc->rx.rxlink = NULL;
|
|
|
|
list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
|
2008-08-04 15:16:41 +08:00
|
|
|
ath_rx_buf_link(sc, bf);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We could have deleted elements so the list may be empty now */
|
2008-12-08 00:14:03 +08:00
|
|
|
if (list_empty(&sc->rx.rxbuf))
|
2008-08-04 15:16:41 +08:00
|
|
|
goto start_recv;
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
|
2008-08-04 15:16:41 +08:00
|
|
|
ath9k_hw_putrxbuf(ah, bf->bf_daddr);
|
2008-11-18 11:35:55 +08:00
|
|
|
ath9k_hw_rxena(ah);
|
2008-08-04 15:16:41 +08:00
|
|
|
|
|
|
|
start_recv:
|
2008-12-08 00:14:03 +08:00
|
|
|
spin_unlock_bh(&sc->rx.rxbuflock);
|
2008-11-18 11:35:55 +08:00
|
|
|
ath_opmode_init(sc);
|
|
|
|
ath9k_hw_startpcureceive(ah);
|
|
|
|
|
2008-08-04 15:16:41 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool ath_stoprecv(struct ath_softc *sc)
|
|
|
|
{
|
2009-02-09 15:57:12 +08:00
|
|
|
struct ath_hw *ah = sc->sc_ah;
|
2008-08-04 15:16:41 +08:00
|
|
|
bool stopped;
|
|
|
|
|
2008-11-18 11:35:55 +08:00
|
|
|
ath9k_hw_stoppcurecv(ah);
|
|
|
|
ath9k_hw_setrxfilter(ah, 0);
|
|
|
|
stopped = ath9k_hw_stopdmarecv(ah);
|
2008-12-08 00:14:03 +08:00
|
|
|
sc->rx.rxlink = NULL;
|
2008-11-18 11:35:55 +08:00
|
|
|
|
2008-08-04 15:16:41 +08:00
|
|
|
return stopped;
|
|
|
|
}
|
|
|
|
|
|
|
|
void ath_flushrecv(struct ath_softc *sc)
|
|
|
|
{
|
2008-12-08 00:14:03 +08:00
|
|
|
spin_lock_bh(&sc->rx.rxflushlock);
|
2008-08-11 16:35:46 +08:00
|
|
|
sc->sc_flags |= SC_OP_RXFLUSH;
|
2008-08-04 15:16:41 +08:00
|
|
|
ath_rx_tasklet(sc, 1);
|
2008-08-11 16:35:46 +08:00
|
|
|
sc->sc_flags &= ~SC_OP_RXFLUSH;
|
2008-12-08 00:14:03 +08:00
|
|
|
spin_unlock_bh(&sc->rx.rxflushlock);
|
2008-08-04 15:16:41 +08:00
|
|
|
}
|
|
|
|
|
2009-05-15 02:28:48 +08:00
|
|
|
static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
|
|
|
|
{
|
|
|
|
/* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
|
|
|
|
struct ieee80211_mgmt *mgmt;
|
|
|
|
u8 *pos, *end, id, elen;
|
|
|
|
struct ieee80211_tim_ie *tim;
|
|
|
|
|
|
|
|
mgmt = (struct ieee80211_mgmt *)skb->data;
|
|
|
|
pos = mgmt->u.beacon.variable;
|
|
|
|
end = skb->data + skb->len;
|
|
|
|
|
|
|
|
while (pos + 2 < end) {
|
|
|
|
id = *pos++;
|
|
|
|
elen = *pos++;
|
|
|
|
if (pos + elen > end)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (id == WLAN_EID_TIM) {
|
|
|
|
if (elen < sizeof(*tim))
|
|
|
|
break;
|
|
|
|
tim = (struct ieee80211_tim_ie *) pos;
|
|
|
|
if (tim->dtim_count != 0)
|
|
|
|
break;
|
|
|
|
return tim->bitmap_ctrl & 0x01;
|
|
|
|
}
|
|
|
|
|
|
|
|
pos += elen;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
|
|
|
|
{
|
|
|
|
struct ieee80211_mgmt *mgmt;
|
|
|
|
|
|
|
|
if (skb->len < 24 + 8 + 2 + 2)
|
|
|
|
return;
|
|
|
|
|
|
|
|
mgmt = (struct ieee80211_mgmt *)skb->data;
|
|
|
|
if (memcmp(sc->curbssid, mgmt->bssid, ETH_ALEN) != 0)
|
|
|
|
return; /* not from our current AP */
|
|
|
|
|
2009-06-19 18:17:48 +08:00
|
|
|
sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON;
|
|
|
|
|
2009-05-21 02:59:08 +08:00
|
|
|
if (sc->sc_flags & SC_OP_BEACON_SYNC) {
|
|
|
|
sc->sc_flags &= ~SC_OP_BEACON_SYNC;
|
|
|
|
DPRINTF(sc, ATH_DBG_PS, "Reconfigure Beacon timers based on "
|
|
|
|
"timestamp from the AP\n");
|
|
|
|
ath_beacon_config(sc, NULL);
|
|
|
|
}
|
|
|
|
|
2009-05-15 02:28:48 +08:00
|
|
|
if (ath_beacon_dtim_pending_cab(skb)) {
|
|
|
|
/*
|
|
|
|
* Remain awake waiting for buffered broadcast/multicast
|
2009-06-18 02:53:20 +08:00
|
|
|
* frames. If the last broadcast/multicast frame is not
|
|
|
|
* received properly, the next beacon frame will work as
|
|
|
|
* a backup trigger for returning into NETWORK SLEEP state,
|
|
|
|
* so we are waiting for it as well.
|
2009-05-15 02:28:48 +08:00
|
|
|
*/
|
|
|
|
DPRINTF(sc, ATH_DBG_PS, "Received DTIM beacon indicating "
|
|
|
|
"buffered broadcast/multicast frame(s)\n");
|
2009-06-18 02:53:20 +08:00
|
|
|
sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON;
|
2009-05-15 02:28:48 +08:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) {
|
|
|
|
/*
|
|
|
|
* This can happen if a broadcast frame is dropped or the AP
|
|
|
|
* fails to send a frame indicating that all CAB frames have
|
|
|
|
* been delivered.
|
|
|
|
*/
|
2009-06-19 18:17:48 +08:00
|
|
|
sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
|
2009-05-15 02:28:48 +08:00
|
|
|
DPRINTF(sc, ATH_DBG_PS, "PS wait for CAB frames timed out\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
|
|
|
|
{
|
|
|
|
struct ieee80211_hdr *hdr;
|
|
|
|
|
|
|
|
hdr = (struct ieee80211_hdr *)skb->data;
|
|
|
|
|
|
|
|
/* Process Beacon and CAB receive in PS state */
|
2009-05-19 22:01:38 +08:00
|
|
|
if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) &&
|
|
|
|
ieee80211_is_beacon(hdr->frame_control))
|
2009-05-15 02:28:48 +08:00
|
|
|
ath_rx_ps_beacon(sc, skb);
|
|
|
|
else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) &&
|
|
|
|
(ieee80211_is_data(hdr->frame_control) ||
|
|
|
|
ieee80211_is_action(hdr->frame_control)) &&
|
|
|
|
is_multicast_ether_addr(hdr->addr1) &&
|
|
|
|
!ieee80211_has_moredata(hdr->frame_control)) {
|
|
|
|
/*
|
|
|
|
* No more broadcast/multicast frames to be received at this
|
|
|
|
* point.
|
|
|
|
*/
|
2009-06-19 18:17:48 +08:00
|
|
|
sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB;
|
|
|
|
DPRINTF(sc, ATH_DBG_PS, "All PS CAB frames received, back to "
|
|
|
|
"sleep\n");
|
2009-05-19 22:01:38 +08:00
|
|
|
} else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) &&
|
|
|
|
!is_multicast_ether_addr(hdr->addr1) &&
|
|
|
|
!ieee80211_has_morefrags(hdr->frame_control)) {
|
|
|
|
sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA;
|
|
|
|
DPRINTF(sc, ATH_DBG_PS, "Going back to sleep after having "
|
|
|
|
"received PS-Poll data (0x%x)\n",
|
|
|
|
sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
|
|
|
|
SC_OP_WAIT_FOR_CAB |
|
|
|
|
SC_OP_WAIT_FOR_PSPOLL_DATA |
|
|
|
|
SC_OP_WAIT_FOR_TX_ACK));
|
2009-05-15 02:28:48 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-05-15 02:28:47 +08:00
|
|
|
static void ath_rx_send_to_mac80211(struct ath_softc *sc, struct sk_buff *skb,
|
|
|
|
struct ieee80211_rx_status *rx_status)
|
|
|
|
{
|
|
|
|
struct ieee80211_hdr *hdr;
|
|
|
|
|
|
|
|
hdr = (struct ieee80211_hdr *)skb->data;
|
|
|
|
|
|
|
|
/* Send the frame to mac80211 */
|
|
|
|
if (is_multicast_ether_addr(hdr->addr1)) {
|
|
|
|
int i;
|
|
|
|
/*
|
|
|
|
* Deliver broadcast/multicast frames to all suitable
|
|
|
|
* virtual wiphys.
|
|
|
|
*/
|
|
|
|
/* TODO: filter based on channel configuration */
|
|
|
|
for (i = 0; i < sc->num_sec_wiphy; i++) {
|
|
|
|
struct ath_wiphy *aphy = sc->sec_wiphy[i];
|
|
|
|
struct sk_buff *nskb;
|
|
|
|
if (aphy == NULL)
|
|
|
|
continue;
|
|
|
|
nskb = skb_copy(skb, GFP_ATOMIC);
|
2009-06-17 19:13:00 +08:00
|
|
|
if (nskb) {
|
|
|
|
memcpy(IEEE80211_SKB_RXCB(nskb), rx_status,
|
|
|
|
sizeof(*rx_status));
|
|
|
|
ieee80211_rx(aphy->hw, nskb);
|
|
|
|
}
|
2009-05-15 02:28:47 +08:00
|
|
|
}
|
2009-06-17 19:13:00 +08:00
|
|
|
memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
|
|
|
|
ieee80211_rx(sc->hw, skb);
|
2009-05-15 02:28:47 +08:00
|
|
|
} else {
|
|
|
|
/* Deliver unicast frames based on receiver address */
|
2009-06-17 19:13:00 +08:00
|
|
|
memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
|
|
|
|
ieee80211_rx(ath_get_virt_hw(sc, hdr), skb);
|
2009-05-15 02:28:47 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-08-04 15:16:41 +08:00
|
|
|
int ath_rx_tasklet(struct ath_softc *sc, int flush)
|
|
|
|
{
|
|
|
|
#define PA2DESC(_sc, _pa) \
|
2008-12-08 00:14:03 +08:00
|
|
|
((struct ath_desc *)((caddr_t)(_sc)->rx.rxdma.dd_desc + \
|
|
|
|
((_pa) - (_sc)->rx.rxdma.dd_desc_paddr)))
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2008-11-18 11:35:55 +08:00
|
|
|
struct ath_buf *bf;
|
2008-08-04 15:16:41 +08:00
|
|
|
struct ath_desc *ds;
|
2008-11-22 09:41:33 +08:00
|
|
|
struct sk_buff *skb = NULL, *requeue_skb;
|
2008-11-18 11:35:55 +08:00
|
|
|
struct ieee80211_rx_status rx_status;
|
2009-02-09 15:57:12 +08:00
|
|
|
struct ath_hw *ah = sc->sc_ah;
|
2008-11-18 11:35:55 +08:00
|
|
|
struct ieee80211_hdr *hdr;
|
|
|
|
int hdrlen, padsize, retval;
|
|
|
|
bool decrypt_error = false;
|
|
|
|
u8 keyix;
|
2009-04-04 08:10:26 +08:00
|
|
|
__le16 fc;
|
2008-11-18 11:35:55 +08:00
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
spin_lock_bh(&sc->rx.rxbuflock);
|
2008-08-04 15:16:41 +08:00
|
|
|
|
|
|
|
do {
|
|
|
|
/* If handling rx interrupt and flush is in progress => exit */
|
2008-08-11 16:35:46 +08:00
|
|
|
if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
|
2008-08-04 15:16:41 +08:00
|
|
|
break;
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
if (list_empty(&sc->rx.rxbuf)) {
|
|
|
|
sc->rx.rxlink = NULL;
|
2008-08-04 15:16:41 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
|
2008-08-04 15:16:41 +08:00
|
|
|
ds = bf->bf_desc;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Must provide the virtual address of the current
|
|
|
|
* descriptor, the physical address, and the virtual
|
|
|
|
* address of the next descriptor in the h/w chain.
|
|
|
|
* This allows the HAL to look ahead to see if the
|
|
|
|
* hardware is done with a descriptor by checking the
|
|
|
|
* done bit in the following descriptor and the address
|
|
|
|
* of the current descriptor the DMA engine is working
|
|
|
|
* on. All this is necessary because of our use of
|
|
|
|
* a self-linked list to avoid rx overruns.
|
|
|
|
*/
|
2008-11-18 11:35:55 +08:00
|
|
|
retval = ath9k_hw_rxprocdesc(ah, ds,
|
2008-08-04 15:16:41 +08:00
|
|
|
bf->bf_daddr,
|
|
|
|
PA2DESC(sc, ds->ds_link),
|
|
|
|
0);
|
|
|
|
if (retval == -EINPROGRESS) {
|
|
|
|
struct ath_buf *tbf;
|
|
|
|
struct ath_desc *tds;
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
|
|
|
|
sc->rx.rxlink = NULL;
|
2008-08-04 15:16:41 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
tbf = list_entry(bf->list.next, struct ath_buf, list);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* On some hardware the descriptor status words could
|
|
|
|
* get corrupted, including the done bit. Because of
|
|
|
|
* this, check if the next descriptor's done bit is
|
|
|
|
* set or not.
|
|
|
|
*
|
|
|
|
* If the next descriptor's done bit is set, the current
|
|
|
|
* descriptor has been corrupted. Force s/w to discard
|
|
|
|
* this descriptor and continue...
|
|
|
|
*/
|
|
|
|
|
|
|
|
tds = tbf->bf_desc;
|
2008-11-18 11:35:55 +08:00
|
|
|
retval = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,
|
|
|
|
PA2DESC(sc, tds->ds_link), 0);
|
2008-08-04 15:16:41 +08:00
|
|
|
if (retval == -EINPROGRESS) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
skb = bf->bf_mpdu;
|
2008-11-18 11:35:55 +08:00
|
|
|
if (!skb)
|
2008-08-04 15:16:41 +08:00
|
|
|
continue;
|
|
|
|
|
2008-12-15 23:10:46 +08:00
|
|
|
/*
|
|
|
|
* Synchronize the DMA transfer with CPU before
|
|
|
|
* 1. accessing the frame
|
|
|
|
* 2. requeueing the same buffer to h/w
|
|
|
|
*/
|
2009-01-15 03:17:03 +08:00
|
|
|
dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
|
2008-12-15 23:10:46 +08:00
|
|
|
sc->rx.bufsize,
|
2009-01-15 03:17:03 +08:00
|
|
|
DMA_FROM_DEVICE);
|
2008-12-15 23:10:46 +08:00
|
|
|
|
2008-08-04 15:16:41 +08:00
|
|
|
/*
|
2008-11-18 11:35:55 +08:00
|
|
|
* If we're asked to flush receive queue, directly
|
|
|
|
* chain it back at the queue without processing it.
|
2008-08-04 15:16:41 +08:00
|
|
|
*/
|
2008-11-18 11:35:55 +08:00
|
|
|
if (flush)
|
2008-11-22 09:41:33 +08:00
|
|
|
goto requeue;
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2008-11-18 11:35:55 +08:00
|
|
|
if (!ds->ds_rxstat.rs_datalen)
|
2008-11-22 09:41:33 +08:00
|
|
|
goto requeue;
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2008-11-18 11:35:55 +08:00
|
|
|
/* The status portion of the descriptor could get corrupted. */
|
2008-12-08 00:14:03 +08:00
|
|
|
if (sc->rx.bufsize < ds->ds_rxstat.rs_datalen)
|
2008-11-22 09:41:33 +08:00
|
|
|
goto requeue;
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2008-11-18 11:35:55 +08:00
|
|
|
if (!ath_rx_prepare(skb, ds, &rx_status, &decrypt_error, sc))
|
2008-11-22 09:41:33 +08:00
|
|
|
goto requeue;
|
|
|
|
|
|
|
|
/* Ensure we always have an skb to requeue once we are done
|
|
|
|
* processing the current buffer's skb */
|
2009-03-06 13:54:08 +08:00
|
|
|
requeue_skb = ath_rxbuf_alloc(sc, sc->rx.bufsize, GFP_ATOMIC);
|
2008-11-22 09:41:33 +08:00
|
|
|
|
|
|
|
/* If there is no memory we ignore the current RX'd frame,
|
|
|
|
* tell hardware it can give us a new frame using the old
|
2008-12-08 00:14:03 +08:00
|
|
|
* skb and put it at the tail of the sc->rx.rxbuf list for
|
2008-11-22 09:41:33 +08:00
|
|
|
* processing. */
|
|
|
|
if (!requeue_skb)
|
|
|
|
goto requeue;
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2008-12-15 23:10:46 +08:00
|
|
|
/* Unmap the frame */
|
2009-01-15 03:17:03 +08:00
|
|
|
dma_unmap_single(sc->dev, bf->bf_buf_addr,
|
2008-12-08 00:14:03 +08:00
|
|
|
sc->rx.bufsize,
|
2009-01-15 03:17:03 +08:00
|
|
|
DMA_FROM_DEVICE);
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2008-11-18 11:35:55 +08:00
|
|
|
skb_put(skb, ds->ds_rxstat.rs_datalen);
|
|
|
|
skb->protocol = cpu_to_be16(ETH_P_CONTROL);
|
|
|
|
|
|
|
|
/* see if any padding is done by the hw and remove it */
|
|
|
|
hdr = (struct ieee80211_hdr *)skb->data;
|
|
|
|
hdrlen = ieee80211_get_hdrlen_from_skb(skb);
|
2009-04-04 08:10:26 +08:00
|
|
|
fc = hdr->frame_control;
|
2008-11-18 11:35:55 +08:00
|
|
|
|
2008-12-12 00:22:13 +08:00
|
|
|
/* The MAC header is padded to have 32-bit boundary if the
|
|
|
|
* packet payload is non-zero. The general calculation for
|
|
|
|
* padsize would take into account odd header lengths:
|
|
|
|
* padsize = (4 - hdrlen % 4) % 4; However, since only
|
|
|
|
* even-length headers are used, padding can only be 0 or 2
|
|
|
|
* bytes and we can optimize this a bit. In addition, we must
|
|
|
|
* not try to remove padding from short control frames that do
|
|
|
|
* not have payload. */
|
|
|
|
padsize = hdrlen & 3;
|
|
|
|
if (padsize && hdrlen >= 24) {
|
2008-11-18 11:35:55 +08:00
|
|
|
memmove(skb->data + padsize, skb->data, hdrlen);
|
|
|
|
skb_pull(skb, padsize);
|
2008-08-04 15:16:41 +08:00
|
|
|
}
|
|
|
|
|
2008-11-18 11:35:55 +08:00
|
|
|
keyix = ds->ds_rxstat.rs_keyix;
|
2008-08-04 15:16:41 +08:00
|
|
|
|
2008-11-18 11:35:55 +08:00
|
|
|
if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
|
|
|
|
rx_status.flag |= RX_FLAG_DECRYPTED;
|
2009-05-15 02:28:47 +08:00
|
|
|
} else if (ieee80211_has_protected(fc)
|
2008-11-18 11:35:55 +08:00
|
|
|
&& !decrypt_error && skb->len >= hdrlen + 4) {
|
|
|
|
keyix = skb->data[hdrlen + 3] >> 6;
|
|
|
|
|
2009-02-09 15:57:03 +08:00
|
|
|
if (test_bit(keyix, sc->keymap))
|
2008-11-18 11:35:55 +08:00
|
|
|
rx_status.flag |= RX_FLAG_DECRYPTED;
|
|
|
|
}
|
2009-01-08 19:32:13 +08:00
|
|
|
if (ah->sw_mgmt_crypto &&
|
|
|
|
(rx_status.flag & RX_FLAG_DECRYPTED) &&
|
2009-05-15 02:28:47 +08:00
|
|
|
ieee80211_is_mgmt(fc)) {
|
2009-01-08 19:32:13 +08:00
|
|
|
/* Use software decrypt for management frames. */
|
|
|
|
rx_status.flag &= ~RX_FLAG_DECRYPTED;
|
|
|
|
}
|
2008-11-18 11:35:55 +08:00
|
|
|
|
2008-11-22 09:41:33 +08:00
|
|
|
/* We will now give hardware our shiny new allocated skb */
|
|
|
|
bf->bf_mpdu = requeue_skb;
|
2009-01-15 03:17:03 +08:00
|
|
|
bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
|
2008-12-08 00:14:03 +08:00
|
|
|
sc->rx.bufsize,
|
2009-01-15 03:17:03 +08:00
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
if (unlikely(dma_mapping_error(sc->dev,
|
2008-12-03 19:35:29 +08:00
|
|
|
bf->bf_buf_addr))) {
|
|
|
|
dev_kfree_skb_any(requeue_skb);
|
|
|
|
bf->bf_mpdu = NULL;
|
2009-03-30 17:58:25 +08:00
|
|
|
DPRINTF(sc, ATH_DBG_FATAL,
|
2009-01-15 03:17:03 +08:00
|
|
|
"dma_mapping_error() on RX\n");
|
2009-05-15 02:28:48 +08:00
|
|
|
ath_rx_send_to_mac80211(sc, skb, &rx_status);
|
2008-12-03 19:35:29 +08:00
|
|
|
break;
|
|
|
|
}
|
2008-11-22 09:41:33 +08:00
|
|
|
bf->bf_dmacontext = bf->bf_buf_addr;
|
2008-08-04 15:16:41 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* change the default rx antenna if rx diversity chooses the
|
|
|
|
* other antenna 3 times in a row.
|
|
|
|
*/
|
2008-12-08 00:14:03 +08:00
|
|
|
if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
|
|
|
|
if (++sc->rx.rxotherant >= 3)
|
2008-11-18 11:35:55 +08:00
|
|
|
ath_setdefantenna(sc, ds->ds_rxstat.rs_antenna);
|
2008-08-04 15:16:41 +08:00
|
|
|
} else {
|
2008-12-08 00:14:03 +08:00
|
|
|
sc->rx.rxotherant = 0;
|
2008-08-04 15:16:41 +08:00
|
|
|
}
|
2009-01-20 13:47:08 +08:00
|
|
|
|
2009-05-19 22:01:38 +08:00
|
|
|
if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
|
2009-06-15 23:49:11 +08:00
|
|
|
SC_OP_WAIT_FOR_CAB |
|
2009-05-19 22:01:38 +08:00
|
|
|
SC_OP_WAIT_FOR_PSPOLL_DATA)))
|
2009-05-15 02:28:48 +08:00
|
|
|
ath_rx_ps(sc, skb);
|
|
|
|
|
|
|
|
ath_rx_send_to_mac80211(sc, skb, &rx_status);
|
|
|
|
|
2008-11-22 09:41:33 +08:00
|
|
|
requeue:
|
2008-12-08 00:14:03 +08:00
|
|
|
list_move_tail(&bf->list, &sc->rx.rxbuf);
|
2008-11-22 09:41:33 +08:00
|
|
|
ath_rx_buf_link(sc, bf);
|
2008-11-18 11:35:55 +08:00
|
|
|
} while (1);
|
|
|
|
|
2008-12-08 00:14:03 +08:00
|
|
|
spin_unlock_bh(&sc->rx.rxbuflock);
|
2008-08-04 15:16:41 +08:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
#undef PA2DESC
|
|
|
|
}
|