[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 14:32:13 +08:00
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/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/user.h>
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#include <linux/security.h>
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#include <linux/unistd.h>
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#include <linux/notifier.h>
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#include <asm/traps.h>
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#include <asm/uaccess.h>
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#include <asm/ocd.h>
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#include <asm/mmu_context.h>
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2007-05-08 15:27:03 +08:00
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#include <linux/kdebug.h>
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 14:32:13 +08:00
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static struct pt_regs *get_user_regs(struct task_struct *tsk)
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{
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return (struct pt_regs *)((unsigned long) tsk->thread_info +
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THREAD_SIZE - sizeof(struct pt_regs));
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}
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static void ptrace_single_step(struct task_struct *tsk)
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{
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pr_debug("ptrace_single_step: pid=%u, SR=0x%08lx\n",
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tsk->pid, tsk->thread.cpu_context.sr);
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if (!(tsk->thread.cpu_context.sr & SR_D)) {
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/*
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* Set a breakpoint at the current pc to force the
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* process into debug mode. The syscall/exception
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* exit code will set a breakpoint at the return
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* address when this flag is set.
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*/
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pr_debug("ptrace_single_step: Setting TIF_BREAKPOINT\n");
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set_tsk_thread_flag(tsk, TIF_BREAKPOINT);
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}
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/* The monitor code will do the actual step for us */
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set_tsk_thread_flag(tsk, TIF_SINGLE_STEP);
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}
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/*
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* Called by kernel/ptrace.c when detaching
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*
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* Make sure any single step bits, etc. are not set
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*/
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void ptrace_disable(struct task_struct *child)
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{
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clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
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}
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/*
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* Handle hitting a breakpoint
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*/
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static void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
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{
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siginfo_t info;
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info.si_signo = SIGTRAP;
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info.si_errno = 0;
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info.si_code = TRAP_BRKPT;
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info.si_addr = (void __user *)instruction_pointer(regs);
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pr_debug("ptrace_break: Sending SIGTRAP to PID %u (pc = 0x%p)\n",
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tsk->pid, info.si_addr);
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force_sig_info(SIGTRAP, &info, tsk);
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}
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/*
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* Read the word at offset "offset" into the task's "struct user". We
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* actually access the pt_regs struct stored on the kernel stack.
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*/
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static int ptrace_read_user(struct task_struct *tsk, unsigned long offset,
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unsigned long __user *data)
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{
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unsigned long *regs;
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unsigned long value;
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pr_debug("ptrace_read_user(%p, %#lx, %p)\n",
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tsk, offset, data);
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if (offset & 3 || offset >= sizeof(struct user)) {
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printk("ptrace_read_user: invalid offset 0x%08lx\n", offset);
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return -EIO;
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}
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regs = (unsigned long *)get_user_regs(tsk);
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value = 0;
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if (offset < sizeof(struct pt_regs))
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value = regs[offset / sizeof(regs[0])];
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return put_user(value, data);
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}
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/*
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* Write the word "value" to offset "offset" into the task's "struct
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* user". We actually access the pt_regs struct stored on the kernel
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* stack.
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*/
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static int ptrace_write_user(struct task_struct *tsk, unsigned long offset,
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unsigned long value)
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{
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unsigned long *regs;
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if (offset & 3 || offset >= sizeof(struct user)) {
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printk("ptrace_write_user: invalid offset 0x%08lx\n", offset);
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return -EIO;
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}
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if (offset >= sizeof(struct pt_regs))
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return 0;
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regs = (unsigned long *)get_user_regs(tsk);
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regs[offset / sizeof(regs[0])] = value;
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return 0;
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}
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static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
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{
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struct pt_regs *regs = get_user_regs(tsk);
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return copy_to_user(uregs, regs, sizeof(*regs)) ? -EFAULT : 0;
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}
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static int ptrace_setregs(struct task_struct *tsk, const void __user *uregs)
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{
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struct pt_regs newregs;
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int ret;
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ret = -EFAULT;
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if (copy_from_user(&newregs, uregs, sizeof(newregs)) == 0) {
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struct pt_regs *regs = get_user_regs(tsk);
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ret = -EINVAL;
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if (valid_user_regs(&newregs)) {
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*regs = newregs;
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ret = 0;
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}
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}
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return ret;
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}
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long arch_ptrace(struct task_struct *child, long request, long addr, long data)
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{
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unsigned long tmp;
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int ret;
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2006-10-24 16:12:40 +08:00
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pr_debug("arch_ptrace(%ld, %d, %#lx, %#lx)\n",
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 14:32:13 +08:00
|
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request, child->pid, addr, data);
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pr_debug("ptrace: Enabling monitor mode...\n");
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__mtdr(DBGREG_DC, __mfdr(DBGREG_DC) | DC_MM | DC_DBE);
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switch (request) {
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/* Read the word at location addr in the child process */
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case PTRACE_PEEKTEXT:
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case PTRACE_PEEKDATA:
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ret = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
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if (ret == sizeof(tmp))
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ret = put_user(tmp, (unsigned long __user *)data);
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else
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ret = -EIO;
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break;
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case PTRACE_PEEKUSR:
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ret = ptrace_read_user(child, addr,
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(unsigned long __user *)data);
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break;
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/* Write the word in data at location addr */
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case PTRACE_POKETEXT:
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case PTRACE_POKEDATA:
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ret = access_process_vm(child, addr, &data, sizeof(data), 1);
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if (ret == sizeof(data))
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ret = 0;
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else
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ret = -EIO;
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break;
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case PTRACE_POKEUSR:
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ret = ptrace_write_user(child, addr, data);
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break;
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/* continue and stop at next (return from) syscall */
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case PTRACE_SYSCALL:
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/* restart after signal */
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case PTRACE_CONT:
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ret = -EIO;
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if (!valid_signal(data))
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break;
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if (request == PTRACE_SYSCALL)
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set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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else
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clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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child->exit_code = data;
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/* XXX: Are we sure no breakpoints are active here? */
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wake_up_process(child);
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ret = 0;
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break;
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/*
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* Make the child exit. Best I can do is send it a
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* SIGKILL. Perhaps it should be put in the status that it
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* wants to exit.
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*/
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case PTRACE_KILL:
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ret = 0;
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if (child->exit_state == EXIT_ZOMBIE)
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break;
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child->exit_code = SIGKILL;
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wake_up_process(child);
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break;
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/*
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* execute single instruction.
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*/
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case PTRACE_SINGLESTEP:
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ret = -EIO;
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if (!valid_signal(data))
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break;
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clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
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ptrace_single_step(child);
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child->exit_code = data;
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wake_up_process(child);
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ret = 0;
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break;
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/* Detach a process that was attached */
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case PTRACE_DETACH:
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ret = ptrace_detach(child, data);
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break;
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case PTRACE_GETREGS:
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ret = ptrace_getregs(child, (void __user *)data);
|
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break;
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case PTRACE_SETREGS:
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ret = ptrace_setregs(child, (const void __user *)data);
|
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break;
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default:
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ret = ptrace_request(child, request, addr, data);
|
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break;
|
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|
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}
|
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pr_debug("sys_ptrace returning %d (DC = 0x%08lx)\n", ret, __mfdr(DBGREG_DC));
|
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|
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return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
asmlinkage void syscall_trace(void)
|
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|
|
{
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|
|
pr_debug("syscall_trace called\n");
|
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|
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if (!test_thread_flag(TIF_SYSCALL_TRACE))
|
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|
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return;
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|
|
if (!(current->ptrace & PT_PTRACED))
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return;
|
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|
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pr_debug("syscall_trace: notifying parent\n");
|
|
|
|
/* The 0x80 provides a way for the tracing parent to
|
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|
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* distinguish between a syscall stop and SIGTRAP delivery */
|
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|
|
ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
|
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|
|
? 0x80 : 0));
|
|
|
|
|
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|
|
/*
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|
|
* this isn't the same as continuing with a signal, but it
|
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|
|
* will do for normal use. strace only continues with a
|
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|
|
* signal if the stopping signal is not SIGTRAP. -brl
|
|
|
|
*/
|
|
|
|
if (current->exit_code) {
|
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|
|
pr_debug("syscall_trace: sending signal %d to PID %u\n",
|
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|
|
current->exit_code, current->pid);
|
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|
|
send_sig(current->exit_code, current, 1);
|
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|
|
current->exit_code = 0;
|
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|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
asmlinkage void do_debug_priv(struct pt_regs *regs)
|
|
|
|
{
|
|
|
|
unsigned long dc, ds;
|
|
|
|
unsigned long die_val;
|
|
|
|
|
|
|
|
ds = __mfdr(DBGREG_DS);
|
|
|
|
|
|
|
|
pr_debug("do_debug_priv: pc = %08lx, ds = %08lx\n", regs->pc, ds);
|
|
|
|
|
|
|
|
if (ds & DS_SSS)
|
|
|
|
die_val = DIE_SSTEP;
|
|
|
|
else
|
|
|
|
die_val = DIE_BREAKPOINT;
|
|
|
|
|
2007-05-08 15:27:03 +08:00
|
|
|
if (notify_die(die_val, "ptrace", regs, 0, 0, SIGTRAP) == NOTIFY_STOP)
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 14:32:13 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
if (likely(ds & DS_SSS)) {
|
|
|
|
extern void itlb_miss(void);
|
|
|
|
extern void tlb_miss_common(void);
|
|
|
|
struct thread_info *ti;
|
|
|
|
|
|
|
|
dc = __mfdr(DBGREG_DC);
|
|
|
|
dc &= ~DC_SS;
|
|
|
|
__mtdr(DBGREG_DC, dc);
|
|
|
|
|
|
|
|
ti = current_thread_info();
|
2007-03-01 17:37:35 +08:00
|
|
|
set_ti_thread_flag(ti, TIF_BREAKPOINT);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 14:32:13 +08:00
|
|
|
|
|
|
|
/* The TLB miss handlers don't check thread flags */
|
|
|
|
if ((regs->pc >= (unsigned long)&itlb_miss)
|
|
|
|
&& (regs->pc <= (unsigned long)&tlb_miss_common)) {
|
|
|
|
__mtdr(DBGREG_BWA2A, sysreg_read(RAR_EX));
|
|
|
|
__mtdr(DBGREG_BWC2A, 0x40000001 | (get_asid() << 1));
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If we're running in supervisor mode, the breakpoint
|
|
|
|
* will take us where we want directly, no need to
|
|
|
|
* single step.
|
|
|
|
*/
|
|
|
|
if ((regs->sr & MODE_MASK) != MODE_SUPERVISOR)
|
2007-03-01 17:37:35 +08:00
|
|
|
set_ti_thread_flag(ti, TIF_SINGLE_STEP);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 14:32:13 +08:00
|
|
|
} else {
|
|
|
|
panic("Unable to handle debug trap at pc = %08lx\n",
|
|
|
|
regs->pc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Handle breakpoints, single steps and other debuggy things. To keep
|
|
|
|
* things simple initially, we run with interrupts and exceptions
|
|
|
|
* disabled all the time.
|
|
|
|
*/
|
|
|
|
asmlinkage void do_debug(struct pt_regs *regs)
|
|
|
|
{
|
|
|
|
unsigned long dc, ds;
|
|
|
|
|
|
|
|
ds = __mfdr(DBGREG_DS);
|
|
|
|
pr_debug("do_debug: pc = %08lx, ds = %08lx\n", regs->pc, ds);
|
|
|
|
|
|
|
|
if (test_thread_flag(TIF_BREAKPOINT)) {
|
|
|
|
pr_debug("TIF_BREAKPOINT set\n");
|
|
|
|
/* We're taking care of it */
|
|
|
|
clear_thread_flag(TIF_BREAKPOINT);
|
|
|
|
__mtdr(DBGREG_BWC2A, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (test_thread_flag(TIF_SINGLE_STEP)) {
|
|
|
|
pr_debug("TIF_SINGLE_STEP set, ds = 0x%08lx\n", ds);
|
|
|
|
if (ds & DS_SSS) {
|
|
|
|
dc = __mfdr(DBGREG_DC);
|
|
|
|
dc &= ~DC_SS;
|
|
|
|
__mtdr(DBGREG_DC, dc);
|
|
|
|
|
|
|
|
clear_thread_flag(TIF_SINGLE_STEP);
|
|
|
|
ptrace_break(current, regs);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
/* regular breakpoint */
|
|
|
|
ptrace_break(current, regs);
|
|
|
|
}
|
|
|
|
}
|