2009-10-22 11:45:20 +08:00
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What: /sys/devices/system/cpu/
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Date: pre-git history
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Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
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Description:
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A collection of both global and individual CPU attributes
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Individual CPU attributes are contained in subdirectories
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named by the kernel's logical CPU number, e.g.:
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/sys/devices/system/cpu/cpu#/
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2009-10-22 11:45:36 +08:00
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What: /sys/devices/system/cpu/sched_mc_power_savings
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/sys/devices/system/cpu/sched_smt_power_savings
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Date: June 2006
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Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
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Description: Discover and adjust the kernel's multi-core scheduler support.
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Possible values are:
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0 - No power saving load balance (default value)
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1 - Fill one thread/core/package first for long running threads
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2 - Also bias task wakeups to semi-idle cpu package for power
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savings
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sched_mc_power_savings is dependent upon SCHED_MC, which is
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itself architecture dependent.
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sched_smt_power_savings is dependent upon SCHED_SMT, which
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is itself architecture dependent.
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The two files are independent of each other. It is possible
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that one file may be present without the other.
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Introduced by git commit 5c45bf27.
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2009-10-22 11:45:20 +08:00
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2009-10-22 11:45:25 +08:00
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What: /sys/devices/system/cpu/kernel_max
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/sys/devices/system/cpu/offline
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/sys/devices/system/cpu/online
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/sys/devices/system/cpu/possible
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/sys/devices/system/cpu/present
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Date: December 2008
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Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
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Description: CPU topology files that describe kernel limits related to
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hotplug. Briefly:
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kernel_max: the maximum cpu index allowed by the kernel
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configuration.
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offline: cpus that are not online because they have been
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HOTPLUGGED off or exceed the limit of cpus allowed by the
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kernel configuration (kernel_max above).
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online: cpus that are online and being scheduled.
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possible: cpus that have been allocated resources and can be
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brought online if they are present.
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present: cpus that have been identified as being present in
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the system.
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See Documentation/cputopology.txt for more information.
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2009-10-22 11:45:31 +08:00
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What: /sys/devices/system/cpu/cpu#/topology/core_id
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/sys/devices/system/cpu/cpu#/topology/core_siblings
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/sys/devices/system/cpu/cpu#/topology/core_siblings_list
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/sys/devices/system/cpu/cpu#/topology/physical_package_id
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/sys/devices/system/cpu/cpu#/topology/thread_siblings
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/sys/devices/system/cpu/cpu#/topology/thread_siblings_list
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Date: December 2008
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Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
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Description: CPU topology files that describe a logical CPU's relationship
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to other cores and threads in the same physical package.
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One cpu# directory is created per logical CPU in the system,
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e.g. /sys/devices/system/cpu/cpu42/.
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Briefly, the files above are:
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core_id: the CPU core ID of cpu#. Typically it is the
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hardware platform's identifier (rather than the kernel's).
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The actual value is architecture and platform dependent.
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core_siblings: internal kernel map of cpu#'s hardware threads
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within the same physical_package_id.
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core_siblings_list: human-readable list of the logical CPU
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numbers within the same physical_package_id as cpu#.
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physical_package_id: physical package id of cpu#. Typically
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corresponds to a physical socket number, but the actual value
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is architecture and platform dependent.
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thread_siblings: internel kernel map of cpu#'s hardware
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threads within the same core as cpu#
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thread_siblings_list: human-readable list of cpu#'s hardware
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threads within the same core as cpu#
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See Documentation/cputopology.txt for more information.
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2009-04-09 21:31:53 +08:00
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What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
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Date: August 2008
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KernelVersion: 2.6.27
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Contact: mark.langsdorf@amd.com
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Description: These files exist in every cpu's cache index directories.
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There are currently 2 cache_disable_# files in each
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directory. Reading from these files on a supported
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processor will return that cache disable index value
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for that processor and node. Writing to one of these
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files will cause the specificed cache index to be disabled.
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Currently, only AMD Family 10h Processors support cache index
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disable, and only for their L3 caches. See the BIOS and
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Kernel Developer's Guide at
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http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
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for formatting information and other details on the
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cache index disable.
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Users: joachim.deguara@amd.com
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