2015-06-15 16:55:22 +08:00
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/*
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* vMTRR implementation
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*
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* Copyright (C) 2006 Qumranet, Inc.
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* Copyright 2010 Red Hat, Inc. and/or its affiliates.
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* Copyright(C) 2015 Intel Corporation.
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*
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* Authors:
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* Yaniv Kamay <yaniv@qumranet.com>
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* Avi Kivity <avi@qumranet.com>
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* Marcelo Tosatti <mtosatti@redhat.com>
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* Paolo Bonzini <pbonzini@redhat.com>
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* Xiao Guangrong <guangrong.xiao@linux.intel.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*/
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#include <linux/kvm_host.h>
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#include <asm/mtrr.h>
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#include "cpuid.h"
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#include "mmu.h"
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static bool msr_mtrr_valid(unsigned msr)
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{
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switch (msr) {
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case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
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case MSR_MTRRfix64K_00000:
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case MSR_MTRRfix16K_80000:
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case MSR_MTRRfix16K_A0000:
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case MSR_MTRRfix4K_C0000:
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case MSR_MTRRfix4K_C8000:
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case MSR_MTRRfix4K_D0000:
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case MSR_MTRRfix4K_D8000:
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case MSR_MTRRfix4K_E0000:
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case MSR_MTRRfix4K_E8000:
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case MSR_MTRRfix4K_F0000:
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case MSR_MTRRfix4K_F8000:
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case MSR_MTRRdefType:
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case MSR_IA32_CR_PAT:
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return true;
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case 0x2f8:
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return true;
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}
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return false;
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}
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static bool valid_pat_type(unsigned t)
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{
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return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
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}
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static bool valid_mtrr_type(unsigned t)
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{
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return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
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}
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bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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{
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int i;
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u64 mask;
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if (!msr_mtrr_valid(msr))
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return false;
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if (msr == MSR_IA32_CR_PAT) {
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for (i = 0; i < 8; i++)
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if (!valid_pat_type((data >> (i * 8)) & 0xff))
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return false;
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return true;
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} else if (msr == MSR_MTRRdefType) {
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if (data & ~0xcff)
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return false;
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return valid_mtrr_type(data & 0xff);
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} else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
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for (i = 0; i < 8 ; i++)
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if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
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return false;
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return true;
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}
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/* variable MTRRs */
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WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
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mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
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if ((msr & 1) == 0) {
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/* MTRR base */
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if (!valid_mtrr_type(data & 0xff))
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return false;
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mask |= 0xf00;
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} else
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/* MTRR mask */
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mask |= 0x7ff;
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if (data & mask) {
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kvm_inject_gp(vcpu, 0);
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return false;
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}
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return true;
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}
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EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
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static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)
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{
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struct mtrr_state_type *mtrr_state = &vcpu->arch.mtrr_state;
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unsigned char mtrr_enabled = mtrr_state->enabled;
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gfn_t start, end, mask;
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int index;
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bool is_fixed = true;
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if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
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!kvm_arch_has_noncoherent_dma(vcpu->kvm))
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return;
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if (!(mtrr_enabled & 0x2) && msr != MSR_MTRRdefType)
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return;
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switch (msr) {
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case MSR_MTRRfix64K_00000:
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start = 0x0;
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end = 0x80000;
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break;
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case MSR_MTRRfix16K_80000:
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start = 0x80000;
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end = 0xa0000;
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break;
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case MSR_MTRRfix16K_A0000:
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start = 0xa0000;
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end = 0xc0000;
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break;
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case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:
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index = msr - MSR_MTRRfix4K_C0000;
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start = 0xc0000 + index * (32 << 10);
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end = start + (32 << 10);
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break;
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case MSR_MTRRdefType:
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is_fixed = false;
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start = 0x0;
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end = ~0ULL;
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break;
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default:
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/* variable range MTRRs. */
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is_fixed = false;
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index = (msr - 0x200) / 2;
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start = (((u64)mtrr_state->var_ranges[index].base_hi) << 32) +
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(mtrr_state->var_ranges[index].base_lo & PAGE_MASK);
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mask = (((u64)mtrr_state->var_ranges[index].mask_hi) << 32) +
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(mtrr_state->var_ranges[index].mask_lo & PAGE_MASK);
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mask |= ~0ULL << cpuid_maxphyaddr(vcpu);
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end = ((start & mask) | ~mask) + 1;
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}
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if (is_fixed && !(mtrr_enabled & 0x1))
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return;
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kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end));
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}
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int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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{
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u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
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if (!kvm_mtrr_valid(vcpu, msr, data))
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return 1;
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if (msr == MSR_MTRRdefType) {
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vcpu->arch.mtrr_state.def_type = data;
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vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
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} else if (msr == MSR_MTRRfix64K_00000)
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p[0] = data;
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else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
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p[1 + msr - MSR_MTRRfix16K_80000] = data;
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else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
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p[3 + msr - MSR_MTRRfix4K_C0000] = data;
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else if (msr == MSR_IA32_CR_PAT)
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vcpu->arch.pat = data;
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else { /* Variable MTRRs */
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int idx, is_mtrr_mask;
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u64 *pt;
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idx = (msr - 0x200) / 2;
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is_mtrr_mask = msr - 0x200 - 2 * idx;
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if (!is_mtrr_mask)
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pt =
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(u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
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else
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pt =
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(u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
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*pt = data;
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}
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update_mtrr(vcpu, msr);
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return 0;
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}
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int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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{
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u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
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2015-06-15 16:55:23 +08:00
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/* MSR_MTRRcap is a readonly MSR. */
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if (msr == MSR_MTRRcap) {
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/*
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* SMRR = 0
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* WC = 1
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* FIX = 1
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* VCNT = KVM_NR_VAR_MTRR
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*/
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*pdata = 0x500 | KVM_NR_VAR_MTRR;
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return 0;
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}
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2015-06-15 16:55:22 +08:00
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if (!msr_mtrr_valid(msr))
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return 1;
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if (msr == MSR_MTRRdefType)
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*pdata = vcpu->arch.mtrr_state.def_type +
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(vcpu->arch.mtrr_state.enabled << 10);
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else if (msr == MSR_MTRRfix64K_00000)
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*pdata = p[0];
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else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
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*pdata = p[1 + msr - MSR_MTRRfix16K_80000];
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else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
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*pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
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else if (msr == MSR_IA32_CR_PAT)
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*pdata = vcpu->arch.pat;
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else { /* Variable MTRRs */
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int idx, is_mtrr_mask;
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u64 *pt;
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idx = (msr - 0x200) / 2;
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is_mtrr_mask = msr - 0x200 - 2 * idx;
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if (!is_mtrr_mask)
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pt =
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(u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
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else
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pt =
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(u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
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*pdata = *pt;
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}
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return 0;
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}
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/*
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* The function is based on mtrr_type_lookup() in
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* arch/x86/kernel/cpu/mtrr/generic.c
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*/
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static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
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u64 start, u64 end)
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{
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u64 base, mask;
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u8 prev_match, curr_match;
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int i, num_var_ranges = KVM_NR_VAR_MTRR;
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/* MTRR is completely disabled, use UC for all of physical memory. */
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if (!(mtrr_state->enabled & 0x2))
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return MTRR_TYPE_UNCACHABLE;
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/* Make end inclusive end, instead of exclusive */
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end--;
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/* Look in fixed ranges. Just return the type as per start */
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if (mtrr_state->have_fixed && (mtrr_state->enabled & 0x1) &&
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(start < 0x100000)) {
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int idx;
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if (start < 0x80000) {
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idx = 0;
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idx += (start >> 16);
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return mtrr_state->fixed_ranges[idx];
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} else if (start < 0xC0000) {
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idx = 1 * 8;
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idx += ((start - 0x80000) >> 14);
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return mtrr_state->fixed_ranges[idx];
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} else if (start < 0x1000000) {
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idx = 3 * 8;
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idx += ((start - 0xC0000) >> 12);
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return mtrr_state->fixed_ranges[idx];
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}
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}
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/*
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* Look in variable ranges
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* Look of multiple ranges matching this address and pick type
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* as per MTRR precedence
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*/
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prev_match = 0xFF;
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for (i = 0; i < num_var_ranges; ++i) {
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unsigned short start_state, end_state;
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if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
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continue;
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base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
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(mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
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mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
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(mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
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start_state = ((start & mask) == (base & mask));
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end_state = ((end & mask) == (base & mask));
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if (start_state != end_state)
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return 0xFE;
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if ((start & mask) != (base & mask))
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continue;
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curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
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if (prev_match == 0xFF) {
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prev_match = curr_match;
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continue;
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}
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if (prev_match == MTRR_TYPE_UNCACHABLE ||
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curr_match == MTRR_TYPE_UNCACHABLE)
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return MTRR_TYPE_UNCACHABLE;
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if ((prev_match == MTRR_TYPE_WRBACK &&
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curr_match == MTRR_TYPE_WRTHROUGH) ||
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(prev_match == MTRR_TYPE_WRTHROUGH &&
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curr_match == MTRR_TYPE_WRBACK)) {
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prev_match = MTRR_TYPE_WRTHROUGH;
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curr_match = MTRR_TYPE_WRTHROUGH;
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}
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if (prev_match != curr_match)
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return MTRR_TYPE_UNCACHABLE;
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}
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if (prev_match != 0xFF)
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return prev_match;
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return mtrr_state->def_type;
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}
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u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
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{
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u8 mtrr;
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mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
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(gfn << PAGE_SHIFT) + PAGE_SIZE);
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if (mtrr == 0xfe || mtrr == 0xff)
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mtrr = MTRR_TYPE_WRBACK;
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return mtrr;
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}
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EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);
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