2013-04-23 05:00:19 +08:00
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Platform DesignWare HS OTG USB 2.0 controller
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Required properties:
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2013-11-27 09:58:01 +08:00
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- compatible : One of:
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- brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
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2014-08-08 11:55:56 +08:00
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- rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
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- "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
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- "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
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2013-11-27 09:58:01 +08:00
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- snps,dwc2: A generic DWC2 USB controller with default parameters.
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2013-04-23 05:00:19 +08:00
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- reg : Should contain 1 register range (address and length)
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- interrupts : Should contain 1 interrupt
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2013-12-19 22:23:03 +08:00
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- clocks: clock provider specifier
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- clock-names: shall be "otg"
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Refer to clk/clock-bindings.txt for generic clock consumer properties
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Optional properties:
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- phys: phy provider specifier
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2014-04-25 01:12:56 +08:00
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- phy-names: shall be "usb2-phy"
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2013-12-19 22:23:03 +08:00
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Refer to phy/phy-bindings.txt for generic phy consumer properties
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2014-08-06 09:01:49 +08:00
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- dr_mode: shall be one of "host", "peripheral" and "otg"
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Refer to usb/generic.txt
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2013-04-23 05:00:19 +08:00
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Example:
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usb@101c0000 {
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compatible = "ralink,rt3050-usb, snps,dwc2";
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reg = <0x101c0000 40000>;
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interrupts = <18>;
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2013-12-19 22:23:03 +08:00
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clocks = <&usb_otg_ahb_clk>;
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clock-names = "otg";
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phys = <&usbphy>;
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phy-names = "usb2-phy";
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2013-04-23 05:00:19 +08:00
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};
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