2018-06-05 12:53:53 +08:00
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// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
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2018-01-16 22:34:48 +08:00
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/*
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* Copyright (c) 2018 Mellanox Technologies. All rights reserved.
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*/
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#include "ib_rep.h"
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2018-01-23 19:16:30 +08:00
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static const struct mlx5_ib_profile rep_profile = {
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STAGE_CREATE(MLX5_IB_STAGE_INIT,
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mlx5_ib_stage_init_init,
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mlx5_ib_stage_init_cleanup),
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STAGE_CREATE(MLX5_IB_STAGE_FLOW_DB,
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mlx5_ib_stage_rep_flow_db_init,
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NULL),
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STAGE_CREATE(MLX5_IB_STAGE_CAPS,
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mlx5_ib_stage_caps_init,
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NULL),
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STAGE_CREATE(MLX5_IB_STAGE_NON_DEFAULT_CB,
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mlx5_ib_stage_rep_non_default_cb,
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NULL),
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STAGE_CREATE(MLX5_IB_STAGE_ROCE,
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mlx5_ib_stage_rep_roce_init,
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mlx5_ib_stage_rep_roce_cleanup),
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STAGE_CREATE(MLX5_IB_STAGE_DEVICE_RESOURCES,
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mlx5_ib_stage_dev_res_init,
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mlx5_ib_stage_dev_res_cleanup),
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STAGE_CREATE(MLX5_IB_STAGE_COUNTERS,
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mlx5_ib_stage_counters_init,
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mlx5_ib_stage_counters_cleanup),
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STAGE_CREATE(MLX5_IB_STAGE_BFREG,
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mlx5_ib_stage_bfrag_init,
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mlx5_ib_stage_bfrag_cleanup),
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2018-03-23 23:24:57 +08:00
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STAGE_CREATE(MLX5_IB_STAGE_PRE_IB_REG_UMR,
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NULL,
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mlx5_ib_stage_pre_ib_reg_umr_cleanup),
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2018-01-23 19:16:30 +08:00
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STAGE_CREATE(MLX5_IB_STAGE_IB_REG,
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mlx5_ib_stage_ib_reg_init,
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mlx5_ib_stage_ib_reg_cleanup),
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2018-03-23 23:24:57 +08:00
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STAGE_CREATE(MLX5_IB_STAGE_POST_IB_REG_UMR,
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mlx5_ib_stage_post_ib_reg_umr_init,
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NULL),
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2018-01-23 19:16:30 +08:00
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STAGE_CREATE(MLX5_IB_STAGE_CLASS_ATTR,
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mlx5_ib_stage_class_attr_init,
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NULL),
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};
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2018-01-16 22:34:48 +08:00
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static int
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mlx5_ib_nic_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep)
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{
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return 0;
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}
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static void
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mlx5_ib_nic_rep_unload(struct mlx5_eswitch_rep *rep)
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{
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2018-01-23 19:16:30 +08:00
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rep->rep_if[REP_IB].priv = NULL;
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2018-01-16 22:34:48 +08:00
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}
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static int
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mlx5_ib_vport_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep)
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{
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2018-01-23 19:16:30 +08:00
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struct mlx5_ib_dev *ibdev;
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ibdev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*ibdev));
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if (!ibdev)
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return -ENOMEM;
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ibdev->rep = rep;
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ibdev->mdev = dev;
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ibdev->num_ports = max(MLX5_CAP_GEN(dev, num_ports),
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MLX5_CAP_GEN(dev, num_vhca_ports));
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if (!__mlx5_ib_add(ibdev, &rep_profile))
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return -EINVAL;
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rep->rep_if[REP_IB].priv = ibdev;
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2018-01-16 22:34:48 +08:00
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return 0;
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}
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static void
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mlx5_ib_vport_rep_unload(struct mlx5_eswitch_rep *rep)
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{
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2018-01-23 19:16:30 +08:00
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struct mlx5_ib_dev *dev;
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if (!rep->rep_if[REP_IB].priv)
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return;
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dev = mlx5_ib_rep_to_dev(rep);
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__mlx5_ib_remove(dev, dev->profile, MLX5_IB_STAGE_MAX);
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rep->rep_if[REP_IB].priv = NULL;
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2018-01-16 22:34:48 +08:00
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}
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static void *mlx5_ib_vport_get_proto_dev(struct mlx5_eswitch_rep *rep)
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{
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return mlx5_ib_rep_to_dev(rep);
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}
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static void mlx5_ib_rep_register_vf_vports(struct mlx5_ib_dev *dev)
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{
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struct mlx5_eswitch *esw = dev->mdev->priv.eswitch;
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int total_vfs = MLX5_TOTAL_VPORTS(dev->mdev);
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int vport;
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for (vport = 1; vport < total_vfs; vport++) {
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struct mlx5_eswitch_rep_if rep_if = {};
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rep_if.load = mlx5_ib_vport_rep_load;
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rep_if.unload = mlx5_ib_vport_rep_unload;
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rep_if.get_proto_dev = mlx5_ib_vport_get_proto_dev;
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mlx5_eswitch_register_vport_rep(esw, vport, &rep_if, REP_IB);
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}
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}
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static void mlx5_ib_rep_unregister_vf_vports(struct mlx5_ib_dev *dev)
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{
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struct mlx5_eswitch *esw = dev->mdev->priv.eswitch;
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int total_vfs = MLX5_TOTAL_VPORTS(dev->mdev);
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int vport;
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for (vport = 1; vport < total_vfs; vport++)
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mlx5_eswitch_unregister_vport_rep(esw, vport, REP_IB);
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}
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void mlx5_ib_register_vport_reps(struct mlx5_ib_dev *dev)
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{
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struct mlx5_eswitch *esw = dev->mdev->priv.eswitch;
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struct mlx5_eswitch_rep_if rep_if = {};
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rep_if.load = mlx5_ib_nic_rep_load;
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rep_if.unload = mlx5_ib_nic_rep_unload;
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rep_if.get_proto_dev = mlx5_ib_vport_get_proto_dev;
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rep_if.priv = dev;
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mlx5_eswitch_register_vport_rep(esw, 0, &rep_if, REP_IB);
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mlx5_ib_rep_register_vf_vports(dev);
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}
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void mlx5_ib_unregister_vport_reps(struct mlx5_ib_dev *dev)
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{
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struct mlx5_eswitch *esw = dev->mdev->priv.eswitch;
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mlx5_ib_rep_unregister_vf_vports(dev); /* VFs vports */
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mlx5_eswitch_unregister_vport_rep(esw, 0, REP_IB); /* UPLINK PF*/
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}
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u8 mlx5_ib_eswitch_mode(struct mlx5_eswitch *esw)
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{
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return mlx5_eswitch_mode(esw);
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}
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struct mlx5_ib_dev *mlx5_ib_get_rep_ibdev(struct mlx5_eswitch *esw,
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int vport_index)
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{
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return mlx5_eswitch_get_proto_dev(esw, vport_index, REP_IB);
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}
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struct net_device *mlx5_ib_get_rep_netdev(struct mlx5_eswitch *esw,
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int vport_index)
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{
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return mlx5_eswitch_get_proto_dev(esw, vport_index, REP_ETH);
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}
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2018-01-23 19:16:30 +08:00
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struct mlx5_ib_dev *mlx5_ib_get_uplink_ibdev(struct mlx5_eswitch *esw)
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{
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return mlx5_eswitch_uplink_get_proto_dev(esw, REP_IB);
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}
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2018-01-16 22:34:48 +08:00
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struct mlx5_eswitch_rep *mlx5_ib_vport_rep(struct mlx5_eswitch *esw, int vport)
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{
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return mlx5_eswitch_vport_rep(esw, vport);
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}
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2018-01-29 18:40:37 +08:00
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int create_flow_rule_vport_sq(struct mlx5_ib_dev *dev,
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struct mlx5_ib_sq *sq)
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{
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struct mlx5_flow_handle *flow_rule;
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struct mlx5_eswitch *esw = dev->mdev->priv.eswitch;
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if (!dev->rep)
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return 0;
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flow_rule =
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mlx5_eswitch_add_send_to_vport_rule(esw,
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dev->rep->vport,
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sq->base.mqp.qpn);
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if (IS_ERR(flow_rule))
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return PTR_ERR(flow_rule);
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sq->flow_rule = flow_rule;
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return 0;
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}
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