mirror of https://gitee.com/openkylin/linux.git
268 lines
9.9 KiB
Makefile
268 lines
9.9 KiB
Makefile
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# ===========================================================================
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# kbuild: Generic definitions
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# ===========================================================================
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# Standard vars
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comma := ,
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empty :=
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space := $(empty) $(empty)
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# Backward compatibility - to be removed...
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extra-y += $(EXTRA_TARGETS)
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# Figure out what we need to build from the various variables
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# ===========================================================================
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# When an object is listed to be built compiled-in and modular,
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# only build the compiled-in version
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obj-m := $(filter-out $(obj-y),$(obj-m))
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# Libraries are always collected in one lib file.
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# Filter out objects already built-in
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lib-y := $(filter-out $(obj-y), $(sort $(lib-y) $(lib-m)))
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# Handle objects in subdirs
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# ---------------------------------------------------------------------------
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# o if we encounter foo/ in $(obj-y), replace it by foo/built-in.o
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# and add the directory to the list of dirs to descend into: $(subdir-y)
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# o if we encounter foo/ in $(obj-m), remove it from $(obj-m)
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# and add the directory to the list of dirs to descend into: $(subdir-m)
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__subdir-y := $(patsubst %/,%,$(filter %/, $(obj-y)))
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subdir-y += $(__subdir-y)
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__subdir-m := $(patsubst %/,%,$(filter %/, $(obj-m)))
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subdir-m += $(__subdir-m)
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obj-y := $(patsubst %/, %/built-in.o, $(obj-y))
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obj-m := $(filter-out %/, $(obj-m))
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# Subdirectories we need to descend into
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subdir-ym := $(sort $(subdir-y) $(subdir-m))
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# if $(foo-objs) exists, foo.o is a composite object
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multi-used-y := $(sort $(foreach m,$(obj-y), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))), $(m))))
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multi-used-m := $(sort $(foreach m,$(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))), $(m))))
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multi-used := $(multi-used-y) $(multi-used-m)
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single-used-m := $(sort $(filter-out $(multi-used-m),$(obj-m)))
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# Build list of the parts of our composite objects, our composite
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# objects depend on those (obviously)
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multi-objs-y := $(foreach m, $(multi-used-y), $($(m:.o=-objs)) $($(m:.o=-y)))
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multi-objs-m := $(foreach m, $(multi-used-m), $($(m:.o=-objs)) $($(m:.o=-y)))
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multi-objs := $(multi-objs-y) $(multi-objs-m)
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# $(subdir-obj-y) is the list of objects in $(obj-y) which do not live
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# in the local directory
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subdir-obj-y := $(foreach o,$(obj-y),$(if $(filter-out $(o),$(notdir $(o))),$(o)))
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# $(obj-dirs) is a list of directories that contain object files
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obj-dirs := $(dir $(multi-objs) $(subdir-obj-y))
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# Replace multi-part objects by their individual parts, look at local dir only
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real-objs-y := $(foreach m, $(filter-out $(subdir-obj-y), $(obj-y)), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))),$($(m:.o=-objs)) $($(m:.o=-y)),$(m))) $(extra-y)
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real-objs-m := $(foreach m, $(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))),$($(m:.o=-objs)) $($(m:.o=-y)),$(m)))
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# Add subdir path
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extra-y := $(addprefix $(obj)/,$(extra-y))
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always := $(addprefix $(obj)/,$(always))
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targets := $(addprefix $(obj)/,$(targets))
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obj-y := $(addprefix $(obj)/,$(obj-y))
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obj-m := $(addprefix $(obj)/,$(obj-m))
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lib-y := $(addprefix $(obj)/,$(lib-y))
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subdir-obj-y := $(addprefix $(obj)/,$(subdir-obj-y))
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real-objs-y := $(addprefix $(obj)/,$(real-objs-y))
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real-objs-m := $(addprefix $(obj)/,$(real-objs-m))
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single-used-m := $(addprefix $(obj)/,$(single-used-m))
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multi-used-y := $(addprefix $(obj)/,$(multi-used-y))
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multi-used-m := $(addprefix $(obj)/,$(multi-used-m))
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multi-objs-y := $(addprefix $(obj)/,$(multi-objs-y))
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multi-objs-m := $(addprefix $(obj)/,$(multi-objs-m))
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subdir-ym := $(addprefix $(obj)/,$(subdir-ym))
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obj-dirs := $(addprefix $(obj)/,$(obj-dirs))
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# The temporary file to save gcc -MD generated dependencies must not
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# contain a comma
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depfile = $(subst $(comma),_,$(@D)/.$(@F).d)
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# These flags are needed for modversions and compiling, so we define them here
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# already
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# $(modname_flags) #defines KBUILD_MODNAME as the name of the module it will
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# end up in (or would, if it gets compiled in)
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# Note: It's possible that one object gets potentially linked into more
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# than one module. In that case KBUILD_MODNAME will be set to foo_bar,
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# where foo and bar are the name of the modules.
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basename_flags = -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F)))
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modname_flags = $(if $(filter 1,$(words $(modname))),-DKBUILD_MODNAME=$(subst $(comma),_,$(subst -,_,$(modname))))
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_c_flags = $(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_$(*F).o)
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_a_flags = $(AFLAGS) $(EXTRA_AFLAGS) $(AFLAGS_$(*F).o)
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_cpp_flags = $(CPPFLAGS) $(EXTRA_CPPFLAGS) $(CPPFLAGS_$(@F))
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# If building the kernel in a separate objtree expand all occurrences
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# of -Idir to -I$(srctree)/dir except for absolute paths (starting with '/').
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ifeq ($(KBUILD_SRC),)
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__c_flags = $(_c_flags)
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__a_flags = $(_a_flags)
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__cpp_flags = $(_cpp_flags)
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else
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# Prefix -I with $(srctree) if it is not an absolute path
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addtree = $(if $(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1)
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# Find all -I options and call addtree
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flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))
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# -I$(obj) locates generated .h files
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# $(call addtree,-I$(obj)) locates .h files in srctree, from generated .c files
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# and locates generated .h files
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# FIXME: Replace both with specific CFLAGS* statements in the makefiles
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__c_flags = $(call addtree,-I$(obj)) $(call flags,_c_flags)
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__a_flags = $(call flags,_a_flags)
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__cpp_flags = $(call flags,_cpp_flags)
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endif
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c_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(CPPFLAGS) \
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$(__c_flags) $(modkern_cflags) \
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$(basename_flags) $(modname_flags)
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a_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(CPPFLAGS) \
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$(__a_flags) $(modkern_aflags)
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cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(__cpp_flags)
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ld_flags = $(LDFLAGS) $(EXTRA_LDFLAGS)
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# Finds the multi-part object the current object will be linked into
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modname-multi = $(sort $(foreach m,$(multi-used),\
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$(if $(filter $(subst $(obj)/,,$*.o), $($(m:.o=-objs)) $($(m:.o=-y))),$(m:.o=))))
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# Shipped files
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# ===========================================================================
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quiet_cmd_shipped = SHIPPED $@
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cmd_shipped = cat $< > $@
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$(obj)/%:: $(src)/%_shipped
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$(call cmd,shipped)
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# Commands useful for building a boot image
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# ===========================================================================
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#
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# Use as following:
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#
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# target: source(s) FORCE
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# $(if_changed,ld/objcopy/gzip)
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#
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# and add target to EXTRA_TARGETS so that we know we have to
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# read in the saved command line
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# Linking
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# ---------------------------------------------------------------------------
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quiet_cmd_ld = LD $@
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cmd_ld = $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) $(LDFLAGS_$(@F)) \
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$(filter-out FORCE,$^) -o $@
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# Objcopy
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# ---------------------------------------------------------------------------
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quiet_cmd_objcopy = OBJCOPY $@
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cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
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# Gzip
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# ---------------------------------------------------------------------------
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quiet_cmd_gzip = GZIP $@
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cmd_gzip = gzip -f -9 < $< > $@
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# ===========================================================================
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# Generic stuff
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# ===========================================================================
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ifneq ($(KBUILD_NOCMDDEP),1)
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# Check if both arguments has same arguments. Result in empty string if equal
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# User may override this check using make KBUILD_NOCMDDEP=1
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arg-check = $(strip $(filter-out $(1), $(2)) $(filter-out $(2), $(1)) )
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endif
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# echo command. Short version is $(quiet) equals quiet, otherwise full command
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echo-cmd = $(if $($(quiet)cmd_$(1)), \
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echo ' $(subst ','\'',$($(quiet)cmd_$(1)))';)
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# function to only execute the passed command if necessary
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# >'< substitution is for echo to work, >$< substitution to preserve $ when reloading .cmd file
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# note: when using inline perl scripts [perl -e '...$$t=1;...'] in $(cmd_xxx) double $$ your perl vars
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#
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if_changed = $(if $(strip $? $(call arg-check, $(cmd_$(1)), $(cmd_$@)) ), \
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@set -e; \
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$(echo-cmd) \
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$(cmd_$(1)); \
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echo 'cmd_$@ := $(subst $$,$$$$,$(subst ','\'',$(cmd_$(1))))' > $(@D)/.$(@F).cmd)
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# execute the command and also postprocess generated .d dependencies
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# file
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if_changed_dep = $(if $(strip $? $(filter-out FORCE $(wildcard $^),$^)\
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$(call arg-check, $(cmd_$(1)), $(cmd_$@)) ), \
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@set -e; \
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$(echo-cmd) \
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$(cmd_$(1)); \
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scripts/basic/fixdep $(depfile) $@ '$(subst $$,$$$$,$(subst ','\'',$(cmd_$(1))))' > $(@D)/.$(@F).tmp; \
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rm -f $(depfile); \
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mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd)
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# Usage: $(call if_changed_rule,foo)
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# will check if $(cmd_foo) changed, or any of the prequisites changed,
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# and if so will execute $(rule_foo)
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if_changed_rule = $(if $(strip $? $(call arg-check, $(cmd_$(1)), $(cmd_$@)) ),\
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@set -e; \
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$(rule_$(1)))
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# If quiet is set, only print short version of command
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cmd = @$(if $($(quiet)cmd_$(1)),echo ' $(subst ','\'',$($(quiet)cmd_$(1)))' &&) $(cmd_$(1))
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# $(call descend,<dir>,<target>)
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# Recursively call a sub-make in <dir> with target <target>
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# Usage is deprecated, because make do not see this as an invocation of make.
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descend =$(Q)$(MAKE) -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj=$(1) $(2)
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
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# Usage:
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# $(Q)$(MAKE) $(build)=dir
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build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
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# filechk is used to check if the content of a generated file is updated.
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# Sample usage:
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# define filechk_sample
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# echo $KERNELRELEASE
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# endef
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# version.h : Makefile
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# $(call filechk,sample)
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# The rule defined shall write to stdout the content of the new file.
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# The existing file will be compared with the new one.
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# - If no file exist it is created
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# - If the content differ the new file is used
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# - If they are equal no change, and no timestamp update
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define filechk
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$(Q)set -e; \
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echo ' CHK $@'; \
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mkdir -p $(dir $@); \
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$(filechk_$(1)) $(2) > $@.tmp; \
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if [ -r $@ ] && cmp -s $@ $@.tmp; then \
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rm -f $@.tmp; \
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else \
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echo ' UPD $@'; \
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mv -f $@.tmp $@; \
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fi
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endef
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